summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mx5/cpu.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-mx5/cpu.c')
-rw-r--r--arch/arm/mach-mx5/cpu.c55
1 files changed, 24 insertions, 31 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index a00d2bc7246a..d40671da4372 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -20,37 +20,18 @@
static int cpu_silicon_rev = -1;
-#define SI_REV 0x48
+#define IIM_SREV 0x24
-static void query_silicon_parameter(void)
+static int get_mx51_srev(void)
{
- void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
- u32 rev;
+ void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
+ u32 rev = readl(iim_base + IIM_SREV) & 0xff;
- if (!rom) {
- cpu_silicon_rev = -EINVAL;
- return;
- }
-
- rev = readl(rom + SI_REV);
- switch (rev) {
- case 0x1:
- cpu_silicon_rev = MX51_CHIP_REV_1_0;
- break;
- case 0x2:
- cpu_silicon_rev = MX51_CHIP_REV_1_1;
- break;
- case 0x10:
- cpu_silicon_rev = MX51_CHIP_REV_2_0;
- break;
- case 0x20:
- cpu_silicon_rev = MX51_CHIP_REV_3_0;
- break;
- default:
- cpu_silicon_rev = 0;
- }
-
- iounmap(rom);
+ if (rev == 0x0)
+ return IMX_CHIP_REVISION_2_0;
+ else if (rev == 0x10)
+ return IMX_CHIP_REVISION_3_0;
+ return 0;
}
/*
@@ -64,7 +45,7 @@ int mx51_revision(void)
return -EINVAL;
if (cpu_silicon_rev == -1)
- query_silicon_parameter();
+ cpu_silicon_rev = get_mx51_srev();
return cpu_silicon_rev;
}
@@ -82,7 +63,7 @@ static int __init mx51_neon_fixup(void)
if (!cpu_is_mx51())
return 0;
- if (mx51_revision() < MX51_CHIP_REV_3_0 && (elf_hwcap & HWCAP_NEON)) {
+ if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) {
elf_hwcap &= ~HWCAP_NEON;
pr_info("Turning off NEON support, detected broken NEON implementation\n");
}
@@ -92,6 +73,18 @@ static int __init mx51_neon_fixup(void)
late_initcall(mx51_neon_fixup);
#endif
+static int get_mx53_srev(void)
+{
+ void __iomem *iim_base = MX51_IO_ADDRESS(MX53_IIM_BASE_ADDR);
+ u32 rev = readl(iim_base + IIM_SREV) & 0xff;
+
+ if (rev == 0x0)
+ return IMX_CHIP_REVISION_1_0;
+ else if (rev == 0x10)
+ return IMX_CHIP_REVISION_2_0;
+ return 0;
+}
+
/*
* Returns:
* the silicon revision of the cpu
@@ -103,7 +96,7 @@ int mx53_revision(void)
return -EINVAL;
if (cpu_silicon_rev == -1)
- query_silicon_parameter();
+ cpu_silicon_rev = get_mx53_srev();
return cpu_silicon_rev;
}