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-rw-r--r--arch/arm/mach-pxa/Kconfig26
-rw-r--r--arch/arm/mach-pxa/Makefile10
-rw-r--r--arch/arm/mach-pxa/balloon3.c82
-rw-r--r--arch/arm/mach-pxa/capc7117.c2
-rw-r--r--arch/arm/mach-pxa/clock-pxa2xx.c64
-rw-r--r--arch/arm/mach-pxa/clock-pxa3xx.c217
-rw-r--r--arch/arm/mach-pxa/clock.c29
-rw-r--r--arch/arm/mach-pxa/clock.h49
-rw-r--r--arch/arm/mach-pxa/cm-x255.c2
-rw-r--r--arch/arm/mach-pxa/cm-x270.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c28
-rw-r--r--arch/arm/mach-pxa/cm-x300.c2
-rw-r--r--arch/arm/mach-pxa/colibri-evalboard.c (renamed from arch/arm/mach-pxa/colibri-pxa270-evalboard.c)96
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270-income.c47
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270.c108
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c73
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c139
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c49
-rw-r--r--arch/arm/mach-pxa/corgi.c8
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c10
-rw-r--r--arch/arm/mach-pxa/csb726.c9
-rw-r--r--arch/arm/mach-pxa/devices.c249
-rw-r--r--arch/arm/mach-pxa/em-x270.c6
-rw-r--r--arch/arm/mach-pxa/eseries.c12
-rw-r--r--arch/arm/mach-pxa/ezx.c12
-rw-r--r--arch/arm/mach-pxa/generic.c49
-rw-r--r--arch/arm/mach-pxa/generic.h15
-rw-r--r--arch/arm/mach-pxa/gumstix.c2
-rw-r--r--arch/arm/mach-pxa/h5000.c11
-rw-r--r--arch/arm/mach-pxa/himalaya.c2
-rw-r--r--arch/arm/mach-pxa/hx4700.c4
-rw-r--r--arch/arm/mach-pxa/icontrol.c4
-rw-r--r--arch/arm/mach-pxa/idp.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/addr-map.h48
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h47
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h48
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-regs.h66
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx_spi.h47
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h9
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-intc.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/smemc.h74
-rw-r--r--arch/arm/mach-pxa/irq.c162
-rw-r--r--arch/arm/mach-pxa/littleton.c4
-rw-r--r--arch/arm/mach-pxa/lpd270.c22
-rw-r--r--arch/arm/mach-pxa/lubbock.c24
-rw-r--r--arch/arm/mach-pxa/magician.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c22
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/mp900.c2
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c2
-rw-r--r--arch/arm/mach-pxa/palmld.c2
-rw-r--r--arch/arm/mach-pxa/palmt5.c2
-rw-r--r--arch/arm/mach-pxa/palmtc.c190
-rw-r--r--arch/arm/mach-pxa/palmte2.c2
-rw-r--r--arch/arm/mach-pxa/palmtreo.c4
-rw-r--r--arch/arm/mach-pxa/palmtx.c5
-rw-r--r--arch/arm/mach-pxa/palmz72.c2
-rw-r--r--arch/arm/mach-pxa/pcm027.c4
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c15
-rw-r--r--arch/arm/mach-pxa/pm.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c4
-rw-r--r--arch/arm/mach-pxa/pxa25x.c93
-rw-r--r--arch/arm/mach-pxa/pxa27x.c111
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c270
-rw-r--r--arch/arm/mach-pxa/pxa930.c2
-rw-r--r--arch/arm/mach-pxa/pxa95x.c308
-rw-r--r--arch/arm/mach-pxa/raumfeld.c11
-rw-r--r--arch/arm/mach-pxa/saar.c4
-rw-r--r--arch/arm/mach-pxa/saarb.c114
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c5
-rw-r--r--arch/arm/mach-pxa/sleep.S6
-rw-r--r--arch/arm/mach-pxa/smemc.c51
-rw-r--r--arch/arm/mach-pxa/spitz.c17
-rw-r--r--arch/arm/mach-pxa/stargate2.c9
-rw-r--r--arch/arm/mach-pxa/tavorevb.c2
-rw-r--r--arch/arm/mach-pxa/tavorevb3.c2
-rw-r--r--arch/arm/mach-pxa/time.c35
-rw-r--r--arch/arm/mach-pxa/tosa.c11
-rw-r--r--arch/arm/mach-pxa/trizeps4.c6
-rw-r--r--arch/arm/mach-pxa/viper.c24
-rw-r--r--arch/arm/mach-pxa/vpac270.c2
-rw-r--r--arch/arm/mach-pxa/xcep.c7
-rw-r--r--arch/arm/mach-pxa/z2.c4
-rw-r--r--arch/arm/mach-pxa/zeus.c34
-rw-r--r--arch/arm/mach-pxa/zylonite.c2
88 files changed, 2073 insertions, 1316 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index dd235ecc9d6c..2fc9f94cdd29 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -50,6 +50,10 @@ config MACH_SAAR
select PXA3xx
select CPU_PXA930
+config MACH_SAARB
+ bool "PXA955 Handheld Platform (aka SAARB)"
+ select CPU_PXA955
+
comment "Third Party Dev Platforms (sorted by vendor name)"
config ARCH_PXA_IDP
@@ -94,6 +98,7 @@ config MACH_ARMCORE
select PXA27x
select IWMMXT
select PXA25x
+ select MIGHT_HAVE_PCI
config MACH_EM_X270
bool "CompuLab EM-x270 platform"
@@ -232,10 +237,6 @@ config MACH_COLIBRI
bool "Toradex Colibri PXA270"
select PXA27x
-config MACH_COLIBRI_PXA270_EVALBOARD
- bool "Toradex Colibri Evaluation Carrier Board support (PXA270)"
- depends on MACH_COLIBRI
-
config MACH_COLIBRI_PXA270_INCOME
bool "Income s.r.o. PXA270 SBC"
depends on MACH_COLIBRI
@@ -253,6 +254,10 @@ config MACH_COLIBRI320
select PXA3xx
select CPU_PXA320
+config MACH_COLIBRI_EVALBOARD
+ bool "Toradex Colibri Evaluation Carrier Board support"
+ depends on MACH_COLIBRI || MACH_COLIBRI300 || MACH_COLIBRI320
+
config MACH_VPAC270
bool "Voipac PXA270"
select PXA27x
@@ -540,6 +545,7 @@ config MACH_ICONTROL
config ARCH_PXA_ESERIES
bool "PXA based Toshiba e-series PDAs"
select PXA25x
+ select FB_W100
config MACH_E330
bool "Toshiba e330"
@@ -651,11 +657,17 @@ config CPU_PXA935
help
PXA935 (codename Tavor-P65)
-config CPU_PXA950
+config PXA95x
bool
- select CPU_PXA930
+ select CPU_PJ4
+ help
+ Select code specific to PXA95x variants
+
+config CPU_PXA955
+ bool
+ select PXA95x
help
- PXA950 (codename Tavor-PV2)
+ PXA950 (codename MG1)
config PXA_SHARP_C7xx
bool
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index e2f89c2c6f49..cc39d17b2e07 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -16,9 +16,10 @@ endif
# Generic drivers that other drivers may depend upon
# SoC-specific code
-obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o
-obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o
-obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
+obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
+obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
+obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
+obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o
obj-$(CONFIG_CPU_PXA300) += pxa300.o
obj-$(CONFIG_CPU_PXA320) += pxa320.o
obj-$(CONFIG_CPU_PXA930) += pxa930.o
@@ -34,6 +35,7 @@ obj-$(CONFIG_MACH_LITTLETON) += littleton.o
obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
obj-$(CONFIG_MACH_TAVOREVB3) += tavorevb3.o
obj-$(CONFIG_MACH_SAAR) += saar.o
+obj-$(CONFIG_MACH_SAARB) += saarb.o
# 3rd Party Dev Platforms
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
@@ -60,7 +62,7 @@ obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_PCM027) += pcm027.o
obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
-obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD) += colibri-pxa270-evalboard.o
+obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o
obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o
obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 21e188901935..a134a1413e01 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -477,25 +477,25 @@ static inline void balloon3_leds_init(void) {}
/******************************************************************************
* FPGA IRQ
******************************************************************************/
-static void balloon3_mask_irq(unsigned int irq)
+static void balloon3_mask_irq(struct irq_data *d)
{
- int balloon3_irq = (irq - BALLOON3_IRQ(0));
+ int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled &= ~(1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
-static void balloon3_unmask_irq(unsigned int irq)
+static void balloon3_unmask_irq(struct irq_data *d)
{
- int balloon3_irq = (irq - BALLOON3_IRQ(0));
+ int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled |= (1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
static struct irq_chip balloon3_irq_chip = {
.name = "FPGA",
- .ack = balloon3_mask_irq,
- .mask = balloon3_mask_irq,
- .unmask = balloon3_unmask_irq,
+ .irq_ack = balloon3_mask_irq,
+ .irq_mask = balloon3_mask_irq,
+ .irq_unmask = balloon3_unmask_irq,
};
static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -504,8 +504,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
balloon3_irq_enabled;
do {
/* clear useless edge notification */
- if (desc->chip->ack)
- desc->chip->ack(BALLOON3_AUX_NIRQ);
+ if (desc->irq_data.chip->irq_ack) {
+ struct irq_data *d;
+
+ d = irq_get_irq_data(BALLOON3_AUX_NIRQ);
+ desc->irq_data.chip->irq_ack(d);
+ }
+
while (pending) {
irq = BALLOON3_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
@@ -567,27 +572,29 @@ static inline void balloon3_i2c_init(void) {}
* NAND
******************************************************************************/
#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
-static uint16_t balloon3_ctl =
- BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
- BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
- BALLOON3_NAND_CONTROL_FLWP;
-
static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
+ uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
if (ctrl & NAND_CTRL_CHANGE) {
if (ctrl & NAND_CLE)
- balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE;
+ balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLCLE;
else
- balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE;
+ balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLCLE;
if (ctrl & NAND_ALE)
- balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE;
+ balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLALE;
else
- balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE;
-
- __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
+ balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLALE;
+
+ if (balloon3_ctl_clr)
+ __raw_writel(balloon3_ctl_clr,
+ BALLOON3_NAND_CONTROL_REG);
+ if (balloon3_ctl_set)
+ __raw_writel(balloon3_ctl_set,
+ BALLOON3_NAND_CONTROL_REG |
+ BALLOON3_FPGA_SETnCLR);
}
if (cmd != NAND_CMD_NONE)
@@ -599,28 +606,33 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
if (chip < 0 || chip > 3)
return;
- balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 |
- BALLOON3_NAND_CONTROL_FLCE1 |
- BALLOON3_NAND_CONTROL_FLCE2 |
- BALLOON3_NAND_CONTROL_FLCE3;
+ /* Assert all nCE lines */
+ __raw_writew(
+ BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
+ BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
+ BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
/* Deassert correct nCE line */
- balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip);
+ __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
+ BALLOON3_NAND_CONTROL_REG);
+}
- __raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
+static int balloon3_nand_dev_ready(struct mtd_info *mtd)
+{
+ return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
}
static int balloon3_nand_probe(struct platform_device *pdev)
{
- void __iomem *temp_map;
uint16_t ver;
int ret;
- __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG);
+ __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
+ BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR);
ver = __raw_readw(BALLOON3_FPGA_VER);
- if (ver > 0x0201)
- pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. "
+ if (ver < 0x4f08)
+ pr_warn("The FPGA code, version 0x%04x, is too old. "
"NAND support might be broken in this version!", ver);
/* Power up the NAND chips */
@@ -635,7 +647,11 @@ static int balloon3_nand_probe(struct platform_device *pdev)
gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
/* Deassert all nCE lines and write protect line */
- __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
+ __raw_writel(
+ BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
+ BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
+ BALLOON3_NAND_CONTROL_FLWP,
+ BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
return 0;
err2:
@@ -677,7 +693,7 @@ struct platform_nand_data balloon3_nand_pdata = {
},
.ctrl = {
.hwcontrol = 0,
- .dev_ready = 0,
+ .dev_ready = balloon3_nand_dev_ready,
.select_chip = balloon3_nand_select_chip,
.cmd_ctrl = balloon3_nand_cmd_ctl,
.probe = balloon3_nand_probe,
@@ -802,7 +818,7 @@ static struct map_desc balloon3_io_desc[] __initdata = {
static void __init balloon3_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
}
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4bd7a3cda48c..4284513f396a 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -149,7 +149,7 @@ static void __init capc7117_init(void)
MACHINE_START(CAPC7117,
"Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
.init_machine = capc7117_init
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
new file mode 100644
index 000000000000..1ce090448493
--- /dev/null
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -0,0 +1,64 @@
+/*
+ * linux/arch/arm/mach-pxa/clock-pxa2xx.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sysdev.h>
+
+#include <mach/pxa2xx-regs.h>
+
+#include "clock.h"
+
+void clk_pxa2xx_cken_enable(struct clk *clk)
+{
+ CKEN |= 1 << clk->cken;
+}
+
+void clk_pxa2xx_cken_disable(struct clk *clk)
+{
+ CKEN &= ~(1 << clk->cken);
+}
+
+const struct clkops clk_pxa2xx_cken_ops = {
+ .enable = clk_pxa2xx_cken_enable,
+ .disable = clk_pxa2xx_cken_disable,
+};
+
+#ifdef CONFIG_PM
+static uint32_t saved_cken;
+
+static int pxa2xx_clock_suspend(struct sys_device *d, pm_message_t state)
+{
+ saved_cken = CKEN;
+ return 0;
+}
+
+static int pxa2xx_clock_resume(struct sys_device *d)
+{
+ CKEN = saved_cken;
+ return 0;
+}
+#else
+#define pxa2xx_clock_suspend NULL
+#define pxa2xx_clock_resume NULL
+#endif
+
+struct sysdev_class pxa2xx_clock_sysclass = {
+ .name = "pxa2xx-clock",
+ .suspend = pxa2xx_clock_suspend,
+ .resume = pxa2xx_clock_resume,
+};
+
+static int __init pxa2xx_clock_init(void)
+{
+ if (cpu_is_pxa2xx())
+ return sysdev_class_register(&pxa2xx_clock_sysclass);
+ return 0;
+}
+postcore_initcall(pxa2xx_clock_init);
diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c
new file mode 100644
index 000000000000..3f864cd0bd28
--- /dev/null
+++ b/arch/arm/mach-pxa/clock-pxa3xx.c
@@ -0,0 +1,217 @@
+/*
+ * linux/arch/arm/mach-pxa/clock-pxa3xx.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <mach/smemc.h>
+#include <mach/pxa3xx-regs.h>
+
+#include "clock.h"
+
+/* Crystal clock: 13MHz */
+#define BASE_CLK 13000000
+
+/* Ring Oscillator Clock: 60MHz */
+#define RO_CLK 60000000
+
+#define ACCR_D0CS (1 << 26)
+#define ACCR_PCCE (1 << 11)
+
+/* crystal frequency to HSIO bus frequency multiplier (HSS) */
+static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
+
+/*
+ * Get the clock frequency as reflected by CCSR and the turbo flag.
+ * We assume these values have been applied via a fcs.
+ * If info is not 0 we also display the current settings.
+ */
+unsigned int pxa3xx_get_clk_frequency_khz(int info)
+{
+ unsigned long acsr, xclkcfg;
+ unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;
+
+ /* Read XCLKCFG register turbo bit */
+ __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
+ t = xclkcfg & 0x1;
+
+ acsr = ACSR;
+
+ xl = acsr & 0x1f;
+ xn = (acsr >> 8) & 0x7;
+ hss = (acsr >> 14) & 0x3;
+
+ XL = xl * BASE_CLK;
+ XN = xn * XL;
+
+ ro = acsr & ACCR_D0CS;
+
+ CLK = (ro) ? RO_CLK : ((t) ? XN : XL);
+ HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;
+
+ if (info) {
+ pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",
+ RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,
+ (ro) ? "" : "in");
+ pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",
+ XL / 1000000, (XL % 1000000) / 10000, xl);
+ pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",
+ XN / 1000000, (XN % 1000000) / 10000, xn,
+ (t) ? "" : "in");
+ pr_info("HSIO bus clock: %d.%02dMHz\n",
+ HSS / 1000000, (HSS % 1000000) / 10000);
+ }
+
+ return CLK / 1000;
+}
+
+/*
+ * Return the current AC97 clock frequency.
+ */
+static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)
+{
+ unsigned long rate = 312000000;
+ unsigned long ac97_div;
+
+ ac97_div = AC97_DIV;
+
+ /* This may loose precision for some rates but won't for the
+ * standard 24.576MHz.
+ */
+ rate /= (ac97_div >> 12) & 0x7fff;
+ rate *= (ac97_div & 0xfff);
+
+ return rate;
+}
+
+/*
+ * Return the current HSIO bus clock frequency
+ */
+static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
+{
+ unsigned long acsr;
+ unsigned int hss, hsio_clk;
+
+ acsr = ACSR;
+
+ hss = (acsr >> 14) & 0x3;
+ hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;
+
+ return hsio_clk;
+}
+
+/* crystal frequency to static memory controller multiplier (SMCFS) */
+static unsigned int smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
+static unsigned int df_clkdiv[4] = { 1, 2, 4, 1 };
+
+static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk)
+{
+ unsigned long acsr = ACSR;
+ unsigned long memclkcfg = __raw_readl(MEMCLKCFG);
+
+ return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] /
+ df_clkdiv[(memclkcfg >> 16) & 0x3];
+}
+
+void clk_pxa3xx_cken_enable(struct clk *clk)
+{
+ unsigned long mask = 1ul << (clk->cken & 0x1f);
+
+ if (clk->cken < 32)
+ CKENA |= mask;
+ else
+ CKENB |= mask;
+}
+
+void clk_pxa3xx_cken_disable(struct clk *clk)
+{
+ unsigned long mask = 1ul << (clk->cken & 0x1f);
+
+ if (clk->cken < 32)
+ CKENA &= ~mask;
+ else
+ CKENB &= ~mask;
+}
+
+const struct clkops clk_pxa3xx_cken_ops = {
+ .enable = clk_pxa3xx_cken_enable,
+ .disable = clk_pxa3xx_cken_disable,
+};
+
+const struct clkops clk_pxa3xx_hsio_ops = {
+ .enable = clk_pxa3xx_cken_enable,
+ .disable = clk_pxa3xx_cken_disable,
+ .getrate = clk_pxa3xx_hsio_getrate,
+};
+
+const struct clkops clk_pxa3xx_ac97_ops = {
+ .enable = clk_pxa3xx_cken_enable,
+ .disable = clk_pxa3xx_cken_disable,
+ .getrate = clk_pxa3xx_ac97_getrate,
+};
+
+const struct clkops clk_pxa3xx_smemc_ops = {
+ .enable = clk_pxa3xx_cken_enable,
+ .disable = clk_pxa3xx_cken_disable,
+ .getrate = clk_pxa3xx_smemc_getrate,
+};
+
+static void clk_pout_enable(struct clk *clk)
+{
+ OSCC |= OSCC_PEN;
+}
+
+static void clk_pout_disable(struct clk *clk)
+{
+ OSCC &= ~OSCC_PEN;
+}
+
+const struct clkops clk_pxa3xx_pout_ops = {
+ .enable = clk_pout_enable,
+ .disable = clk_pout_disable,
+};
+
+#ifdef CONFIG_PM
+static uint32_t cken[2];
+static uint32_t accr;
+
+static int pxa3xx_clock_suspend(struct sys_device *d, pm_message_t state)
+{
+ cken[0] = CKENA;
+ cken[1] = CKENB;
+ accr = ACCR;
+ return 0;
+}
+
+static int pxa3xx_clock_resume(struct sys_device *d)
+{
+ ACCR = accr;
+ CKENA = cken[0];
+ CKENB = cken[1];
+ return 0;
+}
+#else
+#define pxa3xx_clock_suspend NULL
+#define pxa3xx_clock_resume NULL
+#endif
+
+struct sysdev_class pxa3xx_clock_sysclass = {
+ .name = "pxa3xx-clock",
+ .suspend = pxa3xx_clock_suspend,
+ .resume = pxa3xx_clock_resume,
+};
+
+static int __init pxa3xx_clock_init(void)
+{
+ if (cpu_is_pxa3xx() || cpu_is_pxa95x())
+ return sysdev_class_register(&pxa3xx_clock_sysclass);
+ return 0;
+}
+postcore_initcall(pxa3xx_clock_init);
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index abba0089a2ae..d5152220ce94 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -3,21 +3,11 @@
*/
#include <linux/module.h>
#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/string.h>
#include <linux/clk.h>
#include <linux/spinlock.h>
-#include <linux/platform_device.h>
#include <linux/delay.h>
+#include <linux/clkdev.h>
-#include <asm/clkdev.h>
-#include <mach/pxa2xx-regs.h>
-#include <mach/hardware.h>
-
-#include "devices.h"
-#include "generic.h"
#include "clock.h"
static DEFINE_SPINLOCK(clocks_lock);
@@ -63,18 +53,19 @@ unsigned long clk_get_rate(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_rate);
-
-void clk_cken_enable(struct clk *clk)
+void clk_dummy_enable(struct clk *clk)
{
- CKEN |= 1 << clk->cken;
}
-void clk_cken_disable(struct clk *clk)
+void clk_dummy_disable(struct clk *clk)
{
- CKEN &= ~(1 << clk->cken);
}
-const struct clkops clk_cken_ops = {
- .enable = clk_cken_enable,
- .disable = clk_cken_disable,
+const struct clkops clk_dummy_ops = {
+ .enable = clk_dummy_enable,
+ .disable = clk_dummy_disable,
+};
+
+struct clk clk_dummy = {
+ .ops = &clk_dummy_ops,
};
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index d8488742b807..f9f349a21b54 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,4 +1,5 @@
-#include <asm/clkdev.h>
+#include <linux/clkdev.h>
+#include <linux/sysdev.h>
struct clkops {
void (*enable)(struct clk *);
@@ -14,6 +15,12 @@ struct clk {
unsigned int enabled;
};
+void clk_dummy_enable(struct clk *);
+void clk_dummy_disable(struct clk *);
+
+extern const struct clkops clk_dummy_ops;
+extern struct clk clk_dummy;
+
#define INIT_CLKREG(_clk,_devname,_conname) \
{ \
.clk = _clk, \
@@ -21,14 +28,6 @@ struct clk {
.con_id = _conname, \
}
-#define DEFINE_CKEN(_name, _cken, _rate, _delay) \
-struct clk clk_##_name = { \
- .ops = &clk_cken_ops, \
- .rate = _rate, \
- .cken = CKEN_##_cken, \
- .delay = _delay, \
- }
-
#define DEFINE_CK(_name, _cken, _ops) \
struct clk clk_##_name = { \
.ops = _ops, \
@@ -42,28 +41,38 @@ struct clk clk_##_name = { \
.delay = _delay, \
}
-extern const struct clkops clk_cken_ops;
-
-void clk_cken_enable(struct clk *clk);
-void clk_cken_disable(struct clk *clk);
-
-#ifdef CONFIG_PXA3xx
-#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
+#define DEFINE_PXA2_CKEN(_name, _cken, _rate, _delay) \
struct clk clk_##_name = { \
- .ops = &clk_pxa3xx_cken_ops, \
+ .ops = &clk_pxa2xx_cken_ops, \
.rate = _rate, \
.cken = CKEN_##_cken, \
.delay = _delay, \
}
-#define DEFINE_PXA3_CK(_name, _cken, _ops) \
+extern const struct clkops clk_pxa2xx_cken_ops;
+
+void clk_pxa2xx_cken_enable(struct clk *clk);
+void clk_pxa2xx_cken_disable(struct clk *clk);
+
+extern struct sysdev_class pxa2xx_clock_sysclass;
+
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
struct clk clk_##_name = { \
- .ops = _ops, \
+ .ops = &clk_pxa3xx_cken_ops, \
+ .rate = _rate, \
.cken = CKEN_##_cken, \
+ .delay = _delay, \
}
extern const struct clkops clk_pxa3xx_cken_ops;
+extern const struct clkops clk_pxa3xx_hsio_ops;
+extern const struct clkops clk_pxa3xx_ac97_ops;
+extern const struct clkops clk_pxa3xx_pout_ops;
+extern const struct clkops clk_pxa3xx_smemc_ops;
+
extern void clk_pxa3xx_cken_enable(struct clk *);
extern void clk_pxa3xx_cken_disable(struct clk *);
-#endif
+extern struct sysdev_class pxa3xx_clock_sysclass;
+#endif
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index f1a7703d771b..93f59f877fc6 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -17,13 +17,13 @@
#include <linux/mtd/nand-gpio.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <mach/pxa25x.h>
-#include <mach/pxa2xx_spi.h>
#include "generic.h"
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index a9926bb75922..b88d601a8090 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -19,12 +19,12 @@
#include <video/mbxfb.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/spi/libertas_spi.h>
#include <mach/pxa27x.h>
#include <mach/ohci.h>
#include <mach/mmc.h>
-#include <mach/pxa2xx_spi.h>
#include "generic.h"
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 0f3130599770..a2380cd76f80 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
{
/* clear our parent irq */
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
it8152_irq_demux(irq, desc);
}
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index ac5598ce9724..b734d8468168 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -24,6 +24,7 @@
#include <mach/pxa2xx-regs.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
+#include <mach/smemc.h>
#include <asm/hardware/it8152.h>
@@ -392,9 +393,9 @@ static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
cmx2xx_pci_suspend();
/* save MSC registers */
- sleep_save_msc[0] = MSC0;
- sleep_save_msc[1] = MSC1;
- sleep_save_msc[2] = MSC2;
+ sleep_save_msc[0] = __raw_readl(MSC0);
+ sleep_save_msc[1] = __raw_readl(MSC1);
+ sleep_save_msc[2] = __raw_readl(MSC2);
/* setup power saving mode registers */
PCFR = 0x0;
@@ -416,9 +417,9 @@ static int cmx2xx_resume(struct sys_device *dev)
cmx2xx_pci_resume();
/* restore MSC registers */
- MSC0 = sleep_save_msc[0];
- MSC1 = sleep_save_msc[1];
- MSC2 = sleep_save_msc[2];
+ __raw_writel(sleep_save_msc[0], MSC0);
+ __raw_writel(sleep_save_msc[1], MSC1);
+ __raw_writel(sleep_save_msc[2], MSC2);
return 0;
}
@@ -476,8 +477,6 @@ static void __init cmx2xx_init(void)
static void __init cmx2xx_init_irq(void)
{
- pxa27x_init_irq();
-
if (cpu_is_pxa25x()) {
pxa25x_init_irq();
cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
@@ -500,7 +499,12 @@ static struct map_desc cmx2xx_io_desc[] __initdata = {
static void __init cmx2xx_map_io(void)
{
- pxa_map_io();
+ if (cpu_is_pxa25x())
+ pxa25x_map_io();
+
+ if (cpu_is_pxa27x())
+ pxa27x_map_io();
+
iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
it8152_base_address = CMX2XX_IT8152_VIRT;
@@ -508,7 +512,11 @@ static void __init cmx2xx_map_io(void)
#else
static void __init cmx2xx_map_io(void)
{
- pxa_map_io();
+ if (cpu_is_pxa25x())
+ pxa25x_map_io();
+
+ if (cpu_is_pxa27x())
+ pxa27x_map_io();
}
#endif
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 922b1075b9de..7984268508b6 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -857,7 +857,7 @@ static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
MACHINE_START(CM_X300, "CM-X300 module")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
.init_machine = cm_x300_init,
diff --git a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 0f3b632c3b14..6b2c800a1133 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -1,7 +1,7 @@
/*
- * linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
+ * linux/arch/arm/mach-pxa/colibri-evalboard.c
*
- * Support for Toradex PXA270 based Colibri Evaluation Carrier Board
+ * Support for Toradex Colibri Evaluation Carrier Board
* Daniel Mack <daniel@caiaq.de>
* Marek Vasut <marek.vasut@gmail.com>
*
@@ -19,6 +19,7 @@
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/mach/arch.h>
+#include <linux/i2c.h>
#include <mach/pxa27x.h>
#include <mach/colibri.h>
@@ -26,86 +27,95 @@
#include <mach/ohci.h>
#include <mach/pxa27x-udc.h>
+#include <plat/i2c.h>
+
#include "generic.h"
#include "devices.h"
/******************************************************************************
- * Pin configuration
- ******************************************************************************/
-static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
- /* MMC */
- GPIO32_MMC_CLK,
- GPIO92_MMC_DAT_0,
- GPIO109_MMC_DAT_1,
- GPIO110_MMC_DAT_2,
- GPIO111_MMC_DAT_3,
- GPIO112_MMC_CMD,
- GPIO0_GPIO, /* SD detect */
-
- /* FFUART */
- GPIO39_FFUART_TXD,
- GPIO34_FFUART_RXD,
-
- /* UHC */
- GPIO88_USBH1_PWR,
- GPIO89_USBH1_PEN,
- GPIO119_USBH2_PWR,
- GPIO120_USBH2_PEN,
-};
-
-/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
-static struct pxamci_platform_data colibri_pxa270_mci_platform_data = {
+static struct pxamci_platform_data colibri_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_power = -1,
- .gpio_card_detect = GPIO0_COLIBRI_PXA270_SD_DETECT,
.gpio_card_ro = -1,
.detect_delay_ms = 200,
};
-static void __init colibri_pxa270_mmc_init(void)
+static void __init colibri_mmc_init(void)
{
- pxa_set_mci_info(&colibri_pxa270_mci_platform_data);
+ if (machine_is_colibri()) /* PXA270 Colibri */
+ colibri_mci_platform_data.gpio_card_detect =
+ GPIO0_COLIBRI_PXA270_SD_DETECT;
+ if (machine_is_colibri300()) /* PXA300 Colibri */
+ colibri_mci_platform_data.gpio_card_detect =
+ GPIO39_COLIBRI_PXA300_SD_DETECT;
+ else /* PXA320 Colibri */
+ colibri_mci_platform_data.gpio_card_detect =
+ GPIO28_COLIBRI_PXA320_SD_DETECT;
+
+ pxa_set_mci_info(&colibri_mci_platform_data);
}
#else
-static inline void colibri_pxa270_mmc_init(void) {}
+static inline void colibri_mmc_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static int colibri_pxa270_ohci_init(struct device *dev)
+static int colibri_ohci_init(struct device *dev)
{
UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
return 0;
}
-static struct pxaohci_platform_data colibri_pxa270_ohci_info = {
+static struct pxaohci_platform_data colibri_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
- .flags = ENABLE_PORT1 | ENABLE_PORT2 |
+ .flags = ENABLE_PORT1 |
POWER_CONTROL_LOW | POWER_SENSE_LOW,
- .init = colibri_pxa270_ohci_init,
+ .init = colibri_ohci_init,
};
-static void __init colibri_pxa270_uhc_init(void)
+static void __init colibri_uhc_init(void)
{
- pxa_set_ohci_info(&colibri_pxa270_ohci_info);
+ /* Colibri PXA270 has two usb ports, TBA for 320 */
+ if (machine_is_colibri())
+ colibri_ohci_info.flags |= ENABLE_PORT2;
+
+ pxa_set_ohci_info(&colibri_ohci_info);
}
#else
-static inline void colibri_pxa270_uhc_init(void) {}
+static inline void colibri_uhc_init(void) {}
#endif
-void __init colibri_pxa270_evalboard_init(void)
+/******************************************************************************
+ * I2C RTC
+ ******************************************************************************/
+#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
+static struct i2c_board_info __initdata colibri_i2c_devs[] = {
+ {
+ I2C_BOARD_INFO("m41t00", 0x68),
+ },
+};
+
+static void __init colibri_rtc_init(void)
+{
+ pxa_set_i2c_info(NULL);
+ i2c_register_board_info(0, ARRAY_AND_SIZE(colibri_i2c_devs));
+}
+#else
+static inline void colibri_rtc_init(void) {}
+#endif
+
+void __init colibri_evalboard_init(void)
{
- pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
- colibri_pxa270_mmc_init();
- colibri_pxa270_uhc_init();
+ colibri_mmc_init();
+ colibri_uhc_init();
+ colibri_rtc_init();
}
-
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index 37f0f3ed7c61..07b62a096f17 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -46,52 +46,6 @@
#define GPIO113_INCOME_TS_IRQ (113)
/******************************************************************************
- * Pin configuration
- ******************************************************************************/
-static mfp_cfg_t income_pin_config[] __initdata = {
- /* MMC */
- GPIO32_MMC_CLK,
- GPIO92_MMC_DAT_0,
- GPIO109_MMC_DAT_1,
- GPIO110_MMC_DAT_2,
- GPIO111_MMC_DAT_3,
- GPIO112_MMC_CMD,
- GPIO0_GPIO, /* SD detect */
- GPIO1_GPIO, /* SD read-only */
-
- /* FFUART */
- GPIO39_FFUART_TXD,
- GPIO34_FFUART_RXD,
-
- /* BFUART */
- GPIO42_BTUART_RXD,
- GPIO43_BTUART_TXD,
- GPIO45_BTUART_RTS,
-
- /* STUART */
- GPIO46_STUART_RXD,
- GPIO47_STUART_TXD,
-
- /* UHC */
- GPIO88_USBH1_PWR,
- GPIO89_USBH1_PEN,
-
- /* LCD */
- GPIOxx_LCD_TFT_16BPP,
-
- /* PWM */
- GPIO16_PWM0_OUT,
-
- /* I2C */
- GPIO117_I2C_SCL,
- GPIO118_I2C_SDA,
-
- /* LED */
- GPIO54_GPIO, /* LED A */
- GPIO55_GPIO, /* LED B */
-};
-
-/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
@@ -257,7 +211,6 @@ static inline void income_pwm_init(void) {}
void __init colibri_pxa270_income_boardinit(void)
{
- pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index bc045100ec15..6fc5d328ba7f 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -33,6 +33,103 @@
#include "generic.h"
/******************************************************************************
+ * Evaluation board MFP
+ ******************************************************************************/
+#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
+static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
+ /* MMC */
+ GPIO32_MMC_CLK,
+ GPIO92_MMC_DAT_0,
+ GPIO109_MMC_DAT_1,
+ GPIO110_MMC_DAT_2,
+ GPIO111_MMC_DAT_3,
+ GPIO112_MMC_CMD,
+ GPIO0_GPIO, /* SD detect */
+
+ /* FFUART */
+ GPIO39_FFUART_TXD,
+ GPIO34_FFUART_RXD,
+
+ /* UHC */
+ GPIO88_USBH1_PWR,
+ GPIO89_USBH1_PEN,
+ GPIO119_USBH2_PWR,
+ GPIO120_USBH2_PEN,
+
+ /* PCMCIA */
+ GPIO85_nPCE_1,
+ GPIO54_nPCE_2,
+ GPIO55_nPREG,
+ GPIO50_nPIOR,
+ GPIO51_nPIOW,
+ GPIO49_nPWE,
+ GPIO48_nPOE,
+ GPIO57_nIOIS16,
+ GPIO56_nPWAIT,
+ GPIO104_PSKTSEL,
+ GPIO53_GPIO, /* RESET */
+ GPIO83_GPIO, /* BVD1 */
+ GPIO82_GPIO, /* BVD2 */
+ GPIO1_GPIO, /* READY */
+ GPIO84_GPIO, /* DETECT */
+ GPIO107_GPIO, /* PPEN */
+
+ /* I2C */
+ GPIO117_I2C_SCL,
+ GPIO118_I2C_SDA,
+};
+#else
+static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {};
+#endif
+
+#ifdef CONFIG_MACH_COLIBRI_PXA270_INCOME
+static mfp_cfg_t income_pin_config[] __initdata = {
+ /* MMC */
+ GPIO32_MMC_CLK,
+ GPIO92_MMC_DAT_0,
+ GPIO109_MMC_DAT_1,
+ GPIO110_MMC_DAT_2,
+ GPIO111_MMC_DAT_3,
+ GPIO112_MMC_CMD,
+ GPIO0_GPIO, /* SD detect */
+ GPIO1_GPIO, /* SD read-only */
+
+ /* FFUART */
+ GPIO39_FFUART_TXD,
+ GPIO34_FFUART_RXD,
+
+ /* BFUART */
+ GPIO42_BTUART_RXD,
+ GPIO43_BTUART_TXD,
+ GPIO45_BTUART_RTS,
+
+ /* STUART */
+ GPIO46_STUART_RXD,
+ GPIO47_STUART_TXD,
+
+ /* UHC */
+ GPIO88_USBH1_PWR,
+ GPIO89_USBH1_PEN,
+
+ /* LCD */
+ GPIOxx_LCD_TFT_16BPP,
+
+ /* PWM */
+ GPIO16_PWM0_OUT,
+
+ /* I2C */
+ GPIO117_I2C_SCL,
+ GPIO118_I2C_SDA,
+
+ /* LED */
+ GPIO54_GPIO, /* LED A */
+ GPIO55_GPIO, /* LED B */
+};
+#else
+static mfp_cfg_t income_pin_config[] __initdata = {};
+#endif
+
+/******************************************************************************
* Pin configuration
******************************************************************************/
static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
@@ -184,10 +281,13 @@ static void __init colibri_pxa270_init(void)
colibri_pxa270_tsc_init();
switch (colibri_pxa270_baseboard) {
- case COLIBRI_PXA270_EVALBOARD:
- colibri_pxa270_evalboard_init();
+ case COLIBRI_EVALBOARD:
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(
+ colibri_pxa270_evalboard_pin_config));
+ colibri_evalboard_init();
break;
case COLIBRI_PXA270_INCOME:
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
colibri_pxa270_income_boardinit();
break;
default:
@@ -209,7 +309,7 @@ static void __init colibri_pxa270_income_init(void)
MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
.boot_params = COLIBRI_SDRAM_BASE + 0x100,
.init_machine = colibri_pxa270_init,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
MACHINE_END
@@ -217,7 +317,7 @@ MACHINE_END
MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
.boot_params = 0xa0000100,
.init_machine = colibri_pxa270_income_init,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index a70b256591e6..fddb16d07eb0 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -31,9 +31,38 @@
#include "generic.h"
#include "devices.h"
+
+#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
+static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
+ /* MMC */
+ GPIO7_MMC1_CLK,
+ GPIO14_MMC1_CMD,
+ GPIO3_MMC1_DAT0,
+ GPIO4_MMC1_DAT1,
+ GPIO5_MMC1_DAT2,
+ GPIO6_MMC1_DAT3,
+ GPIO39_GPIO, /* SD detect */
+
+ /* UHC */
+ GPIO0_2_USBH_PEN,
+ GPIO1_2_USBH_PWR,
+ GPIO77_USB_P3_1,
+ GPIO78_USB_P3_2,
+ GPIO79_USB_P3_3,
+ GPIO80_USB_P3_4,
+ GPIO81_USB_P3_5,
+ GPIO82_USB_P3_6,
+
+ /* I2C */
+ GPIO21_I2C_SCL,
+ GPIO22_I2C_SDA,
+};
+#else
+static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {};
+#endif
+
#if defined(CONFIG_AX88796)
#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
-
/*
* Asix AX88796 Ethernet
*/
@@ -80,35 +109,6 @@ static void __init colibri_pxa300_init_eth(void)
static inline void __init colibri_pxa300_init_eth(void) {}
#endif /* CONFIG_AX88796 */
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static mfp_cfg_t colibri_pxa300_usb_pin_config[] __initdata = {
- GPIO0_2_USBH_PEN,
- GPIO1_2_USBH_PWR,
-};
-
-static struct pxaohci_platform_data colibri_pxa300_ohci_info = {
- .port_mode = PMM_GLOBAL_MODE,
- .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
-};
-
-void __init colibri_pxa300_init_ohci(void)
-{
- pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_usb_pin_config));
- pxa_set_ohci_info(&colibri_pxa300_ohci_info);
-}
-#else
-static inline void colibri_pxa300_init_ohci(void) {}
-#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
-
-static mfp_cfg_t colibri_pxa300_mmc_pin_config[] __initdata = {
- GPIO7_MMC1_CLK,
- GPIO14_MMC1_CMD,
- GPIO3_MMC1_DAT0,
- GPIO4_MMC1_DAT1,
- GPIO5_MMC1_DAT2,
- GPIO6_MMC1_DAT3,
-};
-
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = {
GPIO54_LCD_LDD_0,
@@ -171,24 +171,21 @@ static inline void colibri_pxa310_init_ac97(void) {}
void __init colibri_pxa300_init(void)
{
- pxa_set_ffuart_info(NULL);
- pxa_set_btuart_info(NULL);
- pxa_set_stuart_info(NULL);
-
colibri_pxa300_init_eth();
- colibri_pxa300_init_ohci();
colibri_pxa3xx_init_nand();
colibri_pxa300_init_lcd();
colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
colibri_pxa310_init_ac97();
- colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa300_mmc_pin_config),
- mfp_to_gpio(MFP_PIN_GPIO13));
+
+ /* Evalboard init */
+ pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_evalboard_pin_config));
+ colibri_evalboard_init();
}
MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
.boot_params = COLIBRI_SDRAM_BASE + 0x100,
.init_machine = colibri_pxa300_init,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index ca5f29e2e9cd..ff9ff5f4fc47 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -35,9 +35,72 @@
#include "generic.h"
#include "devices.h"
+#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
+static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {
+ /* MMC */
+ GPIO22_MMC1_CLK,
+ GPIO23_MMC1_CMD,
+ GPIO18_MMC1_DAT0,
+ GPIO19_MMC1_DAT1,
+ GPIO20_MMC1_DAT2,
+ GPIO21_MMC1_DAT3,
+ GPIO28_GPIO, /* SD detect */
+
+ /* UART 1 configuration (may be set by bootloader) */
+ GPIO99_UART1_CTS,
+ GPIO104_UART1_RTS,
+ GPIO97_UART1_RXD,
+ GPIO98_UART1_TXD,
+ GPIO101_UART1_DTR,
+ GPIO103_UART1_DSR,
+ GPIO100_UART1_DCD,
+ GPIO102_UART1_RI,
+
+ /* UART 2 configuration */
+ GPIO109_UART2_CTS,
+ GPIO112_UART2_RTS,
+ GPIO110_UART2_RXD,
+ GPIO111_UART2_TXD,
+
+ /* UART 3 configuration */
+ GPIO30_UART3_RXD,
+ GPIO31_UART3_TXD,
+
+ /* UHC */
+ GPIO2_2_USBH_PEN,
+ GPIO3_2_USBH_PWR,
+
+ /* I2C */
+ GPIO32_I2C_SCL,
+ GPIO33_I2C_SDA,
+
+ /* PCMCIA */
+ MFP_CFG(GPIO59, AF7), /* PRST ; AF7 to tristate */
+ MFP_CFG(GPIO61, AF7), /* PCE1 ; AF7 to tristate */
+ MFP_CFG(GPIO60, AF7), /* PCE2 ; AF7 to tristate */
+ MFP_CFG(GPIO62, AF7), /* PCD ; AF7 to tristate */
+ MFP_CFG(GPIO56, AF7), /* PSKTSEL ; AF7 to tristate */
+ GPIO27_GPIO, /* RDnWR ; input/tristate */
+ GPIO50_GPIO, /* PREG ; input/tristate */
+ GPIO2_RDY,
+ GPIO5_NPIOR,
+ GPIO6_NPIOW,
+ GPIO7_NPIOS16,
+ GPIO8_NPWAIT,
+ GPIO29_GPIO, /* PRDY (READY GPIO) */
+ GPIO57_GPIO, /* PPEN (POWER GPIO) */
+ GPIO81_GPIO, /* PCD (DETECT GPIO) */
+ GPIO77_GPIO, /* PRST (RESET GPIO) */
+ GPIO53_GPIO, /* PBVD1 */
+ GPIO79_GPIO, /* PBVD2 */
+ GPIO54_GPIO, /* POE */
+};
+#else
+static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {};
+#endif
+
#if defined(CONFIG_AX88796)
#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO)
-
/*
* Asix AX88796 Ethernet
*/
@@ -84,26 +147,6 @@ static void __init colibri_pxa320_init_eth(void)
static inline void __init colibri_pxa320_init_eth(void) {}
#endif /* CONFIG_AX88796 */
-#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static mfp_cfg_t colibri_pxa320_usb_pin_config[] __initdata = {
- GPIO2_2_USBH_PEN,
- GPIO3_2_USBH_PWR,
-};
-
-static struct pxaohci_platform_data colibri_pxa320_ohci_info = {
- .port_mode = PMM_GLOBAL_MODE,
- .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
-};
-
-void __init colibri_pxa320_init_ohci(void)
-{
- pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_usb_pin_config));
- pxa_set_ohci_info(&colibri_pxa320_ohci_info);
-}
-#else
-static inline void colibri_pxa320_init_ohci(void) {}
-#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
-
#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
.gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
@@ -140,15 +183,6 @@ static void __init colibri_pxa320_init_udc(void)
static inline void colibri_pxa320_init_udc(void) {}
#endif
-static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = {
- GPIO22_MMC1_CLK,
- GPIO23_MMC1_CMD,
- GPIO18_MMC1_DAT0,
- GPIO19_MMC1_DAT1,
- GPIO20_MMC1_DAT2,
- GPIO21_MMC1_DAT3
-};
-
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = {
GPIO6_2_LCD_LDD_0,
@@ -205,59 +239,24 @@ static inline void __init colibri_pxa320_init_ac97(void)
static inline void colibri_pxa320_init_ac97(void) {}
#endif
-/*
- * The following configuration is verified to work with the Toradex Orchid
- * carrier board
- */
-static mfp_cfg_t colibri_pxa320_uart_pin_config[] __initdata = {
- /* UART 1 configuration (may be set by bootloader) */
- GPIO99_UART1_CTS,
- GPIO104_UART1_RTS,
- GPIO97_UART1_RXD,
- GPIO98_UART1_TXD,
- GPIO101_UART1_DTR,
- GPIO103_UART1_DSR,
- GPIO100_UART1_DCD,
- GPIO102_UART1_RI,
-
- /* UART 2 configuration */
- GPIO109_UART2_CTS,
- GPIO112_UART2_RTS,
- GPIO110_UART2_RXD,
- GPIO111_UART2_TXD,
-
- /* UART 3 configuration */
- GPIO30_UART3_RXD,
- GPIO31_UART3_TXD,
-};
-
-static void __init colibri_pxa320_init_uart(void)
-{
- pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_uart_pin_config));
-}
-
void __init colibri_pxa320_init(void)
{
- pxa_set_ffuart_info(NULL);
- pxa_set_btuart_info(NULL);
- pxa_set_stuart_info(NULL);
-
colibri_pxa320_init_eth();
- colibri_pxa320_init_ohci();
colibri_pxa3xx_init_nand();
colibri_pxa320_init_lcd();
colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
colibri_pxa320_init_ac97();
- colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
- mfp_to_gpio(MFP_PIN_GPIO28));
- colibri_pxa320_init_uart();
colibri_pxa320_init_udc();
+
+ /* Evalboard init */
+ pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_evalboard_pin_config));
+ colibri_evalboard_init();
}
MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
.boot_params = COLIBRI_SDRAM_BASE + 0x100,
.init_machine = colibri_pxa320_init,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 199afa2ae303..96b2d9fbfef0 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -64,55 +64,6 @@ void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data)
}
#endif
-#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
-static int mmc_detect_pin;
-
-static int colibri_pxa3xx_mci_init(struct device *dev,
- irq_handler_t colibri_mmc_detect_int,
- void *data)
-{
- int ret;
-
- ret = gpio_request(mmc_detect_pin, "mmc card detect");
- if (ret)
- return ret;
-
- gpio_direction_input(mmc_detect_pin);
- ret = request_irq(gpio_to_irq(mmc_detect_pin), colibri_mmc_detect_int,
- IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- "MMC card detect", data);
- if (ret) {
- gpio_free(mmc_detect_pin);
- return ret;
- }
-
- return 0;
-}
-
-static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
-{
- free_irq(mmc_detect_pin, data);
- gpio_free(gpio_to_irq(mmc_detect_pin));
-}
-
-static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
- .detect_delay_ms = 200,
- .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
- .init = colibri_pxa3xx_mci_init,
- .exit = colibri_pxa3xx_mci_exit,
- .gpio_card_detect = -1,
- .gpio_card_ro = -1,
- .gpio_power = -1,
-};
-
-void __init colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin)
-{
- pxa3xx_mfp_config(pins, len);
- mmc_detect_pin = detect_pin;
- pxa_set_mci_info(&colibri_pxa3xx_mci_platform_data);
-}
-#endif /* CONFIG_MMC_PXA || CONFIG_MMC_PXA_MODULE */
-
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static int lcd_bl_pin;
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 821229acabe6..a5452a3a276d 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -28,6 +28,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <video/w100fb.h>
@@ -48,7 +49,6 @@
#include <mach/irda.h>
#include <mach/mmc.h>
#include <mach/udc.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/corgi.h>
#include <mach/sharpsl_pm.h>
@@ -721,7 +721,7 @@ static void __init fixup_corgi(struct machine_desc *desc,
#ifdef CONFIG_MACH_CORGI
MACHINE_START(CORGI, "SHARP Corgi")
.fixup = fixup_corgi,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.init_machine = corgi_init,
.timer = &pxa_timer,
@@ -731,7 +731,7 @@ MACHINE_END
#ifdef CONFIG_MACH_SHEPHERD
MACHINE_START(SHEPHERD, "SHARP Shepherd")
.fixup = fixup_corgi,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.init_machine = corgi_init,
.timer = &pxa_timer,
@@ -741,7 +741,7 @@ MACHINE_END
#ifdef CONFIG_MACH_HUSKY
MACHINE_START(HUSKY, "SHARP Husky")
.fixup = fixup_corgi,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.init_machine = corgi_init,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 58093d9e07be..6a7aeab42f6c 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -38,8 +38,10 @@
#include <linux/cpufreq.h>
#include <linux/err.h>
#include <linux/regulator/consumer.h>
+#include <linux/io.h>
#include <mach/pxa2xx-regs.h>
+#include <mach/smemc.h>
#ifdef DEBUG
static unsigned int freq_debug;
@@ -242,7 +244,7 @@ static void pxa27x_guess_max_freq(void)
static void init_sdram_rows(void)
{
- uint32_t mdcnfg = MDCNFG;
+ uint32_t mdcnfg = __raw_readl(MDCNFG);
unsigned int drac2 = 0, drac0 = 0;
if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
@@ -331,8 +333,8 @@ static int pxa_set_target(struct cpufreq_policy *policy,
* we need to preset the smaller DRI before the change. If we're
* speeding up we need to set the larger DRI value after the change.
*/
- preset_mdrefr = postset_mdrefr = MDREFR;
- if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
+ preset_mdrefr = postset_mdrefr = __raw_readl(MDREFR);
+ if ((preset_mdrefr & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
preset_mdrefr |= mdrefr_dri(new_freq_mem);
}
@@ -370,7 +372,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
3: nop \n\
"
: "=&r" (unused)
- : "r" (&MDREFR), "r" (cclkcfg),
+ : "r" (MDREFR), "r" (cclkcfg),
"r" (preset_mdrefr), "r" (postset_mdrefr)
: "r4", "r5");
local_irq_restore(flags);
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 57cacaff194d..a305424a967d 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -27,6 +27,7 @@
#include <mach/ohci.h>
#include <mach/pxa2xx-regs.h>
#include <mach/audio.h>
+#include <mach/smemc.h>
#include "generic.h"
#include "devices.h"
@@ -255,9 +256,9 @@ static struct platform_device *devices[] __initdata = {
static void __init csb726_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config));
-/* MSC1 = 0x7ffc3ffc; *//* LAN9215/EXP_CS */
-/* MSC2 = 0x06697ff4; *//* none/SM501 */
- MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */
+/* __raw_writel(0x7ffc3ffc, MSC1); *//* LAN9215/EXP_CS */
+/* __raw_writel(0x06697ff4, MSC2); *//* none/SM501 */
+ __raw_writel((__raw_readl(MSC2) & ~0xffff) | 0x7ff4, MSC2); /* SM501 */
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
@@ -273,7 +274,7 @@ static void __init csb726_init(void)
MACHINE_START(CSB726, "Cogent CSB726")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.init_machine = csb726_init,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index aaa1166df964..4c766e3b4af3 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -3,6 +3,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/pmu.h>
#include <mach/udc.h>
@@ -12,7 +13,6 @@
#include <mach/irda.h>
#include <mach/ohci.h>
#include <plat/pxa27x_keypad.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/camera.h>
#include <mach/audio.h>
#include <mach/hardware.h>
@@ -342,27 +342,6 @@ struct platform_device pxa27x_device_i2c_power = {
};
#endif
-#ifdef CONFIG_PXA3xx
-static struct resource pxa3xx_resources_i2c_power[] = {
- {
- .start = 0x40f500c0,
- .end = 0x40f500d3,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_PWRI2C,
- .end = IRQ_PWRI2C,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device pxa3xx_device_i2c_power = {
- .name = "pxa3xx-pwri2c",
- .id = 1,
- .resource = pxa3xx_resources_i2c_power,
- .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
-};
-#endif
-
static struct resource pxai2s_resources[] = {
{
.start = 0x40400000,
@@ -633,30 +612,35 @@ struct platform_device pxa25x_device_assp = {
#endif /* CONFIG_PXA25x */
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
-
-static struct resource pxa27x_resource_keypad[] = {
+static struct resource pxa27x_resource_camera[] = {
[0] = {
- .start = 0x41500000,
- .end = 0x4150004c,
+ .start = 0x50000000,
+ .end = 0x50000fff,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_KEYPAD,
- .end = IRQ_KEYPAD,
+ .start = IRQ_CAMERA,
+ .end = IRQ_CAMERA,
.flags = IORESOURCE_IRQ,
},
};
-struct platform_device pxa27x_device_keypad = {
- .name = "pxa27x-keypad",
- .id = -1,
- .resource = pxa27x_resource_keypad,
- .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
+static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
+
+static struct platform_device pxa27x_device_camera = {
+ .name = "pxa27x-camera",
+ .id = 0, /* This is used to put cameras on this interface */
+ .dev = {
+ .dma_mask = &pxa27x_dma_mask_camera,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
+ .resource = pxa27x_resource_camera,
};
-void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
+void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
{
- pxa_register_device(&pxa27x_device_keypad, info);
+ pxa_register_device(&pxa27x_device_camera, info);
}
static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
@@ -689,6 +673,33 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
{
pxa_register_device(&pxa27x_device_ohci, info);
}
+#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
+
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+static struct resource pxa27x_resource_keypad[] = {
+ [0] = {
+ .start = 0x41500000,
+ .end = 0x4150004c,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_KEYPAD,
+ .end = IRQ_KEYPAD,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa27x_device_keypad = {
+ .name = "pxa27x-keypad",
+ .id = -1,
+ .resource = pxa27x_resource_keypad,
+ .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
+};
+
+void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
+{
+ pxa_register_device(&pxa27x_device_keypad, info);
+}
static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
@@ -833,79 +844,9 @@ struct platform_device pxa27x_device_pwm1 = {
.resource = pxa27x_resource_pwm1,
.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
};
-
-static struct resource pxa27x_resource_camera[] = {
- [0] = {
- .start = 0x50000000,
- .end = 0x50000fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_CAMERA,
- .end = IRQ_CAMERA,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
-
-static struct platform_device pxa27x_device_camera = {
- .name = "pxa27x-camera",
- .id = 0, /* This is used to put cameras on this interface */
- .dev = {
- .dma_mask = &pxa27x_dma_mask_camera,
- .coherent_dma_mask = 0xffffffff,
- },
- .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
- .resource = pxa27x_resource_camera,
-};
-
-void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
-{
- pxa_register_device(&pxa27x_device_camera, info);
-}
-#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
+#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
#ifdef CONFIG_PXA3xx
-static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
-
-static struct resource pxa3xx_resource_ssp4[] = {
- [0] = {
- .start = 0x41a00000,
- .end = 0x41a0003f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_SSP4,
- .end = IRQ_SSP4,
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* DRCMR for RX */
- .start = 2,
- .end = 2,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- /* DRCMR for TX */
- .start = 3,
- .end = 3,
- .flags = IORESOURCE_DMA,
- },
-};
-
-struct platform_device pxa3xx_device_ssp4 = {
- /* PXA3xx SSP is basically equivalent to PXA27x */
- .name = "pxa27x-ssp",
- .id = 3,
- .dev = {
- .dma_mask = &pxa3xx_ssp4_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = pxa3xx_resource_ssp4,
- .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
-};
-
static struct resource pxa3xx_resources_mci2[] = {
[0] = {
.start = 0x42000000,
@@ -984,6 +925,54 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
pxa_register_device(&pxa3xx_device_mci3, info);
}
+static struct resource pxa3xx_resources_gcu[] = {
+ {
+ .start = 0x54000000,
+ .end = 0x54000fff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_GCU,
+ .end = IRQ_GCU,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device pxa3xx_device_gcu = {
+ .name = "pxa3xx-gcu",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
+ .resource = pxa3xx_resources_gcu,
+ .dev = {
+ .dma_mask = &pxa3xx_gcu_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
+#endif /* CONFIG_PXA3xx */
+
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+static struct resource pxa3xx_resources_i2c_power[] = {
+ {
+ .start = 0x40f500c0,
+ .end = 0x40f500d3,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = IRQ_PWRI2C,
+ .end = IRQ_PWRI2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa3xx_device_i2c_power = {
+ .name = "pxa3xx-pwri2c",
+ .id = 1,
+ .resource = pxa3xx_resources_i2c_power,
+ .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
+};
+
static struct resource pxa3xx_resources_nand[] = {
[0] = {
.start = 0x43100000,
@@ -1027,33 +1016,45 @@ void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
pxa_register_device(&pxa3xx_device_nand, info);
}
-static struct resource pxa3xx_resources_gcu[] = {
- {
- .start = 0x54000000,
- .end = 0x54000fff,
+static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource pxa3xx_resource_ssp4[] = {
+ [0] = {
+ .start = 0x41a00000,
+ .end = 0x41a0003f,
.flags = IORESOURCE_MEM,
},
- {
- .start = IRQ_GCU,
- .end = IRQ_GCU,
+ [1] = {
+ .start = IRQ_SSP4,
+ .end = IRQ_SSP4,
.flags = IORESOURCE_IRQ,
},
+ [2] = {
+ /* DRCMR for RX */
+ .start = 2,
+ .end = 2,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ /* DRCMR for TX */
+ .start = 3,
+ .end = 3,
+ .flags = IORESOURCE_DMA,
+ },
};
-static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device pxa3xx_device_gcu = {
- .name = "pxa3xx-gcu",
- .id = -1,
- .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
- .resource = pxa3xx_resources_gcu,
+struct platform_device pxa3xx_device_ssp4 = {
+ /* PXA3xx SSP is basically equivalent to PXA27x */
+ .name = "pxa27x-ssp",
+ .id = 3,
.dev = {
- .dma_mask = &pxa3xx_gcu_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .dma_mask = &pxa3xx_ssp4_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
+ .resource = pxa3xx_resource_ssp4,
+ .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
};
-
-#endif /* CONFIG_PXA3xx */
+#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
* See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index ed0dbfdb22ed..a78bb3097739 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -26,6 +26,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/tdo24m.h>
#include <linux/spi/libertas_spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/power_supply.h>
#include <linux/apm-emulation.h>
#include <linux/i2c.h>
@@ -46,7 +47,6 @@
#include <plat/pxa27x_keypad.h>
#include <plat/i2c.h>
#include <mach/camera.h>
-#include <mach/pxa2xx_spi.h>
#include "generic.h"
#include "devices.h"
@@ -1300,7 +1300,7 @@ static void __init em_x270_init(void)
MACHINE_START(EM_X270, "Compulab EM-X270")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = em_x270_init,
@@ -1308,7 +1308,7 @@ MACHINE_END
MACHINE_START(EXEDA, "Compulab eXeda")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = em_x270_init,
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index b25690ccadc4..edca0a043293 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -181,7 +181,7 @@ static void __init e330_init(void)
MACHINE_START(E330, "Toshiba e330")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = ESERIES_NR_IRQS,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
@@ -230,7 +230,7 @@ static void __init e350_init(void)
MACHINE_START(E350, "Toshiba e350")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = ESERIES_NR_IRQS,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
@@ -352,7 +352,7 @@ static void __init e400_init(void)
MACHINE_START(E400, "Toshiba e400")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = ESERIES_NR_IRQS,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
@@ -540,7 +540,7 @@ static void __init e740_init(void)
MACHINE_START(E740, "Toshiba e740")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = ESERIES_NR_IRQS,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
@@ -731,7 +731,7 @@ static void __init e750_init(void)
MACHINE_START(E750, "Toshiba e750")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = ESERIES_NR_IRQS,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
@@ -926,7 +926,7 @@ static void __init e800_init(void)
MACHINE_START(E800, "Toshiba e800")
/* Maintainer: Ian Molton (spyro@f2s.com) */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = ESERIES_NR_IRQS,
.init_irq = pxa25x_init_irq,
.fixup = eseries_fixup,
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 142c711f4cda..87cec0abe5b0 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -798,7 +798,7 @@ static void __init a780_init(void)
MACHINE_START(EZX_A780, "Motorola EZX A780")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = EZX_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
@@ -863,7 +863,7 @@ static void __init e680_init(void)
MACHINE_START(EZX_E680, "Motorola EZX E680")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = EZX_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
@@ -928,7 +928,7 @@ static void __init a1200_init(void)
MACHINE_START(EZX_A1200, "Motorola EZX A1200")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = EZX_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
@@ -1118,7 +1118,7 @@ static void __init a910_init(void)
MACHINE_START(EZX_A910, "Motorola EZX A910")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = EZX_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
@@ -1183,7 +1183,7 @@ static void __init e6_init(void)
MACHINE_START(EZX_E6, "Motorola EZX E6")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = EZX_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
@@ -1222,7 +1222,7 @@ static void __init e2_init(void)
MACHINE_START(EZX_E2, "Motorola EZX E2")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = EZX_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 6451e9c3a93f..f5d91efc2965 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -22,12 +22,13 @@
#include <mach/hardware.h>
#include <asm/system.h>
-#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>
#include <mach/reset.h>
#include <mach/gpio.h>
+#include <mach/smemc.h>
+#include <mach/pxa3xx-regs.h>
#include "generic.h"
@@ -35,9 +36,10 @@ void clear_reset_status(unsigned int mask)
{
if (cpu_is_pxa2xx())
pxa2xx_clear_reset_status(mask);
-
- if (cpu_is_pxa3xx())
- pxa3xx_clear_reset_status(mask);
+ else {
+ /* RESET_STATUS_* has a 1:1 mapping with ARSR */
+ ARSR = mask;
+ }
}
unsigned long get_clock_tick_rate(void)
@@ -71,47 +73,17 @@ unsigned int get_clk_frequency_khz(int info)
EXPORT_SYMBOL(get_clk_frequency_khz);
/*
- * Return the current memory clock frequency in units of 10kHz
- */
-unsigned int get_memclk_frequency_10khz(void)
-{
- if (cpu_is_pxa25x())
- return pxa25x_get_memclk_frequency_10khz();
- else if (cpu_is_pxa27x())
- return pxa27x_get_memclk_frequency_10khz();
- return 0;
-}
-EXPORT_SYMBOL(get_memclk_frequency_10khz);
-
-/*
* Intel PXA2xx internal register mapping.
*
- * Note 1: not all PXA2xx variants implement all those addresses.
- *
- * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
- * and cache flush area.
+ * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
+ * and cache flush area.
*/
-static struct map_desc standard_io_desc[] __initdata = {
+static struct map_desc common_io_desc[] __initdata = {
{ /* Devs */
.virtual = 0xf2000000,
.pfn = __phys_to_pfn(0x40000000),
.length = 0x02000000,
.type = MT_DEVICE
- }, { /* Mem Ctl */
- .virtual = 0xf6000000,
- .pfn = __phys_to_pfn(0x48000000),
- .length = 0x00200000,
- .type = MT_DEVICE
- }, { /* Camera */
- .virtual = 0xfa000000,
- .pfn = __phys_to_pfn(0x50000000),
- .length = 0x00100000,
- .type = MT_DEVICE
- }, { /* IMem ctl */
- .virtual = 0xfe000000,
- .pfn = __phys_to_pfn(0x58000000),
- .length = 0x00100000,
- .type = MT_DEVICE
}, { /* UNCACHED_PHYS_0 */
.virtual = 0xff000000,
.pfn = __phys_to_pfn(0x00000000),
@@ -122,6 +94,5 @@ static struct map_desc standard_io_desc[] __initdata = {
void __init pxa_map_io(void)
{
- iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
- get_clk_frequency_khz(1);
+ iotable_init(ARRAY_AND_SIZE(common_io_desc));
}
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 4b1ad2769ed7..a079d8baa45a 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -9,18 +9,25 @@
* published by the Free Software Foundation.
*/
+struct irq_data;
struct sys_timer;
extern struct sys_timer pxa_timer;
extern void __init pxa_init_irq(int irq_nr,
- int (*set_wake)(unsigned int, unsigned int));
+ int (*set_wake)(struct irq_data *,
+ unsigned int));
extern void __init pxa25x_init_irq(void);
#ifdef CONFIG_CPU_PXA26x
extern void __init pxa26x_init_irq(void);
#endif
extern void __init pxa27x_init_irq(void);
extern void __init pxa3xx_init_irq(void);
+extern void __init pxa95x_init_irq(void);
+
extern void __init pxa_map_io(void);
+extern void __init pxa25x_map_io(void);
+extern void __init pxa27x_map_io(void);
+extern void __init pxa3xx_map_io(void);
extern unsigned int get_clk_frequency_khz(int info);
@@ -32,18 +39,14 @@ extern unsigned int get_clk_frequency_khz(int info);
#ifdef CONFIG_PXA25x
extern unsigned pxa25x_get_clk_frequency_khz(int);
-extern unsigned pxa25x_get_memclk_frequency_10khz(void);
#else
#define pxa25x_get_clk_frequency_khz(x) (0)
-#define pxa25x_get_memclk_frequency_10khz() (0)
#endif
#ifdef CONFIG_PXA27x
extern unsigned pxa27x_get_clk_frequency_khz(int);
-extern unsigned pxa27x_get_memclk_frequency_10khz(void);
#else
#define pxa27x_get_clk_frequency_khz(x) (0)
-#define pxa27x_get_memclk_frequency_10khz() (0)
#endif
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
@@ -54,10 +57,8 @@ static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
#ifdef CONFIG_PXA3xx
extern unsigned pxa3xx_get_clk_frequency_khz(int);
-extern void pxa3xx_clear_reset_status(unsigned int);
#else
#define pxa3xx_get_clk_frequency_khz(x) (0)
-static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
#endif
extern struct sysdev_class pxa_irq_sysclass;
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 1e2a9a13aec1..6fd319ea5284 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -225,7 +225,7 @@ static void __init gumstix_init(void)
MACHINE_START(GUMSTIX, "Gumstix")
.boot_params = 0xa0000100, /* match u-boot bi_boot_params */
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
.init_machine = gumstix_init,
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index 7057a1f46db4..657db469de1f 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -32,6 +32,7 @@
#include <mach/pxa25x.h>
#include <mach/h5000.h>
#include <mach/udc.h>
+#include <mach/smemc.h>
#include "generic.h"
@@ -172,11 +173,11 @@ static unsigned long h5000_pin_config[] __initdata = {
static void fix_msc(void)
{
- MSC0 = 0x129c24f2;
- MSC1 = 0x7ff424fa;
- MSC2 = 0x7ff47ff4;
+ __raw_writel(0x129c24f2, MSC0);
+ __raw_writel(0x7ff424fa, MSC1);
+ __raw_writel(0x7ff47ff4, MSC2);
- MDREFR |= 0x02080000;
+ __raw_writel(__raw_readl(MDREFR) | 0x02080000, MDREFR);
}
/*
@@ -202,7 +203,7 @@ static void __init h5000_init(void)
MACHINE_START(H5400, "HP iPAQ H5000")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
.init_machine = h5000_init,
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index 01b7f07ebad2..e8603eba54bd 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -160,7 +160,7 @@ static void __init himalaya_init(void)
MACHINE_START(HIMALAYA, "HTC Himalaya")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.init_machine = himalaya_init,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 76d93a25bab6..a908e0a5f396 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -33,6 +33,7 @@
#include <linux/regulator/max1586.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/usb/gpio_vbus.h>
#include <mach/hardware.h>
@@ -43,7 +44,6 @@
#include <mach/hx4700.h>
#include <plat/i2c.h>
#include <mach/irda.h>
-#include <mach/pxa2xx_spi.h>
#include <video/platform_lcd.h>
#include <video/w100fb.h>
@@ -871,7 +871,7 @@ static void __init hx4700_init(void)
MACHINE_START(H4700, "HP iPAQ HX4700")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = HX4700_NR_IRQS,
.init_irq = pxa27x_init_irq,
.init_machine = hx4700_init,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index d51ee3d25e70..6cedc81da3bc 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -24,7 +24,7 @@
#include <mach/mxm8x10.h>
#include <linux/spi/spi.h>
-#include <mach/pxa2xx_spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/can/platform/mcp251x.h>
#include "generic.h"
@@ -192,7 +192,7 @@ static void __init icontrol_init(void)
MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
.init_machine = icontrol_init
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index e773dceeabc6..dd40e4a9291c 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -187,7 +187,7 @@ static struct map_desc idp_io_desc[] __initdata = {
static void __init idp_map_io(void)
{
- pxa_map_io();
+ pxa25x_map_io();
iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
}
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
new file mode 100644
index 000000000000..f4c03659168c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -0,0 +1,48 @@
+#ifndef __ASM_MACH_ADDR_MAP_H
+#define __ASM_MACH_ADDR_MAP_H
+
+/*
+ * Chip Selects
+ */
+#define PXA_CS0_PHYS 0x00000000
+#define PXA_CS1_PHYS 0x04000000
+#define PXA_CS2_PHYS 0x08000000
+#define PXA_CS3_PHYS 0x0C000000
+#define PXA_CS4_PHYS 0x10000000
+#define PXA_CS5_PHYS 0x14000000
+
+#define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
+#define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
+#define PXA3xx_CS2_PHYS 0x10000000
+#define PXA3xx_CS3_PHYS 0x14000000
+
+/*
+ * Peripheral Bus
+ */
+#define PERIPH_PHYS 0x40000000
+#define PERIPH_VIRT 0xf2000000
+#define PERIPH_SIZE 0x02000000
+
+/*
+ * Static Memory Controller (w/ SDRAM controls on PXA25x/PXA27x)
+ */
+#define PXA2XX_SMEMC_PHYS 0x48000000
+#define PXA3XX_SMEMC_PHYS 0x4a000000
+#define SMEMC_VIRT 0xf6000000
+#define SMEMC_SIZE 0x00100000
+
+/*
+ * Dynamic Memory Controller (only on PXA3xx)
+ */
+#define DMEMC_PHYS 0x48100000
+#define DMEMC_VIRT 0xf6100000
+#define DMEMC_SIZE 0x00100000
+
+/*
+ * Internal Memory Controller (PXA27x and later)
+ */
+#define IMEMC_PHYS 0x58000000
+#define IMEMC_VIRT 0xfe000000
+#define IMEMC_SIZE 0x00100000
+
+#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 561562b4360b..7074e76146c9 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -26,6 +26,8 @@ enum balloon3_features {
#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */
#define BALLOON3_FPGA_LENGTH 0x01000000
+#define BALLOON3_FPGA_SETnCLR (0x1000)
+
/* FPGA / CPLD registers for CF socket */
#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
@@ -35,7 +37,7 @@ enum balloon3_features {
#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
-#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
+#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
/* fpga/cpld interrupt control register */
@@ -174,7 +176,7 @@ enum balloon3_features {
#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
-#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 4)
+#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
extern int balloon3_has(enum balloon3_features feature);
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 58dada11054f..388a96f1ef93 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -9,14 +9,14 @@
*/
enum {
- COLIBRI_PXA270_EVALBOARD = 0,
+ COLIBRI_EVALBOARD = 0,
COLIBRI_PXA270_INCOME,
};
-#if defined(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD)
-extern void colibri_pxa270_evalboard_init(void);
+#if defined(CONFIG_MACH_COLIBRI_EVALBOARD)
+extern void colibri_evalboard_init(void);
#else
-static inline void colibri_pxa270_evalboard_init(void) {}
+static inline void colibri_evalboard_init(void) {}
#endif
#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME)
@@ -59,5 +59,11 @@ static inline void colibri_pxa3xx_init_nand(void) {}
#define GPIO0_COLIBRI_PXA270_SD_DETECT 0
#define GPIO113_COLIBRI_PXA270_TS_IRQ 113
+/* GPIO definitions for Colibri PXA300/310 */
+#define GPIO39_COLIBRI_PXA300_SD_DETECT 39
+
+/* GPIO definitions for Colibri PXA320 */
+#define GPIO28_COLIBRI_PXA320_SD_DETECT 28
+
#endif /* _COLIBRI_H_ */
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 814f1458a06a..6957ba56025b 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -13,6 +13,8 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
+#include <mach/addr-map.h>
+
/*
* Workarounds for at least 2 errata so far require this.
* The mapping is set in mach-pxa/generic.c.
@@ -193,14 +195,15 @@
#define __cpu_is_pxa935(id) (0)
#endif
-#ifdef CONFIG_CPU_PXA950
-#define __cpu_is_pxa950(id) \
- ({ \
+#ifdef CONFIG_CPU_PXA955
+#define __cpu_is_pxa955(id) \
+ ({ \
unsigned int _id = (id) >> 4 & 0xfff; \
- _id == 0x697; \
- })
+ _id == 0x581 || _id == 0xc08 \
+ || _id == 0xb76; \
+ })
#else
-#define __cpu_is_pxa950(id) (0)
+#define __cpu_is_pxa955(id) (0)
#endif
#define cpu_is_pxa210() \
@@ -253,16 +256,15 @@
__cpu_is_pxa935(read_cpuid_id()); \
})
-#define cpu_is_pxa950() \
+#define cpu_is_pxa955() \
({ \
- __cpu_is_pxa950(read_cpuid_id()); \
- })
+ __cpu_is_pxa955(read_cpuid_id()); \
+ })
/*
* CPUID Core Generation Bit
* <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
- * == 0x3 for pxa300/pxa310/pxa320
*/
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
#define __cpu_is_pxa2xx(id) \
@@ -277,8 +279,10 @@
#ifdef CONFIG_PXA3xx
#define __cpu_is_pxa3xx(id) \
({ \
- unsigned int _id = (id) >> 13 & 0x7; \
- _id == 0x3; \
+ __cpu_is_pxa300(id) \
+ || __cpu_is_pxa310(id) \
+ || __cpu_is_pxa320(id) \
+ || __cpu_is_pxa93x(id); \
})
#else
#define __cpu_is_pxa3xx(id) (0)
@@ -287,13 +291,22 @@
#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935)
#define __cpu_is_pxa93x(id) \
({ \
- unsigned int _id = (id) >> 4 & 0xfff; \
- _id == 0x683 || _id == 0x693; \
+ __cpu_is_pxa930(id) \
+ || __cpu_is_pxa935(id); \
})
#else
#define __cpu_is_pxa93x(id) (0)
#endif
+#ifdef CONFIG_PXA95x
+#define __cpu_is_pxa95x(id) \
+ ({ \
+ __cpu_is_pxa955(id); \
+ })
+#else
+#define __cpu_is_pxa95x(id) (0)
+#endif
+
#define cpu_is_pxa2xx() \
({ \
__cpu_is_pxa2xx(read_cpuid_id()); \
@@ -308,6 +321,12 @@
({ \
__cpu_is_pxa93x(read_cpuid_id()); \
})
+
+#define cpu_is_pxa95x() \
+ ({ \
+ __cpu_is_pxa95x(read_cpuid_id()); \
+ })
+
/*
* return current memory and LCD clock frequency in units of 10kHz
*/
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index d372caa75dc7..a4285fc00878 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -21,16 +21,14 @@
#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
-#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */
-#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */
+#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI,PXA27x) */
+#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */
#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */
-#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */
+#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt (PXA27x) */
+#define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */
#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */
-#endif
-
#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */
#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */
@@ -38,7 +36,8 @@
#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
#define IRQ_USB PXA_IRQ(11) /* USB Service */
#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */
-#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */
+#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt (PXA27x) */
+#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request (PXA3xx) */
#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */
#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */
#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */
@@ -47,6 +46,7 @@
#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */
#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */
#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */
+#define IRQ_ACIPC2 PXA_IRQ(19) /* AP-CP Communication (PXA930) */
#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */
#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */
#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/
@@ -60,19 +60,17 @@
#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
-#endif
-
-#ifdef CONFIG_PXA3xx
-#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */
#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
+#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
-#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller */
+#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller (PXA3xx) */
+#define IRQ_ACIPC1 PXA_IRQ(40) /* AP-CP Communication (PXA930) */
#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
+#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball (PXA930) */
#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
@@ -80,30 +78,14 @@
#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
-#endif
-#ifdef CONFIG_CPU_PXA935
#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */
#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */
-
-#define IRQ_MMC3_PXA935 PXA_IRQ(72) /* MMC3 Controller (PXA935) */
-#define IRQ_MMC4_PXA935 PXA_IRQ(73) /* MMC4 Controller (PXA935) */
-#define IRQ_MMC5_PXA935 PXA_IRQ(74) /* MMC5 Controller (PXA935) */
-
+#define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */
+#define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */
+#define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */
+#define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */
#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
-#endif
-
-#ifdef CONFIG_CPU_PXA930
-#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
-#define IRQ_ACIPC0 PXA_IRQ(5)
-#define IRQ_ACIPC1 PXA_IRQ(40)
-#define IRQ_ACIPC2 PXA_IRQ(19)
-#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball */
-#endif
-
-#ifdef CONFIG_CPU_PXA950
-#define IRQ_GC500 PXA_IRQ(70) /* Graphics Controller (PXA950) */
-#endif
#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
#define PXA_GPIO_IRQ_NUM (192)
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 4fcddd9cab76..ee6ced1cea7f 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -17,72 +17,6 @@
#include <mach/hardware.h>
/*
- * PXA Chip selects
- */
-
-#define PXA_CS0_PHYS 0x00000000
-#define PXA_CS1_PHYS 0x04000000
-#define PXA_CS2_PHYS 0x08000000
-#define PXA_CS3_PHYS 0x0C000000
-#define PXA_CS4_PHYS 0x10000000
-#define PXA_CS5_PHYS 0x14000000
-
-/*
- * Memory controller
- */
-
-#define MDCNFG __REG(0x48000000) /* SDRAM Configuration Register 0 */
-#define MDREFR __REG(0x48000004) /* SDRAM Refresh Control Register */
-#define MSC0 __REG(0x48000008) /* Static Memory Control Register 0 */
-#define MSC1 __REG(0x4800000C) /* Static Memory Control Register 1 */
-#define MSC2 __REG(0x48000010) /* Static Memory Control Register 2 */
-#define MECR __REG(0x48000014) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
-#define SXLCR __REG(0x48000018) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
-#define SXCNFG __REG(0x4800001C) /* Synchronous Static Memory Control Register */
-#define SXMRS __REG(0x48000024) /* MRS value to be written to Synchronous Flash or SMROM */
-#define MCMEM0 __REG(0x48000028) /* Card interface Common Memory Space Socket 0 Timing */
-#define MCMEM1 __REG(0x4800002C) /* Card interface Common Memory Space Socket 1 Timing */
-#define MCATT0 __REG(0x48000030) /* Card interface Attribute Space Socket 0 Timing Configuration */
-#define MCATT1 __REG(0x48000034) /* Card interface Attribute Space Socket 1 Timing Configuration */
-#define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */
-#define MCIO1 __REG(0x4800003C) /* Card interface I/O Space Socket 1 Timing Configuration */
-#define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */
-#define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
-
-/*
- * More handy macros for PCMCIA
- *
- * Arg is socket number
- */
-#define MCMEM(s) __REG2(0x48000028, (s)<<2 ) /* Card interface Common Memory Space Socket s Timing */
-#define MCATT(s) __REG2(0x48000030, (s)<<2 ) /* Card interface Attribute Space Socket s Timing Configuration */
-#define MCIO(s) __REG2(0x48000038, (s)<<2 ) /* Card interface I/O Space Socket s Timing Configuration */
-
-/* MECR register defines */
-#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
-#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
-
-#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
-#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
-#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
-#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
-
-#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
-#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
-#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
-#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
-#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
-#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
-#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
-#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
-#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
-#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
-#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
-#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
-#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
-#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
-
-/*
* Power Manager
*/
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h b/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
deleted file mode 100644
index b87cecd9bbdc..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef PXA2XX_SPI_H_
-#define PXA2XX_SPI_H_
-
-#define PXA2XX_CS_ASSERT (0x01)
-#define PXA2XX_CS_DEASSERT (0x02)
-
-/* device.platform_data for SSP controller devices */
-struct pxa2xx_spi_master {
- u32 clock_enable;
- u16 num_chipselect;
- u8 enable_dma;
-};
-
-/* spi_board_info.controller_data for SPI slave devices,
- * copied to spi_device.platform_data ... mostly for dma tuning
- */
-struct pxa2xx_spi_chip {
- u8 tx_threshold;
- u8 rx_threshold;
- u8 dma_burst_size;
- u32 timeout;
- u8 enable_loopback;
- int gpio_cs;
- void (*cs_control)(u32 command);
-};
-
-extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
-
-#endif /*PXA2XX_SPI_H_*/
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index e91d63cfe811..e4fb4668c26e 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -16,15 +16,6 @@
#include <mach/hardware.h>
/*
- * Static Chip Selects
- */
-
-#define PXA300_CS0_PHYS (0x00000000) /* PXA300/PXA310 _only_ */
-#define PXA300_CS1_PHYS (0x30000000) /* PXA300/PXA310 _only_ */
-#define PXA3xx_CS2_PHYS (0x10000000)
-#define PXA3xx_CS3_PHYS (0x14000000)
-
-/*
* Oscillator Configuration Register (OSCC)
*/
#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h
index 68464ce1c1ea..662288eb6f95 100644
--- a/arch/arm/mach-pxa/include/mach/regs-intc.h
+++ b/arch/arm/mach-pxa/include/mach/regs-intc.h
@@ -27,8 +27,4 @@
#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */
#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */
-#define IPR(x) __REG(0x40D0001C + (x < 32 ? (x << 2) \
- : (x < 64 ? (0x94 + ((x - 32) << 2)) \
- : (0x128 + ((x - 64) << 2)))))
-
#endif /* __ASM_MACH_REGS_INTC_H */
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h
new file mode 100644
index 000000000000..654adc90c9a0
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/smemc.h
@@ -0,0 +1,74 @@
+/*
+ * Static memory controller register definitions for PXA CPUs
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __SMEMC_REGS_H
+#define __SMEMC_REGS_H
+
+#define PXA2XX_SMEMC_BASE 0x48000000
+#define PXA3XX_SMEMC_BASE 0x4a000000
+#define SMEMC_VIRT 0xf6000000
+
+#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
+#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
+#define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */
+#define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */
+#define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */
+#define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
+#define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
+#define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */
+#define SXMRS (SMEMC_VIRT + 0x24) /* MRS value to be written to Synchronous Flash or SMROM */
+#define MCMEM0 (SMEMC_VIRT + 0x28) /* Card interface Common Memory Space Socket 0 Timing */
+#define MCMEM1 (SMEMC_VIRT + 0x2C) /* Card interface Common Memory Space Socket 1 Timing */
+#define MCATT0 (SMEMC_VIRT + 0x30) /* Card interface Attribute Space Socket 0 Timing Configuration */
+#define MCATT1 (SMEMC_VIRT + 0x34) /* Card interface Attribute Space Socket 1 Timing Configuration */
+#define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */
+#define MCIO1 (SMEMC_VIRT + 0x3C) /* Card interface I/O Space Socket 1 Timing Configuration */
+#define MDMRS (SMEMC_VIRT + 0x40) /* MRS value to be written to SDRAM */
+#define BOOT_DEF (SMEMC_VIRT + 0x44) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
+#define MEMCLKCFG (SMEMC_VIRT + 0x68) /* Clock Configuration */
+#define CSADRCFG0 (SMEMC_VIRT + 0x80) /* Address Configuration Register for CS0 */
+#define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */
+#define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */
+#define CSADRCFG3 (SMEMC_VIRT + 0x8C) /* Address Configuration Register for CS3 */
+
+/*
+ * More handy macros for PCMCIA
+ *
+ * Arg is socket number
+ */
+#define MCMEM(s) (SMEMC_VIRT + 0x28 + ((s)<<2)) /* Card interface Common Memory Space Socket s Timing */
+#define MCATT(s) (SMEMC_VIRT + 0x30 + ((s)<<2)) /* Card interface Attribute Space Socket s Timing Configuration */
+#define MCIO(s) (SMEMC_VIRT + 0x38 + ((s)<<2)) /* Card interface I/O Space Socket s Timing Configuration */
+
+/* MECR register defines */
+#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
+#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
+
+#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
+#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
+#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
+#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
+
+#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
+#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
+#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
+#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
+#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
+#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
+#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
+#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
+#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
+#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
+#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
+#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
+#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
+#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
+
+#endif
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 1beb40f692fc..2693e3c3776f 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -16,20 +16,31 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
+#include <linux/irq.h>
#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
+#include <mach/irqs.h>
#include <mach/gpio.h>
-#include <mach/regs-intc.h>
#include "generic.h"
-#define MAX_INTERNAL_IRQS 128
+#define IRQ_BASE (void __iomem *)io_p2v(0x40d00000)
+
+#define ICIP (0x000)
+#define ICMR (0x004)
+#define ICLR (0x008)
+#define ICFR (0x00c)
+#define ICPR (0x010)
+#define ICCR (0x014)
+#define ICHP (0x018)
+#define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \
+ ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
+ (0x144 + (((i) - 64) << 2)))
+#define IPR_VALID (1 << 31)
+#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
-#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
-#define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
-#define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
+#define MAX_INTERNAL_IRQS 128
/*
* This is for peripheral IRQs internal to the PXA chip.
@@ -37,29 +48,53 @@
static int pxa_internal_irq_nr;
-static void pxa_mask_irq(unsigned int irq)
+static inline int cpu_has_ipr(void)
+{
+ return !cpu_is_pxa25x();
+}
+
+static inline void __iomem *irq_base(int i)
+{
+ static unsigned long phys_base[] = {
+ 0x40d00000,
+ 0x40d0009c,
+ 0x40d00130,
+ };
+
+ return (void __iomem *)io_p2v(phys_base[i]);
+}
+
+static void pxa_mask_irq(struct irq_data *d)
{
- _ICMR(irq) &= ~(1 << IRQ_BIT(irq));
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ uint32_t icmr = __raw_readl(base + ICMR);
+
+ icmr &= ~(1 << IRQ_BIT(d->irq));
+ __raw_writel(icmr, base + ICMR);
}
-static void pxa_unmask_irq(unsigned int irq)
+static void pxa_unmask_irq(struct irq_data *d)
{
- _ICMR(irq) |= 1 << IRQ_BIT(irq);
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ uint32_t icmr = __raw_readl(base + ICMR);
+
+ icmr |= 1 << IRQ_BIT(d->irq);
+ __raw_writel(icmr, base + ICMR);
}
static struct irq_chip pxa_internal_irq_chip = {
.name = "SC",
- .ack = pxa_mask_irq,
- .mask = pxa_mask_irq,
- .unmask = pxa_unmask_irq,
+ .irq_ack = pxa_mask_irq,
+ .irq_mask = pxa_mask_irq,
+ .irq_unmask = pxa_unmask_irq,
};
/*
* GPIO IRQs for GPIO 0 and 1
*/
-static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
+static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
{
- int gpio = irq - IRQ_GPIO0;
+ int gpio = d->irq - IRQ_GPIO0;
if (__gpio_is_occupied(gpio)) {
pr_err("%s failed: GPIO is configured\n", __func__);
@@ -79,27 +114,17 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
return 0;
}
-static void pxa_ack_low_gpio(unsigned int irq)
-{
- GEDR0 = (1 << (irq - IRQ_GPIO0));
-}
-
-static void pxa_mask_low_gpio(unsigned int irq)
+static void pxa_ack_low_gpio(struct irq_data *d)
{
- ICMR &= ~(1 << (irq - PXA_IRQ(0)));
-}
-
-static void pxa_unmask_low_gpio(unsigned int irq)
-{
- ICMR |= 1 << (irq - PXA_IRQ(0));
+ GEDR0 = (1 << (d->irq - IRQ_GPIO0));
}
static struct irq_chip pxa_low_gpio_chip = {
.name = "GPIO-l",
- .ack = pxa_ack_low_gpio,
- .mask = pxa_mask_low_gpio,
- .unmask = pxa_unmask_low_gpio,
- .set_type = pxa_set_low_gpio_type,
+ .irq_ack = pxa_ack_low_gpio,
+ .irq_mask = pxa_mask_irq,
+ .irq_unmask = pxa_unmask_irq,
+ .irq_set_type = pxa_set_low_gpio_type,
};
static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@@ -113,42 +138,44 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
set_irq_chip(irq, &pxa_low_gpio_chip);
+ set_irq_chip_data(irq, irq_base(0));
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID);
}
- pxa_low_gpio_chip.set_wake = fn;
+ pxa_low_gpio_chip.irq_set_wake = fn;
}
void __init pxa_init_irq(int irq_nr, set_wake_t fn)
{
- int irq, i;
+ int irq, i, n;
BUG_ON(irq_nr > MAX_INTERNAL_IRQS);
pxa_internal_irq_nr = irq_nr;
- for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
- _ICMR(irq) = 0; /* disable all IRQs */
- _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */
- }
-
- /* initialize interrupt priority */
- if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
- for (i = 0; i < irq_nr; i++)
- IPR(i) = i | (1 << 31);
+ for (n = 0; n < irq_nr; n += 32) {
+ void __iomem *base = irq_base(n >> 5);
+
+ __raw_writel(0, base + ICMR); /* disable all IRQs */
+ __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */
+ for (i = n; (i < (n + 32)) && (i < irq_nr); i++) {
+ /* initialize interrupt priority */
+ if (cpu_has_ipr())
+ __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i));
+
+ irq = PXA_IRQ(i);
+ set_irq_chip(irq, &pxa_internal_irq_chip);
+ set_irq_chip_data(irq, base);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
}
/* only unmasked interrupts kick us out of idle */
- ICCR = 1;
+ __raw_writel(1, irq_base(0) + ICCR);
- for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) {
- set_irq_chip(irq, &pxa_internal_irq_chip);
- set_irq_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
-
- pxa_internal_irq_chip.set_wake = fn;
+ pxa_internal_irq_chip.irq_set_wake = fn;
pxa_init_low_gpio_irq(fn);
}
@@ -158,16 +185,18 @@ static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
{
- int i, irq = PXA_IRQ(0);
+ int i;
+
+ for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+ void __iomem *base = irq_base(i);
- for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) {
- saved_icmr[i] = _ICMR(irq);
- _ICMR(irq) = 0;
+ saved_icmr[i] = __raw_readl(base + ICMR);
+ __raw_writel(0, base + ICMR);
}
- if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
+ if (cpu_has_ipr()) {
for (i = 0; i < pxa_internal_irq_nr; i++)
- saved_ipr[i] = IPR(i);
+ saved_ipr[i] = __raw_readl(IRQ_BASE + IPR(i));
}
return 0;
@@ -175,19 +204,20 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
static int pxa_irq_resume(struct sys_device *dev)
{
- int i, irq = PXA_IRQ(0);
+ int i;
- if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
- for (i = 0; i < pxa_internal_irq_nr; i++)
- IPR(i) = saved_ipr[i];
- }
+ for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
+ void __iomem *base = irq_base(i);
- for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) {
- _ICMR(irq) = saved_icmr[i];
- _ICLR(irq) = 0;
+ __raw_writel(saved_icmr[i], base + ICMR);
+ __raw_writel(0, base + ICLR);
}
- ICCR = 1;
+ if (cpu_has_ipr())
+ for (i = 0; i < pxa_internal_irq_nr; i++)
+ __raw_writel(saved_ipr[i], IRQ_BASE + IPR(i));
+
+ __raw_writel(1, IRQ_BASE + ICCR);
return 0;
}
#else
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 41aa89e35772..ccb7bfad17ca 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -22,6 +22,7 @@
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/smc91x.h>
#include <linux/i2c.h>
#include <linux/leds.h>
@@ -42,7 +43,6 @@
#include <mach/pxa300.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
-#include <mach/pxa2xx_spi.h>
#include <plat/pxa27x_keypad.h>
#include <mach/littleton.h>
#include <plat/i2c.h>
@@ -438,7 +438,7 @@ static void __init littleton_init(void)
MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.nr_irqs = LITTLETON_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 623af0232a54..c9a3e775c2de 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -46,6 +46,7 @@
#include <mach/mmc.h>
#include <mach/irda.h>
#include <mach/ohci.h>
+#include <mach/smemc.h>
#include "generic.h"
#include "devices.h"
@@ -94,9 +95,9 @@ static unsigned long lpd270_pin_config[] __initdata = {
static unsigned int lpd270_irq_enabled;
-static void lpd270_mask_irq(unsigned int irq)
+static void lpd270_mask_irq(struct irq_data *d)
{
- int lpd270_irq = irq - LPD270_IRQ(0);
+ int lpd270_irq = d->irq - LPD270_IRQ(0);
__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
@@ -104,9 +105,9 @@ static void lpd270_mask_irq(unsigned int irq)
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
}
-static void lpd270_unmask_irq(unsigned int irq)
+static void lpd270_unmask_irq(struct irq_data *d)
{
- int lpd270_irq = irq - LPD270_IRQ(0);
+ int lpd270_irq = d->irq - LPD270_IRQ(0);
lpd270_irq_enabled |= 1 << lpd270_irq;
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
@@ -114,9 +115,9 @@ static void lpd270_unmask_irq(unsigned int irq)
static struct irq_chip lpd270_irq_chip = {
.name = "CPLD",
- .ack = lpd270_mask_irq,
- .mask = lpd270_mask_irq,
- .unmask = lpd270_unmask_irq,
+ .irq_ack = lpd270_mask_irq,
+ .irq_mask = lpd270_mask_irq,
+ .irq_unmask = lpd270_unmask_irq,
};
static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -125,7 +126,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
do {
- desc->chip->ack(irq); /* clear useless edge notification */
+ /* clear useless edge notification */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = LPD270_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
@@ -463,7 +465,7 @@ static void __init lpd270_init(void)
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
- lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
+ lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
lpd270_flash_data[1].width = 4;
/*
@@ -495,7 +497,7 @@ static struct map_desc lpd270_io_desc[] __initdata = {
static void __init lpd270_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
/* for use I SRAM as framebuffer. */
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1499493cd070..dca20de306bb 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -25,7 +25,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
-#include <mach/pxa2xx_spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <asm/setup.h>
#include <asm/memory.h>
@@ -50,6 +50,7 @@
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <mach/pm.h>
+#include <mach/smemc.h>
#include "generic.h"
#include "clock.h"
@@ -121,15 +122,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
static unsigned long lubbock_irq_enabled;
-static void lubbock_mask_irq(unsigned int irq)
+static void lubbock_mask_irq(struct irq_data *d)
{
- int lubbock_irq = (irq - LUBBOCK_IRQ(0));
+ int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
}
-static void lubbock_unmask_irq(unsigned int irq)
+static void lubbock_unmask_irq(struct irq_data *d)
{
- int lubbock_irq = (irq - LUBBOCK_IRQ(0));
+ int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
@@ -137,16 +138,17 @@ static void lubbock_unmask_irq(unsigned int irq)
static struct irq_chip lubbock_irq_chip = {
.name = "FPGA",
- .ack = lubbock_mask_irq,
- .mask = lubbock_mask_irq,
- .unmask = lubbock_unmask_irq,
+ .irq_ack = lubbock_mask_irq,
+ .irq_mask = lubbock_mask_irq,
+ .irq_unmask = lubbock_unmask_irq,
};
static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
do {
- desc->chip->ack(irq); /* clear our parent irq */
+ /* clear our parent irq */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = LUBBOCK_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
@@ -525,7 +527,7 @@ static void __init lubbock_init(void)
pxa_set_ac97_info(NULL);
lubbock_flash_data[0].width = lubbock_flash_data[1].width =
- (BOOT_DEF & 1) ? 2 : 4;
+ (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
/* Compensate for the nROMBT switch which swaps the flash banks */
printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
flashboot?"Flash":"ROM", flashboot);
@@ -549,7 +551,7 @@ static struct map_desc lubbock_io_desc[] __initdata = {
static void __init lubbock_map_io(void)
{
- pxa_map_io();
+ pxa25x_map_io();
iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
PCFR |= PCFR_OPDE;
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 90663760307a..41198f0dc3ac 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -765,7 +765,7 @@ static void __init magician_init(void)
MACHINE_START(MAGICIAN, "HTC Magician")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = MAGICIAN_NR_IRQS,
.init_irq = pxa27x_init_irq,
.init_machine = magician_init,
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index a980a5c93e49..d4b6f2375f2c 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -51,6 +51,7 @@
#include <mach/irda.h>
#include <mach/ohci.h>
#include <plat/pxa27x_keypad.h>
+#include <mach/smemc.h>
#include "generic.h"
#include "devices.h"
@@ -122,15 +123,15 @@ static unsigned long mainstone_pin_config[] = {
static unsigned long mainstone_irq_enabled;
-static void mainstone_mask_irq(unsigned int irq)
+static void mainstone_mask_irq(struct irq_data *d)
{
- int mainstone_irq = (irq - MAINSTONE_IRQ(0));
+ int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
}
-static void mainstone_unmask_irq(unsigned int irq)
+static void mainstone_unmask_irq(struct irq_data *d)
{
- int mainstone_irq = (irq - MAINSTONE_IRQ(0));
+ int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
MST_INTSETCLR &= ~(1 << mainstone_irq);
MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
@@ -138,16 +139,17 @@ static void mainstone_unmask_irq(unsigned int irq)
static struct irq_chip mainstone_irq_chip = {
.name = "FPGA",
- .ack = mainstone_mask_irq,
- .mask = mainstone_mask_irq,
- .unmask = mainstone_unmask_irq,
+ .irq_ack = mainstone_mask_irq,
+ .irq_mask = mainstone_mask_irq,
+ .irq_unmask = mainstone_unmask_irq,
};
static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
do {
- desc->chip->ack(irq); /* clear useless edge notification */
+ /* clear useless edge notification */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = MAINSTONE_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
@@ -565,7 +567,7 @@ static void __init mainstone_init(void)
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
- mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
+ mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
mst_flash_data[1].width = 4;
/* Compensate for SW7 which swaps the flash banks */
@@ -614,7 +616,7 @@ static struct map_desc mainstone_io_desc[] __initdata = {
static void __init mainstone_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
/* for use I SRAM as framebuffer. */
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index f5fb915e1315..faafea3542fb 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -819,7 +819,7 @@ static void mioa701_machine_exit(void)
MACHINE_START(MIOA701, "MIO A701")
.boot_params = 0xa0000100,
- .map_io = &pxa_map_io,
+ .map_io = &pxa27x_map_io,
.init_irq = &pxa27x_init_irq,
.init_machine = mioa701_machine_init,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 116167aaba68..59cce78aebd1 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -94,7 +94,7 @@ static void __init mp900c_init(void)
MACHINE_START(NEC_MP900, "MobilePro900/C")
.boot_params = 0xa0220100,
.timer = &pxa_timer,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.init_machine = mp900c_init,
MACHINE_END
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 462167ac05f9..cdf7f41e2bb3 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -337,7 +337,7 @@ void __init mxm_8x10_mmc_init(void)
}
#endif
-/* USB Open Host Controler Interface */
+/* USB Open Host Controller Interface */
static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
.port_mode = PMM_NPS_MODE,
.flags = ENABLE_PORT_ALL
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index ce092c521e6d..a6f898cbfac9 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -313,7 +313,7 @@ static struct map_desc palmld_io_desc[] __initdata = {
static void __init palmld_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc));
}
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 862da812cd10..df4d7d009fbb 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -203,7 +203,7 @@ static void __init palmt5_init(void)
MACHINE_START(PALMT5, "Palm Tungsten|T5")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.reserve = palmt5_reserve,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 2131d5860919..a09a2374697b 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -25,6 +25,7 @@
#include <linux/power_supply.h>
#include <linux/gpio_keys.h>
#include <linux/mtd/physmap.h>
+#include <linux/usb/gpio_vbus.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -116,6 +117,7 @@ static unsigned long palmtc_pin_config[] __initdata = {
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data palmtc_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_power = GPIO_NR_PALMTC_SD_POWER,
@@ -124,9 +126,18 @@ static struct pxamci_platform_data palmtc_mci_platform_data = {
.detect_delay_ms = 200,
};
+static void __init palmtc_mmc_init(void)
+{
+ pxa_set_mci_info(&palmtc_mci_platform_data);
+}
+#else
+static inline void palmtc_mmc_init(void) {}
+#endif
+
/******************************************************************************
* GPIO keys
******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button palmtc_pxa_buttons[] = {
{KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1},
};
@@ -144,9 +155,18 @@ static struct platform_device palmtc_pxa_keys = {
},
};
+static void __init palmtc_keys_init(void)
+{
+ platform_device_register(&palmtc_pxa_keys);
+}
+#else
+static inline void palmtc_keys_init(void) {}
+#endif
+
/******************************************************************************
* Backlight
******************************************************************************/
+#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static int palmtc_backlight_init(struct device *dev)
{
int ret;
@@ -196,17 +216,35 @@ static struct platform_device palmtc_backlight = {
},
};
+static void __init palmtc_pwm_init(void)
+{
+ platform_device_register(&palmtc_backlight);
+}
+#else
+static inline void palmtc_pwm_init(void) {}
+#endif
+
/******************************************************************************
* IrDA
******************************************************************************/
+#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
static struct pxaficp_platform_data palmtc_ficp_platform_data = {
.gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
+static void __init palmtc_irda_init(void)
+{
+ pxa_set_ficp_info(&palmtc_ficp_platform_data);
+}
+#else
+static inline void palmtc_irda_init(void) {}
+#endif
+
/******************************************************************************
* Keyboard
******************************************************************************/
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
static const uint32_t palmtc_matrix_keys[] = {
KEY(0, 0, KEY_F1),
KEY(0, 1, KEY_X),
@@ -290,27 +328,103 @@ static struct platform_device palmtc_keyboard = {
.platform_data = &palmtc_keypad_platform_data,
},
};
+static void __init palmtc_mkp_init(void)
+{
+ platform_device_register(&palmtc_keyboard);
+}
+#else
+static inline void palmtc_mkp_init(void) {}
+#endif
/******************************************************************************
* UDC
******************************************************************************/
-static struct pxa2xx_udc_mach_info palmtc_udc_info __initdata = {
+#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE)
+static struct gpio_vbus_mach_info palmtc_udc_info = {
.gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
.gpio_vbus_inverted = 1,
.gpio_pullup = GPIO_NR_PALMTC_USB_POWER,
};
+static struct platform_device palmtc_gpio_vbus = {
+ .name = "gpio-vbus",
+ .id = -1,
+ .dev = {
+ .platform_data = &palmtc_udc_info,
+ },
+};
+
+static void __init palmtc_udc_init(void)
+{
+ platform_device_register(&palmtc_gpio_vbus);
+};
+#else
+static inline void palmtc_udc_init(void) {}
+#endif
+
/******************************************************************************
* Touchscreen / Battery / GPIO-extender
******************************************************************************/
-static struct platform_device palmtc_ucb1400_core = {
+#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
+ defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
+static struct platform_device palmtc_ucb1400_device = {
.name = "ucb1400_core",
.id = -1,
};
+static void __init palmtc_ts_init(void)
+{
+ pxa_set_ac97_info(NULL);
+ platform_device_register(&palmtc_ucb1400_device);
+}
+#else
+static inline void palmtc_ts_init(void) {}
+#endif
+
+/******************************************************************************
+ * LEDs
+ ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+struct gpio_led palmtc_gpio_leds[] = {
+{
+ .name = "palmtc:green:user",
+ .default_trigger = "none",
+ .gpio = GPIO_NR_PALMTC_LED_POWER,
+ .active_low = 1,
+}, {
+ .name = "palmtc:vibra:vibra",
+ .default_trigger = "none",
+ .gpio = GPIO_NR_PALMTC_VIBRA_POWER,
+ .active_low = 1,
+}
+
+};
+
+static struct gpio_led_platform_data palmtc_gpio_led_info = {
+ .leds = palmtc_gpio_leds,
+ .num_leds = ARRAY_SIZE(palmtc_gpio_leds),
+};
+
+static struct platform_device palmtc_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &palmtc_gpio_led_info,
+ }
+};
+
+static void __init palmtc_leds_init(void)
+{
+ platform_device_register(&palmtc_leds);
+}
+#else
+static inline void palmtc_leds_init(void) {}
+#endif
+
/******************************************************************************
* NOR Flash
******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct resource palmtc_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_16M - 1,
@@ -356,24 +470,33 @@ static struct platform_device palmtc_flash = {
},
};
+static void __init palmtc_nor_init(void)
+{
+ platform_device_register(&palmtc_flash);
+}
+#else
+static inline void palmtc_nor_init(void) {}
+#endif
+
/******************************************************************************
* Framebuffer
******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info palmtc_lcd_modes[] = {
-{
- .pixclock = 115384,
- .xres = 320,
- .yres = 320,
- .bpp = 16,
-
- .left_margin = 27,
- .right_margin = 7,
- .upper_margin = 7,
- .lower_margin = 8,
-
- .hsync_len = 6,
- .vsync_len = 1,
-},
+ {
+ .pixclock = 115384,
+ .xres = 320,
+ .yres = 320,
+ .bpp = 16,
+
+ .left_margin = 27,
+ .right_margin = 7,
+ .upper_margin = 7,
+ .lower_margin = 8,
+
+ .hsync_len = 6,
+ .vsync_len = 1,
+ },
};
static struct pxafb_mach_info palmtc_lcd_screen = {
@@ -382,17 +505,17 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
+static void __init palmtc_lcd_init(void)
+{
+ set_pxa_fb_info(&palmtc_lcd_screen);
+}
+#else
+static inline void palmtc_lcd_init(void) {}
+#endif
+
/******************************************************************************
* Machine init
******************************************************************************/
-static struct platform_device *devices[] __initdata = {
- &palmtc_backlight,
- &palmtc_ucb1400_core,
- &palmtc_keyboard,
- &palmtc_pxa_keys,
- &palmtc_flash,
-};
-
static void __init palmtc_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
@@ -402,18 +525,21 @@ static void __init palmtc_init(void)
pxa_set_stuart_info(NULL);
pxa_set_hwuart_info(NULL);
- set_pxa_fb_info(&palmtc_lcd_screen);
- pxa_set_mci_info(&palmtc_mci_platform_data);
- pxa_set_udc_info(&palmtc_udc_info);
- pxa_set_ac97_info(NULL);
- pxa_set_ficp_info(&palmtc_ficp_platform_data);
-
- platform_add_devices(devices, ARRAY_SIZE(devices));
+ palmtc_mmc_init();
+ palmtc_keys_init();
+ palmtc_pwm_init();
+ palmtc_irda_init();
+ palmtc_mkp_init();
+ palmtc_udc_init();
+ palmtc_ts_init();
+ palmtc_nor_init();
+ palmtc_lcd_init();
+ palmtc_leds_init();
};
MACHINE_START(PALMTC, "Palm Tungsten|C")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
.init_machine = palmtc_init
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index a9dae7bc35d9..3f25014a136c 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -374,7 +374,7 @@ static void __init palmte2_init(void)
MACHINE_START(PALMTE2, "Palm Tungsten|E2")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
.init_machine = palmte2_init
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 00e2d7ba84ed..8aadad55fbe4 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -442,7 +442,7 @@ static void __init centro_init(void)
MACHINE_START(TREO680, "Palm Treo 680")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.reserve = treo_reserve,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
@@ -451,7 +451,7 @@ MACHINE_END
MACHINE_START(CENTRO, "Palm Centro 685")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.reserve = treo_reserve,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index d2060a1d1d68..595f002066cc 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -241,7 +241,8 @@ static inline void palmtx_keys_init(void) {}
/******************************************************************************
* NAND Flash
******************************************************************************/
-#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
+#if defined(CONFIG_MTD_NAND_PLATFORM) || \
+ defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
{
@@ -333,7 +334,7 @@ static struct map_desc palmtx_io_desc[] __initdata = {
static void __init palmtx_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
}
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index af6203fbca9c..7bf4017326e3 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -280,7 +280,7 @@ static void __init palmz72_init(void)
MACHINE_START(PALMZ72, "Palm Zire72")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = palmz72_init
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index c77e8f30a439..1fc8a66407ae 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -25,12 +25,12 @@
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/max7301.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/pxa27x.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/pcm027.h>
#include "generic.h"
@@ -244,7 +244,7 @@ static void __init pcm027_init(void)
static void __init pcm027_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
/* initialize sleep mode regs (wake-up sources, etc) */
PGSR0 = 0x01308000;
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f33647a8e0b7..90820faa711a 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = {
static unsigned long pcm990_irq_enabled;
-static void pcm990_mask_ack_irq(unsigned int irq)
+static void pcm990_mask_ack_irq(struct irq_data *d)
{
- int pcm990_irq = (irq - PCM027_IRQ(0));
+ int pcm990_irq = (d->irq - PCM027_IRQ(0));
PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
}
-static void pcm990_unmask_irq(unsigned int irq)
+static void pcm990_unmask_irq(struct irq_data *d)
{
- int pcm990_irq = (irq - PCM027_IRQ(0));
+ int pcm990_irq = (d->irq - PCM027_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
PCM990_INTSETCLR |= 1 << pcm990_irq;
PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
}
static struct irq_chip pcm990_irq_chip = {
- .mask_ack = pcm990_mask_ack_irq,
- .unmask = pcm990_unmask_irq,
+ .irq_mask_ack = pcm990_mask_ack_irq,
+ .irq_unmask = pcm990_unmask_irq,
};
static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
do {
- desc->chip->ack(irq); /* clear our parent IRQ */
+ /* clear our parent IRQ */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = PCM027_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 166c15f62916..978e1b289544 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -96,7 +96,7 @@ void pxa_pm_finish(void)
pxa_cpu_pm_fns->finish();
}
-static struct platform_suspend_ops pxa_pm_ops = {
+static const struct platform_suspend_ops pxa_pm_ops = {
.valid = pxa_pm_valid,
.enter = pxa_pm_enter,
.prepare = pxa_pm_prepare,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 93a191c889df..4f0ff1ab623d 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -25,6 +25,7 @@
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <mach/hardware.h>
@@ -43,7 +44,6 @@
#include <mach/irda.h>
#include <mach/poodle.h>
#include <mach/pxafb.h>
-#include <mach/pxa2xx_spi.h>
#include <plat/i2c.h>
#include <asm/hardware/scoop.h>
@@ -466,7 +466,7 @@ static void __init fixup_poodle(struct machine_desc *desc,
MACHINE_START(POODLE, "SHARP Poodle")
.fixup = fixup_poodle,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index de53f2e4aa39..fbc5b775f895 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -22,7 +22,9 @@
#include <linux/platform_device.h>
#include <linux/suspend.h>
#include <linux/sysdev.h>
+#include <linux/irq.h>
+#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/gpio.h>
@@ -30,6 +32,7 @@
#include <mach/reset.h>
#include <mach/pm.h>
#include <mach/dma.h>
+#include <mach/smemc.h>
#include "generic.h"
#include "devices.h"
@@ -90,23 +93,21 @@ unsigned int pxa25x_get_clk_frequency_khz(int info)
return (turbo & 1) ? (N/1000) : (M/1000);
}
-/*
- * Return the current memory clock frequency in units of 10kHz
- */
-unsigned int pxa25x_get_memclk_frequency_10khz(void)
+static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
{
- return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
+ return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
}
-static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
-{
- return pxa25x_get_memclk_frequency_10khz() * 10000;
-}
+static const struct clkops clk_pxa25x_mem_ops = {
+ .enable = clk_dummy_enable,
+ .disable = clk_dummy_disable,
+ .getrate = clk_pxa25x_mem_getrate,
+};
static const struct clkops clk_pxa25x_lcd_ops = {
- .enable = clk_cken_enable,
- .disable = clk_cken_disable,
- .getrate = clk_pxa25x_lcd_getrate,
+ .enable = clk_pxa2xx_cken_enable,
+ .disable = clk_pxa2xx_cken_disable,
+ .getrate = clk_pxa25x_mem_getrate,
};
static unsigned long gpio12_config_32k[] = {
@@ -160,31 +161,30 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
* 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
*/
-static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
-
-static struct clk_lookup pxa25x_hwuart_clkreg =
- INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
/*
* PXA 2xx clock declarations.
*/
+static DEFINE_PXA2_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
+static DEFINE_PXA2_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
+static DEFINE_PXA2_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
+static DEFINE_PXA2_CKEN(pxa25x_stuart, STUART, 14745600, 1);
+static DEFINE_PXA2_CKEN(pxa25x_usb, USB, 47923000, 5);
+static DEFINE_PXA2_CKEN(pxa25x_mmc, MMC, 19169000, 0);
+static DEFINE_PXA2_CKEN(pxa25x_i2c, I2C, 31949000, 0);
+static DEFINE_PXA2_CKEN(pxa25x_ssp, SSP, 3686400, 0);
+static DEFINE_PXA2_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
+static DEFINE_PXA2_CKEN(pxa25x_assp, ASSP, 3686400, 0);
+static DEFINE_PXA2_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
+static DEFINE_PXA2_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
+static DEFINE_PXA2_CKEN(pxa25x_ac97, AC97, 24576000, 0);
+static DEFINE_PXA2_CKEN(pxa25x_i2s, I2S, 14745600, 0);
+static DEFINE_PXA2_CKEN(pxa25x_ficp, FICP, 47923000, 0);
+
static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
-static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
-static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
-static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
-static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
-static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
-static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
-static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
-static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
-static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
-static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
-static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
-static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
-static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
-static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
+static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
static struct clk_lookup pxa25x_clkregs[] = {
INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
@@ -205,8 +205,12 @@ static struct clk_lookup pxa25x_clkregs[] = {
INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
+ INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
};
+static struct clk_lookup pxa25x_hwuart_clkreg =
+ INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
+
#ifdef CONFIG_PM
#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
@@ -219,20 +223,17 @@ static struct clk_lookup pxa25x_clkregs[] = {
*/
enum {
SLEEP_SAVE_PSTR,
- SLEEP_SAVE_CKEN,
SLEEP_SAVE_COUNT
};
static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
{
- SAVE(CKEN);
SAVE(PSTR);
}
static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
{
- RESTORE(CKEN);
RESTORE(PSTR);
}
@@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {}
/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
*/
-static int pxa25x_set_wake(unsigned int irq, unsigned int on)
+static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
{
- int gpio = IRQ_TO_GPIO(irq);
+ int gpio = IRQ_TO_GPIO(d->irq);
uint32_t mask = 0;
if (gpio >= 0 && gpio < 85)
return gpio_set_wake(gpio, on);
- if (irq == IRQ_RTCAlrm) {
+ if (d->irq == IRQ_RTCAlrm) {
mask = PWER_RTC;
goto set_pwer;
}
@@ -320,6 +321,22 @@ void __init pxa26x_init_irq(void)
}
#endif
+static struct map_desc pxa25x_io_desc[] __initdata = {
+ { /* Mem Ctl */
+ .virtual = SMEMC_VIRT,
+ .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
+ .length = 0x00200000,
+ .type = MT_DEVICE
+ },
+};
+
+void __init pxa25x_map_io(void)
+{
+ pxa_map_io();
+ iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
+ pxa25x_get_clk_frequency_khz(1);
+}
+
static struct platform_device *pxa25x_devices[] __initdata = {
&pxa25x_device_udc,
&pxa_device_pmu,
@@ -339,7 +356,9 @@ static struct sys_device pxa25x_sysdev[] = {
.cls = &pxa2xx_mfp_sysclass,
}, {
.cls = &pxa_gpio_sysclass,
- },
+ }, {
+ .cls = &pxa2xx_clock_sysclass,
+ }
};
static int __init pxa25x_init(void)
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d1fbf29d561c..987301ff4c33 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -17,7 +17,10 @@
#include <linux/suspend.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <mach/irqs.h>
@@ -27,6 +30,8 @@
#include <mach/ohci.h>
#include <mach/pm.h>
#include <mach/dma.h>
+#include <mach/smemc.h>
+
#include <plat/i2c.h>
#include "generic.h"
@@ -107,10 +112,9 @@ unsigned int pxa27x_get_clk_frequency_khz(int info)
}
/*
- * Return the current mem clock frequency in units of 10kHz as
- * reflected by CCCR[A], B, and L
+ * Return the current mem clock frequency as reflected by CCCR[A], B, and L
*/
-unsigned int pxa27x_get_memclk_frequency_10khz(void)
+static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
{
unsigned long ccsr, clkcfg;
unsigned int l, L, m, M;
@@ -129,9 +133,15 @@ unsigned int pxa27x_get_memclk_frequency_10khz(void)
L = l * BASE_CLK;
M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
- return (M / 10000);
+ return M;
}
+static const struct clkops clk_pxa27x_mem_ops = {
+ .enable = clk_dummy_enable,
+ .disable = clk_dummy_disable,
+ .getrate = clk_pxa27x_mem_getrate,
+};
+
/*
* Return the current LCD clock frequency in units of 10kHz as
*/
@@ -157,36 +167,38 @@ static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
}
static const struct clkops clk_pxa27x_lcd_ops = {
- .enable = clk_cken_enable,
- .disable = clk_cken_disable,
+ .enable = clk_pxa2xx_cken_enable,
+ .disable = clk_pxa2xx_cken_disable,
.getrate = clk_pxa27x_lcd_getrate,
};
+static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
+static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
+static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1);
+static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5);
+static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
+static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
+static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0);
+static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0);
+
static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
-static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
-static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
-static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
-static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
-static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
-static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
-static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
-static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
-static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
-static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
-static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
-static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
-static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
-static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
-static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
-static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
-static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
-static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
-static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
-static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
-static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
-static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
-static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
+static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
static struct clk_lookup pxa27x_clkregs[] = {
INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
@@ -215,6 +227,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
+ INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
};
#ifdef CONFIG_PM
@@ -246,7 +259,6 @@ int __init pxa27x_set_pwrmode(unsigned int mode)
*/
enum {
SLEEP_SAVE_PSTR,
- SLEEP_SAVE_CKEN,
SLEEP_SAVE_MDREFR,
SLEEP_SAVE_PCFR,
SLEEP_SAVE_COUNT
@@ -254,21 +266,19 @@ enum {
void pxa27x_cpu_pm_save(unsigned long *sleep_save)
{
- SAVE(MDREFR);
+ sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
SAVE(PCFR);
- SAVE(CKEN);
SAVE(PSTR);
}
void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
{
- RESTORE(MDREFR);
+ __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
RESTORE(PCFR);
PSSR = PSSR_RDH | PSSR_PH;
- RESTORE(CKEN);
RESTORE(PSTR);
}
@@ -334,18 +344,18 @@ static inline void pxa27x_init_pm(void) {}
/* PXA27x: Various gpios can issue wakeup events. This logic only
* handles the simple cases, not the WEMUX2 and WEMUX3 options
*/
-static int pxa27x_set_wake(unsigned int irq, unsigned int on)
+static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
{
- int gpio = IRQ_TO_GPIO(irq);
+ int gpio = IRQ_TO_GPIO(d->irq);
uint32_t mask;
if (gpio >= 0 && gpio < 128)
return gpio_set_wake(gpio, on);
- if (irq == IRQ_KEYPAD)
+ if (d->irq == IRQ_KEYPAD)
return keypad_set_wake(on);
- switch (irq) {
+ switch (d->irq) {
case IRQ_RTCAlrm:
mask = PWER_RTC;
break;
@@ -370,6 +380,27 @@ void __init pxa27x_init_irq(void)
pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
}
+static struct map_desc pxa27x_io_desc[] __initdata = {
+ { /* Mem Ctl */
+ .virtual = SMEMC_VIRT,
+ .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
+ .length = 0x00200000,
+ .type = MT_DEVICE
+ }, { /* IMem ctl */
+ .virtual = 0xfe000000,
+ .pfn = __phys_to_pfn(0x58000000),
+ .length = 0x00100000,
+ .type = MT_DEVICE
+ },
+};
+
+void __init pxa27x_map_io(void)
+{
+ pxa_map_io();
+ iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
+ pxa27x_get_clk_frequency_khz(1);
+}
+
/*
* device registration specific to PXA27x.
*/
@@ -405,7 +436,9 @@ static struct sys_device pxa27x_sysdev[] = {
.cls = &pxa2xx_mfp_sysclass,
}, {
.cls = &pxa_gpio_sysclass,
- },
+ }, {
+ .cls = &pxa2xx_clock_sysclass,
+ }
};
static int __init pxa27x_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index d1c747cdacf8..a7a19e1cd640 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -22,6 +22,7 @@
#include <linux/io.h>
#include <linux/sysdev.h>
+#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/gpio.h>
#include <mach/pxa3xx-regs.h>
@@ -30,193 +31,16 @@
#include <mach/pm.h>
#include <mach/dma.h>
#include <mach/regs-intc.h>
+#include <mach/smemc.h>
#include <plat/i2c.h>
#include "generic.h"
#include "devices.h"
#include "clock.h"
-/* Crystal clock: 13MHz */
-#define BASE_CLK 13000000
-
-/* Ring Oscillator Clock: 60MHz */
-#define RO_CLK 60000000
-
-#define ACCR_D0CS (1 << 26)
-#define ACCR_PCCE (1 << 11)
-
#define PECR_IE(n) ((1 << ((n) * 2)) << 28)
#define PECR_IS(n) ((1 << ((n) * 2)) << 29)
-/* crystal frequency to static memory controller multiplier (SMCFS) */
-static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
-
-/* crystal frequency to HSIO bus frequency multiplier (HSS) */
-static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
-
-/*
- * Get the clock frequency as reflected by CCSR and the turbo flag.
- * We assume these values have been applied via a fcs.
- * If info is not 0 we also display the current settings.
- */
-unsigned int pxa3xx_get_clk_frequency_khz(int info)
-{
- unsigned long acsr, xclkcfg;
- unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS;
-
- /* Read XCLKCFG register turbo bit */
- __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
- t = xclkcfg & 0x1;
-
- acsr = ACSR;
-
- xl = acsr & 0x1f;
- xn = (acsr >> 8) & 0x7;
- hss = (acsr >> 14) & 0x3;
-
- XL = xl * BASE_CLK;
- XN = xn * XL;
-
- ro = acsr & ACCR_D0CS;
-
- CLK = (ro) ? RO_CLK : ((t) ? XN : XL);
- HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK;
-
- if (info) {
- pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n",
- RO_CLK / 1000000, (RO_CLK % 1000000) / 10000,
- (ro) ? "" : "in");
- pr_info("Run Mode clock: %d.%02dMHz (*%d)\n",
- XL / 1000000, (XL % 1000000) / 10000, xl);
- pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n",
- XN / 1000000, (XN % 1000000) / 10000, xn,
- (t) ? "" : "in");
- pr_info("HSIO bus clock: %d.%02dMHz\n",
- HSS / 1000000, (HSS % 1000000) / 10000);
- }
-
- return CLK / 1000;
-}
-
-void pxa3xx_clear_reset_status(unsigned int mask)
-{
- /* RESET_STATUS_* has a 1:1 mapping with ARSR */
- ARSR = mask;
-}
-
-/*
- * Return the current AC97 clock frequency.
- */
-static unsigned long clk_pxa3xx_ac97_getrate(struct clk *clk)
-{
- unsigned long rate = 312000000;
- unsigned long ac97_div;
-
- ac97_div = AC97_DIV;
-
- /* This may loose precision for some rates but won't for the
- * standard 24.576MHz.
- */
- rate /= (ac97_div >> 12) & 0x7fff;
- rate *= (ac97_div & 0xfff);
-
- return rate;
-}
-
-/*
- * Return the current HSIO bus clock frequency
- */
-static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
-{
- unsigned long acsr;
- unsigned int hss, hsio_clk;
-
- acsr = ACSR;
-
- hss = (acsr >> 14) & 0x3;
- hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK;
-
- return hsio_clk;
-}
-
-void clk_pxa3xx_cken_enable(struct clk *clk)
-{
- unsigned long mask = 1ul << (clk->cken & 0x1f);
-
- if (clk->cken < 32)
- CKENA |= mask;
- else
- CKENB |= mask;
-}
-
-void clk_pxa3xx_cken_disable(struct clk *clk)
-{
- unsigned long mask = 1ul << (clk->cken & 0x1f);
-
- if (clk->cken < 32)
- CKENA &= ~mask;
- else
- CKENB &= ~mask;
-}
-
-const struct clkops clk_pxa3xx_cken_ops = {
- .enable = clk_pxa3xx_cken_enable,
- .disable = clk_pxa3xx_cken_disable,
-};
-
-static const struct clkops clk_pxa3xx_hsio_ops = {
- .enable = clk_pxa3xx_cken_enable,
- .disable = clk_pxa3xx_cken_disable,
- .getrate = clk_pxa3xx_hsio_getrate,
-};
-
-static const struct clkops clk_pxa3xx_ac97_ops = {
- .enable = clk_pxa3xx_cken_enable,
- .disable = clk_pxa3xx_cken_disable,
- .getrate = clk_pxa3xx_ac97_getrate,
-};
-
-static void clk_pout_enable(struct clk *clk)
-{
- OSCC |= OSCC_PEN;
-}
-
-static void clk_pout_disable(struct clk *clk)
-{
- OSCC &= ~OSCC_PEN;
-}
-
-static const struct clkops clk_pout_ops = {
- .enable = clk_pout_enable,
- .disable = clk_pout_disable,
-};
-
-static void clk_dummy_enable(struct clk *clk)
-{
-}
-
-static void clk_dummy_disable(struct clk *clk)
-{
-}
-
-static const struct clkops clk_dummy_ops = {
- .enable = clk_dummy_enable,
- .disable = clk_dummy_disable,
-};
-
-static struct clk clk_pxa3xx_pout = {
- .ops = &clk_pout_ops,
- .rate = 13000000,
- .delay = 70,
-};
-
-static struct clk clk_dummy = {
- .ops = &clk_dummy_ops,
-};
-
-static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
-static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
-static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
@@ -234,6 +58,12 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
+static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
+static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
+static DEFINE_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
+static DEFINE_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
+static DEFINE_CLK(pxa3xx_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
+
static struct clk_lookup pxa3xx_clkregs[] = {
INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
/* Power I2C clock is always on */
@@ -258,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
+ INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
};
#ifdef CONFIG_PM
@@ -268,30 +99,6 @@ static struct clk_lookup pxa3xx_clkregs[] = {
static void __iomem *sram;
static unsigned long wakeup_src;
-#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
-#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
-
-enum { SLEEP_SAVE_CKENA,
- SLEEP_SAVE_CKENB,
- SLEEP_SAVE_ACCR,
-
- SLEEP_SAVE_COUNT,
-};
-
-static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
-{
- SAVE(CKENA);
- SAVE(CKENB);
- SAVE(ACCR);
-}
-
-static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save)
-{
- RESTORE(ACCR);
- RESTORE(CKENA);
- RESTORE(CKENB);
-}
-
/*
* Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic
* memory controller has to be reinitialised, so we place some code
@@ -390,9 +197,6 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
}
static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
- .save_count = SLEEP_SAVE_COUNT,
- .save = pxa3xx_cpu_pm_save,
- .restore = pxa3xx_cpu_pm_restore,
.valid = pxa3xx_cpu_pm_valid,
.enter = pxa3xx_cpu_pm_enter,
};
@@ -425,11 +229,11 @@ static void __init pxa3xx_init_pm(void)
pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
}
-static int pxa3xx_set_wake(unsigned int irq, unsigned int on)
+static int pxa3xx_set_wake(struct irq_data *d, unsigned int on)
{
unsigned long flags, mask = 0;
- switch (irq) {
+ switch (d->irq) {
case IRQ_SSP3:
mask = ADXER_MFP_WSSP3;
break;
@@ -518,40 +322,40 @@ static inline void pxa3xx_init_pm(void) {}
#define pxa3xx_set_wake NULL
#endif
-static void pxa_ack_ext_wakeup(unsigned int irq)
+static void pxa_ack_ext_wakeup(struct irq_data *d)
{
- PECR |= PECR_IS(irq - IRQ_WAKEUP0);
+ PECR |= PECR_IS(d->irq - IRQ_WAKEUP0);
}
-static void pxa_mask_ext_wakeup(unsigned int irq)
+static void pxa_mask_ext_wakeup(struct irq_data *d)
{
- ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f));
- PECR &= ~PECR_IE(irq - IRQ_WAKEUP0);
+ ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
+ PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
}
-static void pxa_unmask_ext_wakeup(unsigned int irq)
+static void pxa_unmask_ext_wakeup(struct irq_data *d)
{
- ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f);
- PECR |= PECR_IE(irq - IRQ_WAKEUP0);
+ ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
+ PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
}
-static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type)
+static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type)
{
if (flow_type & IRQ_TYPE_EDGE_RISING)
- PWER |= 1 << (irq - IRQ_WAKEUP0);
+ PWER |= 1 << (d->irq - IRQ_WAKEUP0);
if (flow_type & IRQ_TYPE_EDGE_FALLING)
- PWER |= 1 << (irq - IRQ_WAKEUP0 + 2);
+ PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2);
return 0;
}
static struct irq_chip pxa_ext_wakeup_chip = {
.name = "WAKEUP",
- .ack = pxa_ack_ext_wakeup,
- .mask = pxa_mask_ext_wakeup,
- .unmask = pxa_unmask_ext_wakeup,
- .set_type = pxa_set_ext_wakeup_type,
+ .irq_ack = pxa_ack_ext_wakeup,
+ .irq_mask = pxa_mask_ext_wakeup,
+ .irq_unmask = pxa_unmask_ext_wakeup,
+ .irq_set_type = pxa_set_ext_wakeup_type,
};
static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
@@ -564,7 +368,7 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
set_irq_flags(irq, IRQF_VALID);
}
- pxa_ext_wakeup_chip.set_wake = fn;
+ pxa_ext_wakeup_chip.irq_set_wake = fn;
}
void __init pxa3xx_init_irq(void)
@@ -580,6 +384,22 @@ void __init pxa3xx_init_irq(void)
pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
}
+static struct map_desc pxa3xx_io_desc[] __initdata = {
+ { /* Mem Ctl */
+ .virtual = SMEMC_VIRT,
+ .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
+ .length = 0x00200000,
+ .type = MT_DEVICE
+ }
+};
+
+void __init pxa3xx_map_io(void)
+{
+ pxa_map_io();
+ iotable_init(ARRAY_AND_SIZE(pxa3xx_io_desc));
+ pxa3xx_get_clk_frequency_khz(1);
+}
+
/*
* device registration specific to PXA3xx.
*/
@@ -615,7 +435,9 @@ static struct sys_device pxa3xx_sysdev[] = {
.cls = &pxa3xx_mfp_sysclass,
}, {
.cls = &pxa_gpio_sysclass,
- },
+ }, {
+ .cls = &pxa3xx_clock_sysclass,
+ }
};
static int __init pxa3xx_init(void)
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
index 7d29dd3af79d..8aeacf908784 100644
--- a/arch/arm/mach-pxa/pxa930.c
+++ b/arch/arm/mach-pxa/pxa930.c
@@ -192,7 +192,7 @@ static struct mfp_addr_map pxa935_mfp_addr_map[] __initdata = {
static int __init pxa930_init(void)
{
- if (cpu_is_pxa930() || cpu_is_pxa935() || cpu_is_pxa950()) {
+ if (cpu_is_pxa93x()) {
mfp_init_base(io_p2v(MFPR_BASE));
mfp_init_addr(pxa930_mfp_addr_map);
}
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
new file mode 100644
index 000000000000..437980f72710
--- /dev/null
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -0,0 +1,308 @@
+/*
+ * linux/arch/arm/mach-pxa/pxa95x.c
+ *
+ * code specific to PXA95x aka MGx
+ *
+ * Copyright (C) 2009-2010 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+
+#include <mach/hardware.h>
+#include <mach/gpio.h>
+#include <mach/pxa3xx-regs.h>
+#include <mach/pxa930.h>
+#include <mach/reset.h>
+#include <mach/pm.h>
+#include <mach/dma.h>
+#include <mach/regs-intc.h>
+#include <plat/i2c.h>
+
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
+static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
+
+ MFP_ADDR(GPIO0, 0x02e0),
+ MFP_ADDR(GPIO1, 0x02dc),
+ MFP_ADDR(GPIO2, 0x02e8),
+ MFP_ADDR(GPIO3, 0x02d8),
+ MFP_ADDR(GPIO4, 0x02e4),
+ MFP_ADDR(GPIO5, 0x02ec),
+ MFP_ADDR(GPIO6, 0x02f8),
+ MFP_ADDR(GPIO7, 0x02fc),
+ MFP_ADDR(GPIO8, 0x0300),
+ MFP_ADDR(GPIO9, 0x02d4),
+ MFP_ADDR(GPIO10, 0x02f4),
+ MFP_ADDR(GPIO11, 0x02f0),
+ MFP_ADDR(GPIO12, 0x0304),
+ MFP_ADDR(GPIO13, 0x0310),
+ MFP_ADDR(GPIO14, 0x0308),
+ MFP_ADDR(GPIO15, 0x030c),
+ MFP_ADDR(GPIO16, 0x04e8),
+ MFP_ADDR(GPIO17, 0x04f4),
+ MFP_ADDR(GPIO18, 0x04f8),
+ MFP_ADDR(GPIO19, 0x04fc),
+ MFP_ADDR(GPIO20, 0x0518),
+ MFP_ADDR(GPIO21, 0x051c),
+ MFP_ADDR(GPIO22, 0x04ec),
+ MFP_ADDR(GPIO23, 0x0500),
+ MFP_ADDR(GPIO24, 0x04f0),
+ MFP_ADDR(GPIO25, 0x0504),
+ MFP_ADDR(GPIO26, 0x0510),
+ MFP_ADDR(GPIO27, 0x0514),
+ MFP_ADDR(GPIO28, 0x0520),
+ MFP_ADDR(GPIO29, 0x0600),
+ MFP_ADDR(GPIO30, 0x0618),
+ MFP_ADDR(GPIO31, 0x0610),
+ MFP_ADDR(GPIO32, 0x060c),
+ MFP_ADDR(GPIO33, 0x061c),
+ MFP_ADDR(GPIO34, 0x0620),
+ MFP_ADDR(GPIO35, 0x0628),
+ MFP_ADDR(GPIO36, 0x062c),
+ MFP_ADDR(GPIO37, 0x0630),
+ MFP_ADDR(GPIO38, 0x0634),
+ MFP_ADDR(GPIO39, 0x0638),
+ MFP_ADDR(GPIO40, 0x063c),
+ MFP_ADDR(GPIO41, 0x0614),
+ MFP_ADDR(GPIO42, 0x0624),
+ MFP_ADDR(GPIO43, 0x0608),
+ MFP_ADDR(GPIO44, 0x0604),
+ MFP_ADDR(GPIO45, 0x050c),
+ MFP_ADDR(GPIO46, 0x0508),
+ MFP_ADDR(GPIO47, 0x02bc),
+ MFP_ADDR(GPIO48, 0x02b4),
+ MFP_ADDR(GPIO49, 0x02b8),
+ MFP_ADDR(GPIO50, 0x02c8),
+ MFP_ADDR(GPIO51, 0x02c0),
+ MFP_ADDR(GPIO52, 0x02c4),
+ MFP_ADDR(GPIO53, 0x02d0),
+ MFP_ADDR(GPIO54, 0x02cc),
+ MFP_ADDR(GPIO55, 0x029c),
+ MFP_ADDR(GPIO56, 0x02a0),
+ MFP_ADDR(GPIO57, 0x0294),
+ MFP_ADDR(GPIO58, 0x0298),
+ MFP_ADDR(GPIO59, 0x02a4),
+ MFP_ADDR(GPIO60, 0x02a8),
+ MFP_ADDR(GPIO61, 0x02b0),
+ MFP_ADDR(GPIO62, 0x02ac),
+ MFP_ADDR(GPIO63, 0x0640),
+ MFP_ADDR(GPIO64, 0x065c),
+ MFP_ADDR(GPIO65, 0x0648),
+ MFP_ADDR(GPIO66, 0x0644),
+ MFP_ADDR(GPIO67, 0x0674),
+ MFP_ADDR(GPIO68, 0x0658),
+ MFP_ADDR(GPIO69, 0x0654),
+ MFP_ADDR(GPIO70, 0x0660),
+ MFP_ADDR(GPIO71, 0x0668),
+ MFP_ADDR(GPIO72, 0x0664),
+ MFP_ADDR(GPIO73, 0x0650),
+ MFP_ADDR(GPIO74, 0x066c),
+ MFP_ADDR(GPIO75, 0x064c),
+ MFP_ADDR(GPIO76, 0x0670),
+ MFP_ADDR(GPIO77, 0x0678),
+ MFP_ADDR(GPIO78, 0x067c),
+ MFP_ADDR(GPIO79, 0x0694),
+ MFP_ADDR(GPIO80, 0x069c),
+ MFP_ADDR(GPIO81, 0x06a0),
+ MFP_ADDR(GPIO82, 0x06a4),
+ MFP_ADDR(GPIO83, 0x0698),
+ MFP_ADDR(GPIO84, 0x06bc),
+ MFP_ADDR(GPIO85, 0x06b4),
+ MFP_ADDR(GPIO86, 0x06b0),
+ MFP_ADDR(GPIO87, 0x06c0),
+ MFP_ADDR(GPIO88, 0x06c4),
+ MFP_ADDR(GPIO89, 0x06ac),
+ MFP_ADDR(GPIO90, 0x0680),
+ MFP_ADDR(GPIO91, 0x0684),
+ MFP_ADDR(GPIO92, 0x0688),
+ MFP_ADDR(GPIO93, 0x0690),
+ MFP_ADDR(GPIO94, 0x068c),
+ MFP_ADDR(GPIO95, 0x06a8),
+ MFP_ADDR(GPIO96, 0x06b8),
+ MFP_ADDR(GPIO97, 0x0410),
+ MFP_ADDR(GPIO98, 0x0418),
+ MFP_ADDR(GPIO99, 0x041c),
+ MFP_ADDR(GPIO100, 0x0414),
+ MFP_ADDR(GPIO101, 0x0408),
+ MFP_ADDR(GPIO102, 0x0324),
+ MFP_ADDR(GPIO103, 0x040c),
+ MFP_ADDR(GPIO104, 0x0400),
+ MFP_ADDR(GPIO105, 0x0328),
+ MFP_ADDR(GPIO106, 0x0404),
+
+ MFP_ADDR(GPIO159, 0x0524),
+ MFP_ADDR(GPIO163, 0x0534),
+ MFP_ADDR(GPIO167, 0x0544),
+ MFP_ADDR(GPIO168, 0x0548),
+ MFP_ADDR(GPIO169, 0x054c),
+ MFP_ADDR(GPIO170, 0x0550),
+ MFP_ADDR(GPIO171, 0x0554),
+ MFP_ADDR(GPIO172, 0x0558),
+ MFP_ADDR(GPIO173, 0x055c),
+
+ MFP_ADDR(nXCVREN, 0x0204),
+ MFP_ADDR(DF_CLE_nOE, 0x020c),
+ MFP_ADDR(DF_nADV1_ALE, 0x0218),
+ MFP_ADDR(DF_SCLK_E, 0x0214),
+ MFP_ADDR(DF_SCLK_S, 0x0210),
+ MFP_ADDR(nBE0, 0x021c),
+ MFP_ADDR(nBE1, 0x0220),
+ MFP_ADDR(DF_nADV2_ALE, 0x0224),
+ MFP_ADDR(DF_INT_RnB, 0x0228),
+ MFP_ADDR(DF_nCS0, 0x022c),
+ MFP_ADDR(DF_nCS1, 0x0230),
+ MFP_ADDR(nLUA, 0x0254),
+ MFP_ADDR(nLLA, 0x0258),
+ MFP_ADDR(DF_nWE, 0x0234),
+ MFP_ADDR(DF_nRE_nOE, 0x0238),
+ MFP_ADDR(DF_ADDR0, 0x024c),
+ MFP_ADDR(DF_ADDR1, 0x0250),
+ MFP_ADDR(DF_ADDR2, 0x025c),
+ MFP_ADDR(DF_ADDR3, 0x0260),
+ MFP_ADDR(DF_IO0, 0x023c),
+ MFP_ADDR(DF_IO1, 0x0240),
+ MFP_ADDR(DF_IO2, 0x0244),
+ MFP_ADDR(DF_IO3, 0x0248),
+ MFP_ADDR(DF_IO4, 0x0264),
+ MFP_ADDR(DF_IO5, 0x0268),
+ MFP_ADDR(DF_IO6, 0x026c),
+ MFP_ADDR(DF_IO7, 0x0270),
+ MFP_ADDR(DF_IO8, 0x0274),
+ MFP_ADDR(DF_IO9, 0x0278),
+ MFP_ADDR(DF_IO10, 0x027c),
+ MFP_ADDR(DF_IO11, 0x0280),
+ MFP_ADDR(DF_IO12, 0x0284),
+ MFP_ADDR(DF_IO13, 0x0288),
+ MFP_ADDR(DF_IO14, 0x028c),
+ MFP_ADDR(DF_IO15, 0x0290),
+
+ MFP_ADDR(GSIM_UIO, 0x0314),
+ MFP_ADDR(GSIM_UCLK, 0x0318),
+ MFP_ADDR(GSIM_UDET, 0x031c),
+ MFP_ADDR(GSIM_nURST, 0x0320),
+
+ MFP_ADDR(PMIC_INT, 0x06c8),
+
+ MFP_ADDR(RDY, 0x0200),
+
+ MFP_ADDR_END,
+};
+
+static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
+static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
+static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
+static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
+
+static struct clk_lookup pxa95x_clkregs[] = {
+ INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
+ /* Power I2C clock is always on */
+ INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
+ INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
+ INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
+ INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
+ INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
+ INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
+ INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
+ INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
+ INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
+ INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
+ INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
+ INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
+ INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
+ INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
+};
+
+void __init pxa95x_init_irq(void)
+{
+ pxa_init_irq(96, NULL);
+ pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
+}
+
+/*
+ * device registration specific to PXA93x.
+ */
+
+void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
+{
+ pxa_register_device(&pxa3xx_device_i2c_power, info);
+}
+
+static struct platform_device *devices[] __initdata = {
+ &sa1100_device_rtc,
+ &pxa_device_rtc,
+ &pxa27x_device_ssp1,
+ &pxa27x_device_ssp2,
+ &pxa27x_device_ssp3,
+ &pxa3xx_device_ssp4,
+ &pxa27x_device_pwm0,
+ &pxa27x_device_pwm1,
+};
+
+static struct sys_device pxa95x_sysdev[] = {
+ {
+ .cls = &pxa_irq_sysclass,
+ }, {
+ .cls = &pxa_gpio_sysclass,
+ }, {
+ .cls = &pxa3xx_clock_sysclass,
+ }
+};
+
+static int __init pxa95x_init(void)
+{
+ int ret = 0, i;
+
+ if (cpu_is_pxa95x()) {
+ mfp_init_base(io_p2v(MFPR_BASE));
+ mfp_init_addr(pxa95x_mfp_addr_map);
+
+ reset_status = ARSR;
+
+ /*
+ * clear RDH bit every time after reset
+ *
+ * Note: the last 3 bits DxS are write-1-to-clear so carefully
+ * preserve them here in case they will be referenced later
+ */
+ ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
+
+ clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
+
+ if ((ret = pxa_init_dma(IRQ_DMA, 32)))
+ return ret;
+
+ for (i = 0; i < ARRAY_SIZE(pxa95x_sysdev); i++) {
+ ret = sysdev_register(&pxa95x_sysdev[i]);
+ if (ret)
+ pr_err("failed to register sysdev[%d]\n", i);
+ }
+
+ ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+ }
+
+ return ret;
+}
+
+postcore_initcall(pxa95x_init);
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 4121d03ea2c3..8361151be054 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -588,6 +588,9 @@ static struct pxafb_mach_info raumfeld_sharp_lcd_info = {
.num_modes = 1,
.video_mem_size = 0x400000,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+#ifdef CONFIG_PXA3XX_GCU
+ .acceleration_enabled = 1,
+#endif
};
static void __init raumfeld_lcd_init(void)
@@ -616,6 +619,8 @@ static void __init raumfeld_lcd_init(void)
pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
else
gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
+
+ platform_device_register(&pxa3xx_device_gcu);
}
/**
@@ -1085,7 +1090,7 @@ static void __init raumfeld_speaker_init(void)
MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
.boot_params = RAUMFELD_SDRAM_BASE + 0x100,
.init_machine = raumfeld_controller_init,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
MACHINE_END
@@ -1095,7 +1100,7 @@ MACHINE_END
MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
.boot_params = RAUMFELD_SDRAM_BASE + 0x100,
.init_machine = raumfeld_connector_init,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
MACHINE_END
@@ -1105,7 +1110,7 @@ MACHINE_END
MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
.boot_params = RAUMFELD_SDRAM_BASE + 0x100,
.init_machine = raumfeld_speaker_init,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
MACHINE_END
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 4b521e045d75..c1ca8cb467fc 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -116,7 +116,7 @@ static struct platform_device smc91x_device = {
},
};
-#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE)
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static uint16_t lcd_power_on[] = {
/* single frame */
SMART_CMD_NOOP,
@@ -597,7 +597,7 @@ static void __init saar_init(void)
MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
/* Maintainer: Eric Miao <eric.miao@marvell.com> */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
.init_machine = saar_init,
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
new file mode 100644
index 000000000000..e497922f761a
--- /dev/null
+++ b/arch/arm/mach-pxa/saarb.c
@@ -0,0 +1,114 @@
+/*
+ * linux/arch/arm/mach-pxa/saarb.c
+ *
+ * Support for the Marvell Handheld Platform (aka SAARB)
+ *
+ * Copyright (C) 2007-2010 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <linux/mfd/88pm860x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/irqs.h>
+#include <mach/hardware.h>
+#include <mach/mfp.h>
+#include <mach/mfp-pxa930.h>
+#include <mach/gpio.h>
+
+#include <plat/i2c.h>
+
+#include "generic.h"
+
+#define SAARB_NR_IRQS (IRQ_BOARD_START + 40)
+
+static struct pm860x_touch_pdata saarb_touch = {
+ .gpadc_prebias = 1,
+ .slot_cycle = 1,
+ .tsi_prebias = 6,
+ .pen_prebias = 16,
+ .pen_prechg = 2,
+ .res_x = 300,
+};
+
+static struct pm860x_backlight_pdata saarb_backlight[] = {
+ {
+ .id = PM8606_ID_BACKLIGHT,
+ .iset = PM8606_WLED_CURRENT(24),
+ .flags = PM8606_BACKLIGHT1,
+ },
+ {},
+};
+
+static struct pm860x_led_pdata saarb_led[] = {
+ {
+ .id = PM8606_ID_LED,
+ .iset = PM8606_LED_CURRENT(12),
+ .flags = PM8606_LED1_RED,
+ }, {
+ .id = PM8606_ID_LED,
+ .iset = PM8606_LED_CURRENT(12),
+ .flags = PM8606_LED1_GREEN,
+ }, {
+ .id = PM8606_ID_LED,
+ .iset = PM8606_LED_CURRENT(12),
+ .flags = PM8606_LED1_BLUE,
+ }, {
+ .id = PM8606_ID_LED,
+ .iset = PM8606_LED_CURRENT(12),
+ .flags = PM8606_LED2_RED,
+ }, {
+ .id = PM8606_ID_LED,
+ .iset = PM8606_LED_CURRENT(12),
+ .flags = PM8606_LED2_GREEN,
+ }, {
+ .id = PM8606_ID_LED,
+ .iset = PM8606_LED_CURRENT(12),
+ .flags = PM8606_LED2_BLUE,
+ },
+};
+
+static struct pm860x_platform_data saarb_pm8607_info = {
+ .touch = &saarb_touch,
+ .backlight = &saarb_backlight[0],
+ .led = &saarb_led[0],
+ .companion_addr = 0x10,
+ .irq_mode = 0,
+ .irq_base = IRQ_BOARD_START,
+
+ .i2c_port = GI2C_PORT,
+};
+
+static struct i2c_board_info saarb_i2c_info[] = {
+ {
+ .type = "88PM860x",
+ .addr = 0x34,
+ .platform_data = &saarb_pm8607_info,
+ .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+ },
+};
+
+static void __init saarb_init(void)
+{
+ pxa_set_ffuart_info(NULL);
+ pxa_set_i2c_info(NULL);
+ i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
+}
+
+MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
+ .boot_params = 0xa0000100,
+ .map_io = pxa_map_io,
+ .nr_irqs = SAARB_NR_IRQS,
+ .init_irq = pxa95x_init_irq,
+ .timer = &pxa_timer,
+ .init_machine = saarb_init,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 8fed027b12dc..785880f67b60 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -579,7 +579,8 @@ static int sharpsl_ac_check(void)
static int sharpsl_pm_suspend(struct platform_device *pdev, pm_message_t state)
{
sharpsl_pm.flags |= SHARPSL_SUSPENDED;
- flush_scheduled_work();
+ flush_delayed_work_sync(&toggle_charger);
+ flush_delayed_work_sync(&sharpsl_bat);
if (sharpsl_pm.charge_mode == CHRG_ON)
sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG;
@@ -868,7 +869,7 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info)
}
#ifdef CONFIG_PM
-static struct platform_suspend_ops sharpsl_pm_ops = {
+static const struct platform_suspend_ops sharpsl_pm_ops = {
.prepare = pxa_pm_prepare,
.finish = pxa_pm_finish,
.enter = corgi_pxa_pm_enter,
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 52c30b01a671..c551da86baf6 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -14,7 +14,7 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/hardware.h>
-
+#include <mach/smemc.h>
#include <mach/pxa2xx-regs.h>
#define MDREFR_KDIV 0x200a4000 // all banks
@@ -353,8 +353,8 @@ resume_turn_on_mmu:
@ Let us ensure we jump to resume_after_mmu only when the mcr above
@ actually took effect. They call it the "cpwait" operation.
- mrc p15, 0, r1, c2, c0, 0 @ queue a dependency on CP15
- sub pc, r2, r1, lsr #32 @ jump to virtual addr
+ mrc p15, 0, r0, c2, c0, 0 @ queue a dependency on CP15
+ sub pc, r2, r0, lsr #32 @ jump to virtual addr
nop
nop
nop
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index d6f6904132a6..232b7316ec08 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -9,50 +9,37 @@
#include <linux/sysdev.h>
#include <mach/hardware.h>
-
-#define SMEMC_PHYS_BASE (0x4A000000)
-#define SMEMC_PHYS_SIZE (0x90)
-
-#define MSC0 (0x08) /* Static Memory Controller Register 0 */
-#define MSC1 (0x0C) /* Static Memory Controller Register 1 */
-#define SXCNFG (0x1C) /* Synchronous Static Memory Control Register */
-#define MEMCLKCFG (0x68) /* Clock Configuration */
-#define CSADRCFG0 (0x80) /* Address Configuration Register for CS0 */
-#define CSADRCFG1 (0x84) /* Address Configuration Register for CS1 */
-#define CSADRCFG2 (0x88) /* Address Configuration Register for CS2 */
-#define CSADRCFG3 (0x8C) /* Address Configuration Register for CS3 */
+#include <mach/smemc.h>
#ifdef CONFIG_PM
-static void __iomem *smemc_mmio_base;
-
static unsigned long msc[2];
static unsigned long sxcnfg, memclkcfg;
static unsigned long csadrcfg[4];
static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
{
- msc[0] = __raw_readl(smemc_mmio_base + MSC0);
- msc[1] = __raw_readl(smemc_mmio_base + MSC1);
- sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG);
- memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG);
- csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0);
- csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1);
- csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2);
- csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3);
+ msc[0] = __raw_readl(MSC0);
+ msc[1] = __raw_readl(MSC1);
+ sxcnfg = __raw_readl(SXCNFG);
+ memclkcfg = __raw_readl(MEMCLKCFG);
+ csadrcfg[0] = __raw_readl(CSADRCFG0);
+ csadrcfg[1] = __raw_readl(CSADRCFG1);
+ csadrcfg[2] = __raw_readl(CSADRCFG2);
+ csadrcfg[3] = __raw_readl(CSADRCFG3);
return 0;
}
static int pxa3xx_smemc_resume(struct sys_device *dev)
{
- __raw_writel(msc[0], smemc_mmio_base + MSC0);
- __raw_writel(msc[1], smemc_mmio_base + MSC1);
- __raw_writel(sxcnfg, smemc_mmio_base + SXCNFG);
- __raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG);
- __raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0);
- __raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1);
- __raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2);
- __raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3);
+ __raw_writel(msc[0], MSC0);
+ __raw_writel(msc[1], MSC1);
+ __raw_writel(sxcnfg, SXCNFG);
+ __raw_writel(memclkcfg, MEMCLKCFG);
+ __raw_writel(csadrcfg[0], CSADRCFG0);
+ __raw_writel(csadrcfg[1], CSADRCFG1);
+ __raw_writel(csadrcfg[2], CSADRCFG2);
+ __raw_writel(csadrcfg[3], CSADRCFG3);
return 0;
}
@@ -73,10 +60,6 @@ static int __init smemc_init(void)
int ret = 0;
if (cpu_is_pxa3xx()) {
- smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE);
- if (smemc_mmio_base == NULL)
- return -ENODEV;
-
ret = sysdev_class_register(&smemc_sysclass);
if (ret)
return ret;
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index f736119f1ebf..b49a2c21124c 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -23,10 +23,12 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
-#include <linux/mtd/physmap.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
+#include <linux/mtd/physmap.h>
#include <linux/input/matrix_keypad.h>
#include <linux/regulator/machine.h>
+#include <linux/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@@ -41,9 +43,9 @@
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pxafb.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/spitz.h>
#include <mach/sharpsl_pm.h>
+#include <mach/smemc.h>
#include <plat/i2c.h>
@@ -929,9 +931,10 @@ static void spitz_poweroff(void)
static void spitz_restart(char mode, const char *cmd)
{
+ uint32_t msc0 = __raw_readl(MSC0);
/* Bootloader magic for a reboot */
- if ((MSC0 & 0xffff0000) == 0x7ff00000)
- MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
+ if ((msc0 & 0xffff0000) == 0x7ff00000)
+ __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0);
spitz_poweroff();
}
@@ -980,7 +983,7 @@ static void __init spitz_fixup(struct machine_desc *desc,
#ifdef CONFIG_MACH_SPITZ
MACHINE_START(SPITZ, "SHARP Spitz")
.fixup = spitz_fixup,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.init_machine = spitz_init,
.timer = &pxa_timer,
@@ -990,7 +993,7 @@ MACHINE_END
#ifdef CONFIG_MACH_BORZOI
MACHINE_START(BORZOI, "SHARP Borzoi")
.fixup = spitz_fixup,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.init_machine = spitz_init,
.timer = &pxa_timer,
@@ -1000,7 +1003,7 @@ MACHINE_END
#ifdef CONFIG_MACH_AKITA
MACHINE_START(AKITA, "SHARP Akita")
.fixup = spitz_fixup,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.init_machine = spitz_init,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 738adc1773fd..9a14fdb83c82 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -46,10 +46,11 @@
#include <plat/i2c.h>
#include <mach/mmc.h>
#include <mach/udc.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/pxa27x-udc.h>
+#include <mach/smemc.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mfd/da903x.h>
#include <linux/sht15.h>
@@ -976,7 +977,7 @@ static void __init stargate2_init(void)
{
/* This is probably a board specific hack as this must be set
prior to connecting the MFP stuff up. */
- MECR &= ~MECR_NOS;
+ __raw_writel(__raw_readl(MECR) & ~MECR_NOS, MECR);
pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
@@ -998,7 +999,7 @@ static void __init stargate2_init(void)
#ifdef CONFIG_MACH_INTELMOTE2
MACHINE_START(INTELMOTE2, "IMOTE 2")
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = imote2_init,
@@ -1008,7 +1009,7 @@ MACHINE_END
#ifdef CONFIG_MACH_STARGATE2
MACHINE_START(STARGATE2, "Stargate 2")
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.nr_irqs = STARGATE_NR_IRQS,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 2ea7545273ad..9cecf8366db8 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -490,7 +490,7 @@ static void __init tavorevb_init(void)
MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
/* Maintainer: Eric Miao <eric.miao@marvell.com> */
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
.init_machine = tavorevb_init,
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index dc3011697bbf..70191a9450eb 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -127,7 +127,7 @@ static void __init evb3_init(void)
MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.nr_irqs = TAVOREVB3_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 293e40aeaf29..e7f64d9b4f2d 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -17,11 +17,11 @@
#include <linux/interrupt.h>
#include <linux/clockchips.h>
#include <linux/sched.h>
-#include <linux/cnt32_to_63.h>
#include <asm/div64.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
+#include <asm/sched_clock.h>
#include <mach/regs-ost.h>
/*
@@ -32,29 +32,18 @@
* long as there is always less than 582 seconds between successive
* calls to sched_clock() which should always be the case in practice.
*/
+static DEFINE_CLOCK_DATA(cd);
-#define OSCR2NS_SCALE_FACTOR 10
-
-static unsigned long oscr2ns_scale;
-
-static void __init set_oscr2ns_scale(unsigned long oscr_rate)
+unsigned long long notrace sched_clock(void)
{
- unsigned long long v = 1000000000ULL << OSCR2NS_SCALE_FACTOR;
- do_div(v, oscr_rate);
- oscr2ns_scale = v;
- /*
- * We want an even value to automatically clear the top bit
- * returned by cnt32_to_63() without an additional run time
- * instruction. So if the LSB is 1 then round it up.
- */
- if (oscr2ns_scale & 1)
- oscr2ns_scale++;
+ u32 cyc = OSCR;
+ return cyc_to_sched_clock(&cd, cyc, (u32)~0);
}
-unsigned long long sched_clock(void)
+static void notrace pxa_update_sched_clock(void)
{
- unsigned long long v = cnt32_to_63(OSCR);
- return (v * oscr2ns_scale) >> OSCR2NS_SCALE_FACTOR;
+ u32 cyc = OSCR;
+ update_sched_clock(&cd, cyc, (u32)~0);
}
@@ -127,7 +116,6 @@ static struct clocksource cksrc_pxa_oscr0 = {
.rating = 200,
.read = pxa_read_oscr,
.mask = CLOCKSOURCE_MASK(32),
- .shift = 20,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
@@ -145,7 +133,7 @@ static void __init pxa_timer_init(void)
OIER = 0;
OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
- set_oscr2ns_scale(clock_tick_rate);
+ init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
ckevt_pxa_osmr0.mult =
div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
@@ -155,12 +143,9 @@ static void __init pxa_timer_init(void)
clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
ckevt_pxa_osmr0.cpumask = cpumask_of(0);
- cksrc_pxa_oscr0.mult =
- clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
-
setup_irq(IRQ_OST0, &pxa_ost0_irq);
- clocksource_register(&cksrc_pxa_oscr0);
+ clocksource_register_hz(&cksrc_pxa_oscr0, clock_tick_rate);
clockevents_register_device(&ckevt_pxa_osmr0);
}
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0ee1df49606d..af152e70cfcf 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -32,6 +32,7 @@
#include <linux/gpio.h>
#include <linux/pda_power.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/input/matrix_keypad.h>
#include <asm/setup.h>
@@ -44,8 +45,8 @@
#include <mach/mmc.h>
#include <mach/udc.h>
#include <mach/tosa_bt.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/audio.h>
+#include <mach/smemc.h>
#include <asm/mach/arch.h>
#include <mach/tosa.h>
@@ -893,9 +894,11 @@ static void tosa_poweroff(void)
static void tosa_restart(char mode, const char *cmd)
{
+ uint32_t msc0 = __raw_readl(MSC0);
+
/* Bootloader magic for a reboot */
- if((MSC0 & 0xffff0000) == 0x7ff00000)
- MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
+ if((msc0 & 0xffff0000) == 0x7ff00000)
+ __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0);
tosa_poweroff();
}
@@ -953,7 +956,7 @@ static void __init fixup_tosa(struct machine_desc *desc,
MACHINE_START(TOSA, "SHARP Tosa")
.fixup = fixup_tosa,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.nr_irqs = TOSA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.init_machine = tosa_init,
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 565d062f51d5..423261d63d07 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -40,13 +40,13 @@
#include <asm/mach/flash.h>
#include <mach/pxa27x.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/trizeps4.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <mach/irda.h>
#include <mach/ohci.h>
+#include <mach/smemc.h>
#include <plat/i2c.h>
#include "generic.h"
@@ -539,10 +539,10 @@ static void __init trizeps4_init(void)
static void __init trizeps4_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
- if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
+ if ((__raw_readl(MSC0) & 0x8) && (__raw_readl(BOOT_DEF) & 0x1)) {
/* if flash is 16 bit wide its a Trizeps4 WL */
__machine_arch_type = MACH_TYPE_TRIZEPS4WL;
trizeps4_flash_data[0].width = 2;
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 438fc9a5ed59..49eeeab23689 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -249,9 +249,9 @@ static inline int viper_bit_to_irq(int bit)
return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
}
-static void viper_ack_irq(unsigned int irq)
+static void viper_ack_irq(struct irq_data *d)
{
- int viper_irq = viper_irq_to_bitmask(irq);
+ int viper_irq = viper_irq_to_bitmask(d->irq);
if (viper_irq & 0xff)
VIPER_LO_IRQ_STATUS = viper_irq;
@@ -259,14 +259,14 @@ static void viper_ack_irq(unsigned int irq)
VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
}
-static void viper_mask_irq(unsigned int irq)
+static void viper_mask_irq(struct irq_data *d)
{
- viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
+ viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
}
-static void viper_unmask_irq(unsigned int irq)
+static void viper_unmask_irq(struct irq_data *d)
{
- viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
+ viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
}
static inline unsigned long viper_irq_pending(void)
@@ -283,7 +283,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
do {
/* we're in a chained irq handler,
* so ack the interrupt by hand */
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = viper_bit_to_irq(__ffs(pending));
@@ -294,10 +294,10 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
}
static struct irq_chip viper_irq_chip = {
- .name = "ISA",
- .ack = viper_ack_irq,
- .mask = viper_mask_irq,
- .unmask = viper_unmask_irq
+ .name = "ISA",
+ .irq_ack = viper_ack_irq,
+ .irq_mask = viper_mask_irq,
+ .irq_unmask = viper_unmask_irq
};
static void __init viper_init_irq(void)
@@ -983,7 +983,7 @@ static struct map_desc viper_io_desc[] __initdata = {
static void __init viper_map_io(void)
{
- pxa_map_io();
+ pxa25x_map_io();
iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index f45ac0961778..b9b579715ff6 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -719,7 +719,7 @@ static void __init vpac270_init(void)
MACHINE_START(VPAC270, "Voipac PXA270")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = vpac270_init
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 3260ce73d327..51c0281c6e0a 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -31,6 +31,7 @@
#include <mach/hardware.h>
#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa25x.h>
+#include <mach/smemc.h>
#include "generic.h"
@@ -172,9 +173,9 @@ static void __init xcep_init(void)
/* See Intel XScale Developer's Guide for details */
/* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
- MSC1 = (MSC1 & 0xffff) | 0xD5540000;
+ __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
/* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
- MSC2 = (MSC2 & 0xffff) | 0x72A00000;
+ __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
platform_add_devices(ARRAY_AND_SIZE(devices));
pxa_set_i2c_info(&xcep_i2c_platform_data);
@@ -183,7 +184,7 @@ static void __init xcep_init(void)
MACHINE_START(XCEP, "Iskratel XCEP")
.boot_params = 0xa0000100,
.init_machine = xcep_init,
- .map_io = pxa_map_io,
+ .map_io = pxa25x_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
MACHINE_END
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index fefde9848d82..a323e076129e 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -20,6 +20,7 @@
#include <linux/z2_battery.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/spi/libertas_spi.h>
#include <linux/spi/lms283gf05.h>
#include <linux/power_supply.h>
@@ -38,7 +39,6 @@
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <plat/pxa27x_keypad.h>
-#include <mach/pxa2xx_spi.h>
#include <plat/i2c.h>
@@ -704,7 +704,7 @@ static void __init z2_init(void)
MACHINE_START(ZIPIT2, "Zipit Z2")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa27x_map_io,
.init_irq = pxa27x_init_irq,
.timer = &pxa_timer,
.init_machine = z2_init,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index dea46a2d089b..f4b053b35815 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -20,6 +20,7 @@
#include <linux/dm9000.h>
#include <linux/mmc/host.h>
#include <linux/spi/spi.h>
+#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
@@ -41,12 +42,12 @@
#include <mach/pxa27x-udc.h>
#include <mach/udc.h>
#include <mach/pxafb.h>
-#include <mach/pxa2xx_spi.h>
#include <mach/mfp-pxa27x.h>
#include <mach/pm.h>
#include <mach/audio.h>
#include <mach/arcom-pcmcia.h>
#include <mach/zeus.h>
+#include <mach/smemc.h>
#include "generic.h"
@@ -82,19 +83,19 @@ static inline int zeus_bit_to_irq(int bit)
return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
}
-static void zeus_ack_irq(unsigned int irq)
+static void zeus_ack_irq(struct irq_data *d)
{
- __raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ);
+ __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
}
-static void zeus_mask_irq(unsigned int irq)
+static void zeus_mask_irq(struct irq_data *d)
{
- zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq));
+ zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
}
-static void zeus_unmask_irq(unsigned int irq)
+static void zeus_unmask_irq(struct irq_data *d)
{
- zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq);
+ zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
}
static inline unsigned long zeus_irq_pending(void)
@@ -110,7 +111,7 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
do {
/* we're in a chained irq handler,
* so ack the interrupt by hand */
- desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO));
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = zeus_bit_to_irq(__ffs(pending));
@@ -121,10 +122,10 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
}
static struct irq_chip zeus_irq_chip = {
- .name = "ISA",
- .ack = zeus_ack_irq,
- .mask = zeus_mask_irq,
- .unmask = zeus_unmask_irq,
+ .name = "ISA",
+ .irq_ack = zeus_ack_irq,
+ .irq_mask = zeus_mask_irq,
+ .irq_unmask = zeus_unmask_irq,
};
static void __init zeus_init_irq(void)
@@ -823,13 +824,16 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
static void __init zeus_init(void)
{
u16 dm9000_msc = DM9K_MSC_VALUE;
+ u32 msc0, msc1;
system_rev = __raw_readw(ZEUS_CPLD_VERSION);
pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
/* Fix timings for dm9000s (CS1/CS2)*/
- MSC0 = (MSC0 & 0xffff) | (dm9000_msc << 16);
- MSC1 = (MSC1 & 0xffff0000) | dm9000_msc;
+ msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16);
+ msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc;
+ __raw_writel(msc0, MSC0);
+ __raw_writel(msc1, MSC1);
pm_power_off = zeus_power_off;
zeus_setup_apm();
@@ -883,7 +887,7 @@ static struct map_desc zeus_io_desc[] __initdata = {
static void __init zeus_map_io(void)
{
- pxa_map_io();
+ pxa27x_map_io();
iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 702f7a68e87d..a4c784aab764 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -423,7 +423,7 @@ static void __init zylonite_init(void)
MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
.boot_params = 0xa0000100,
- .map_io = pxa_map_io,
+ .map_io = pxa3xx_map_io,
.nr_irqs = ZYLONITE_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.timer = &pxa_timer,