diff options
Diffstat (limited to 'arch/arm/mach-s3c2410')
| -rw-r--r-- | arch/arm/mach-s3c2410/Makefile | 5 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/clock.c | 43 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/clock.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/cpu.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/devs.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/gpio.c | 72 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/s3c2400-gpio.c | 45 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/s3c2410-gpio.c | 93 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/sleep.S | 2 |
9 files changed, 207 insertions, 77 deletions
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index b4f1e051c768..1217bf00309c 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -10,9 +10,13 @@ obj-m := obj-n := obj- := +# S3C2400 support files +obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o + # S3C2410 support files obj-$(CONFIG_CPU_S3C2410) += s3c2410.o +obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o obj-$(CONFIG_S3C2410_DMA) += dma.o # Power Management support @@ -25,6 +29,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o +obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o # bast extras diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index af2f3d52b61b..08489efdaf06 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -40,7 +40,6 @@ #include <linux/mutex.h> #include <asm/hardware.h> -#include <asm/atomic.h> #include <asm/irq.h> #include <asm/io.h> @@ -59,22 +58,18 @@ static DEFINE_MUTEX(clocks_mutex); void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable) { unsigned long clkcon; - unsigned long flags; - - local_irq_save(flags); clkcon = __raw_readl(S3C2410_CLKCON); - clkcon &= ~clocks; if (enable) clkcon |= clocks; + else + clkcon &= ~clocks; /* ensure none of the special function bits set */ clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); __raw_writel(clkcon, S3C2410_CLKCON); - - local_irq_restore(flags); } /* enable and disable calls for use with the clk struct */ @@ -138,16 +133,32 @@ void clk_put(struct clk *clk) int clk_enable(struct clk *clk) { - if (IS_ERR(clk)) + if (IS_ERR(clk) || clk == NULL) return -EINVAL; - return (clk->enable)(clk, 1); + clk_enable(clk->parent); + + mutex_lock(&clocks_mutex); + + if ((clk->usage++) == 0) + (clk->enable)(clk, 1); + + mutex_unlock(&clocks_mutex); + return 0; } void clk_disable(struct clk *clk) { - if (!IS_ERR(clk)) + if (IS_ERR(clk) || clk == NULL) + return; + + mutex_lock(&clocks_mutex); + + if ((--clk->usage) == 0) (clk->enable)(clk, 0); + + mutex_unlock(&clocks_mutex); + clk_disable(clk->parent); } @@ -361,6 +372,14 @@ int s3c24xx_register_clock(struct clk *clk) if (clk->enable == NULL) clk->enable = clk_null_enable; + /* if this is a standard clock, set the usage state */ + + if (clk->ctrlbit) { + unsigned long clkcon = __raw_readl(S3C2410_CLKCON); + + clk->usage = (clkcon & clk->ctrlbit) ? 1 : 0; + } + /* add to the list of available clocks */ mutex_lock(&clocks_mutex); @@ -402,6 +421,8 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, * the LCD clock if it is not needed. */ + mutex_lock(&clocks_mutex); + s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0); s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0); s3c24xx_clk_enable(S3C2410_CLKCON_USBD, 0); @@ -409,6 +430,8 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, s3c24xx_clk_enable(S3C2410_CLKCON_IIC, 0); s3c24xx_clk_enable(S3C2410_CLKCON_SPI, 0); + mutex_unlock(&clocks_mutex); + /* assume uart clocks are correctly setup */ /* register our clocks */ diff --git a/arch/arm/mach-s3c2410/clock.h b/arch/arm/mach-s3c2410/clock.h index 177d5c8decf7..eb5c95d1e7f2 100644 --- a/arch/arm/mach-s3c2410/clock.h +++ b/arch/arm/mach-s3c2410/clock.h @@ -16,6 +16,7 @@ struct clk { struct clk *parent; const char *name; int id; + int usage; unsigned long rate; unsigned long ctrlbit; int (*enable)(struct clk *, int enable); diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c index 687fe371369d..00a379334b60 100644 --- a/arch/arm/mach-s3c2410/cpu.c +++ b/arch/arm/mach-s3c2410/cpu.c @@ -40,6 +40,7 @@ #include "cpu.h" #include "clock.h" +#include "s3c2400.h" #include "s3c2410.h" #include "s3c2440.h" @@ -55,6 +56,7 @@ struct cpu_table { /* table of supported CPUs */ +static const char name_s3c2400[] = "S3C2400"; static const char name_s3c2410[] = "S3C2410"; static const char name_s3c2440[] = "S3C2440"; static const char name_s3c2410a[] = "S3C2410A"; @@ -96,7 +98,16 @@ static struct cpu_table cpu_ids[] __initdata = { .init_uarts = s3c2440_init_uarts, .init = s3c2440_init, .name = name_s3c2440a - } + }, + { + .idcode = 0x0, /* S3C2400 doesn't have an idcode */ + .idmask = 0xffffffff, + .map_io = s3c2400_map_io, + .init_clocks = s3c2400_init_clocks, + .init_uarts = s3c2400_init_uarts, + .init = s3c2400_init, + .name = name_s3c2400 + }, }; /* minimal IO mapping */ @@ -148,12 +159,15 @@ static struct cpu_table *cpu; void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) { - unsigned long idcode; + unsigned long idcode = 0x0; /* initialise the io descriptors we need for initialisation */ iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); +#ifndef CONFIG_CPU_S3C2400 idcode = __raw_readl(S3C2410_GSTATUS1); +#endif + cpu = s3c_lookup_cpu(idcode); if (cpu == NULL) { diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c index b8d994a24d1c..0a47d38789a5 100644 --- a/arch/arm/mach-s3c2410/devs.c +++ b/arch/arm/mach-s3c2410/devs.c @@ -275,6 +275,11 @@ static struct resource s3c_adc_resource[] = { }, [1] = { .start = IRQ_TC, + .end = IRQ_TC, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = IRQ_ADC, .end = IRQ_ADC, .flags = IORESOURCE_IRQ, } diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index 23ea3d5fa09c..cd39e8684584 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c @@ -31,6 +31,7 @@ * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code * 13-Mar-2005 BJD Updates for __iomem * 26-Oct-2005 BJD Added generic configuration types + * 15-Jan-2006 LCVR Added support for the S3C2400 */ @@ -48,7 +49,7 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) { - void __iomem *base = S3C2410_GPIO_BASE(pin); + void __iomem *base = S3C24XX_GPIO_BASE(pin); unsigned long mask; unsigned long con; unsigned long flags; @@ -95,7 +96,7 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin); unsigned int s3c2410_gpio_getcfg(unsigned int pin) { - void __iomem *base = S3C2410_GPIO_BASE(pin); + void __iomem *base = S3C24XX_GPIO_BASE(pin); unsigned long mask; if (pin < S3C2410_GPIO_BANKB) { @@ -111,7 +112,7 @@ EXPORT_SYMBOL(s3c2410_gpio_getcfg); void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) { - void __iomem *base = S3C2410_GPIO_BASE(pin); + void __iomem *base = S3C24XX_GPIO_BASE(pin); unsigned long offs = S3C2410_GPIO_OFFSET(pin); unsigned long flags; unsigned long up; @@ -133,7 +134,7 @@ EXPORT_SYMBOL(s3c2410_gpio_pullup); void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) { - void __iomem *base = S3C2410_GPIO_BASE(pin); + void __iomem *base = S3C24XX_GPIO_BASE(pin); unsigned long offs = S3C2410_GPIO_OFFSET(pin); unsigned long flags; unsigned long dat; @@ -152,7 +153,7 @@ EXPORT_SYMBOL(s3c2410_gpio_setpin); unsigned int s3c2410_gpio_getpin(unsigned int pin) { - void __iomem *base = S3C2410_GPIO_BASE(pin); + void __iomem *base = S3C24XX_GPIO_BASE(pin); unsigned long offs = S3C2410_GPIO_OFFSET(pin); return __raw_readl(base + 0x04) & (1<< offs); @@ -166,70 +167,13 @@ unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) unsigned long misccr; local_irq_save(flags); - misccr = __raw_readl(S3C2410_MISCCR); + misccr = __raw_readl(S3C24XX_MISCCR); misccr &= ~clear; misccr ^= change; - __raw_writel(misccr, S3C2410_MISCCR); + __raw_writel(misccr, S3C24XX_MISCCR); local_irq_restore(flags); return misccr; } EXPORT_SYMBOL(s3c2410_modify_misccr); - -int s3c2410_gpio_getirq(unsigned int pin) -{ - if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23) - return -1; /* not valid interrupts */ - - if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) - return -1; /* not valid pin */ - - if (pin < S3C2410_GPF4) - return (pin - S3C2410_GPF0) + IRQ_EINT0; - - if (pin < S3C2410_GPG0) - return (pin - S3C2410_GPF4) + IRQ_EINT4; - - return (pin - S3C2410_GPG0) + IRQ_EINT8; -} - -EXPORT_SYMBOL(s3c2410_gpio_getirq); - -int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, - unsigned int config) -{ - void __iomem *reg = S3C2410_EINFLT0; - unsigned long flags; - unsigned long val; - - if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15) - return -1; - - config &= 0xff; - - pin -= S3C2410_GPG8_EINT16; - reg += pin & ~3; - - local_irq_save(flags); - - /* update filter width and clock source */ - - val = __raw_readl(reg); - val &= ~(0xff << ((pin & 3) * 8)); - val |= config << ((pin & 3) * 8); - __raw_writel(val, reg); - - /* update filter enable */ - - val = __raw_readl(S3C2410_EXTINT2); - val &= ~(1 << ((pin * 4) + 3)); - val |= on << ((pin * 4) + 3); - __raw_writel(val, S3C2410_EXTINT2); - - local_irq_restore(flags); - - return 0; -} - -EXPORT_SYMBOL(s3c2410_gpio_irqfilter); diff --git a/arch/arm/mach-s3c2410/s3c2400-gpio.c b/arch/arm/mach-s3c2410/s3c2400-gpio.c new file mode 100644 index 000000000000..5127f39fa9bf --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2400-gpio.c @@ -0,0 +1,45 @@ +/* linux/arch/arm/mach-s3c2410/gpio.c + * + * Copyright (c) 2006 Lucas Correia Villa Real <lucasvr@gobolinux.org> + * + * S3C2400 GPIO support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Changelog + * 15-Jan-2006 LCVR Splitted from gpio.c, adding support for the S3C2400 + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/io.h> + +#include <asm/arch/regs-gpio.h> + +int s3c2400_gpio_getirq(unsigned int pin) +{ + if (pin < S3C2410_GPE0 || pin > S3C2400_GPE7_EINT7) + return -1; /* not valid interrupts */ + + return (pin - S3C2410_GPE0) + IRQ_EINT0; +} + +EXPORT_SYMBOL(s3c2400_gpio_getirq); diff --git a/arch/arm/mach-s3c2410/s3c2410-gpio.c b/arch/arm/mach-s3c2410/s3c2410-gpio.c new file mode 100644 index 000000000000..d5e1caea1d23 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2410-gpio.c @@ -0,0 +1,93 @@ +/* linux/arch/arm/mach-s3c2410/gpio.c + * + * Copyright (c) 2004-2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2410 GPIO support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Changelog + * 15-Jan-2006 LCVR Splitted from gpio.c + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> + +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/io.h> + +#include <asm/arch/regs-gpio.h> + +int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, + unsigned int config) +{ + void __iomem *reg = S3C2410_EINFLT0; + unsigned long flags; + unsigned long val; + + if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15) + return -1; + + config &= 0xff; + + pin -= S3C2410_GPG8_EINT16; + reg += pin & ~3; + + local_irq_save(flags); + + /* update filter width and clock source */ + + val = __raw_readl(reg); + val &= ~(0xff << ((pin & 3) * 8)); + val |= config << ((pin & 3) * 8); + __raw_writel(val, reg); + + /* update filter enable */ + + val = __raw_readl(S3C2410_EXTINT2); + val &= ~(1 << ((pin * 4) + 3)); + val |= on << ((pin * 4) + 3); + __raw_writel(val, S3C2410_EXTINT2); + + local_irq_restore(flags); + + return 0; +} + +EXPORT_SYMBOL(s3c2410_gpio_irqfilter); + +int s3c2410_gpio_getirq(unsigned int pin) +{ + if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23) + return -1; /* not valid interrupts */ + + if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) + return -1; /* not valid pin */ + + if (pin < S3C2410_GPF4) + return (pin - S3C2410_GPF0) + IRQ_EINT0; + + if (pin < S3C2410_GPG0) + return (pin - S3C2410_GPF4) + IRQ_EINT4; + + return (pin - S3C2410_GPG0) + IRQ_EINT8; +} + +EXPORT_SYMBOL(s3c2410_gpio_getirq); diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index e9a055b779b7..832fb86a03b4 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S @@ -72,7 +72,7 @@ ENTRY(s3c2410_cpu_suspend) @@ prepare cpu to sleep ldr r4, =S3C2410_REFRESH - ldr r5, =S3C2410_MISCCR + ldr r5, =S3C24XX_MISCCR ldr r6, =S3C2410_CLKCON ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB) ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB) |