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-rw-r--r--arch/arm/mach-s3c24xx/irq-s3c24xx.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/mach-s3c24xx/irq-s3c24xx.c b/arch/arm/mach-s3c24xx/irq-s3c24xx.c
index b0e879ee14c1..3965347cacf0 100644
--- a/arch/arm/mach-s3c24xx/irq-s3c24xx.c
+++ b/arch/arm/mach-s3c24xx/irq-s3c24xx.c
@@ -376,14 +376,17 @@ asmlinkage void __exception_irq_entry s3c24xx_handle_irq(struct pt_regs *regs)
/**
* s3c24xx_set_fiq - set the FIQ routing
* @irq: IRQ number to route to FIQ on processor.
+ * @ack_ptr: pointer to a location for storing the bit mask
* @on: Whether to route @irq to the FIQ, or to remove the FIQ routing.
*
* Change the state of the IRQ to FIQ routing depending on @irq and @on. If
* @on is true, the @irq is checked to see if it can be routed and the
* interrupt controller updated to route the IRQ. If @on is false, the FIQ
* routing is cleared, regardless of which @irq is specified.
+ *
+ * returns the mask value for the register.
*/
-int s3c24xx_set_fiq(unsigned int irq, bool on)
+int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on)
{
u32 intmod;
unsigned offs;
@@ -391,15 +394,18 @@ int s3c24xx_set_fiq(unsigned int irq, bool on)
if (on) {
offs = irq - FIQ_START;
if (offs > 31)
- return -EINVAL;
+ return 0;
intmod = 1 << offs;
} else {
intmod = 0;
}
+ if (ack_ptr)
+ *ack_ptr = intmod;
writel_relaxed(intmod, S3C2410_INTMOD);
- return 0;
+
+ return intmod;
}
EXPORT_SYMBOL_GPL(s3c24xx_set_fiq);