diff options
Diffstat (limited to 'arch/arm/mach-s5p6442')
| -rw-r--r-- | arch/arm/mach-s5p6442/clock.c | 16 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6442/dev-audio.c | 44 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6442/include/mach/map.h | 68 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6442/mach-smdk6442.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6442/setup-i2c0.c | 5 |
5 files changed, 93 insertions, 51 deletions
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c index 16d6e7e61b50..fbbc7bede685 100644 --- a/arch/arm/mach-s5p6442/clock.c +++ b/arch/arm/mach-s5p6442/clock.c @@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void) clk_pclkd1.rate = pclkd1; } -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "pdma", .id = -1, @@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = { void __init s5p6442_register_clocks(void) { - struct clk *clkptr; - int i, ret; - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkptr = init_clocks_disable; - for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) { - ret = s3c24xx_register_clock(clkptr); - if (ret < 0) { - printk(KERN_ERR "Fail to register clock %s (%d)\n", - clkptr->name, ret); - } else - (clkptr->enable)(clkptr, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c index 3462197ff352..8719dc41fe32 100644 --- a/arch/arm/mach-s5p6442/dev-audio.c +++ b/arch/arm/mach-s5p6442/dev-audio.c @@ -29,7 +29,7 @@ static int s5p6442_cfg_i2s(struct platform_device *pdev) base = S5P6442_GPC1(0); break; - case -1: + case 0: base = S5P6442_GPC0(0); break; @@ -42,8 +42,19 @@ static int s5p6442_cfg_i2s(struct platform_device *pdev) return 0; } -static struct s3c_audio_pdata s3c_i2s_pdata = { +static const char *rclksrc_v35[] = { + [0] = "busclk", + [1] = "i2sclk", +}; + +static struct s3c_audio_pdata i2sv35_pdata = { .cfg_gpio = s5p6442_cfg_i2s, + .type = { + .i2s = { + .quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, + .src_clk = rclksrc_v35, + }, + }, }; static struct resource s5p6442_iis0_resource[] = { @@ -62,15 +73,34 @@ static struct resource s5p6442_iis0_resource[] = { .end = DMACH_I2S0_RX, .flags = IORESOURCE_DMA, }, + [3] = { + .start = DMACH_I2S0S_TX, + .end = DMACH_I2S0S_TX, + .flags = IORESOURCE_DMA, + }, }; struct platform_device s5p6442_device_iis0 = { - .name = "s3c64xx-iis-v4", - .id = -1, + .name = "samsung-i2s", + .id = 0, .num_resources = ARRAY_SIZE(s5p6442_iis0_resource), .resource = s5p6442_iis0_resource, .dev = { - .platform_data = &s3c_i2s_pdata, + .platform_data = &i2sv35_pdata, + }, +}; + +static const char *rclksrc_v3[] = { + [0] = "iis", + [1] = "sclk_audio", +}; + +static struct s3c_audio_pdata i2sv3_pdata = { + .cfg_gpio = s5p6442_cfg_i2s, + .type = { + .i2s = { + .src_clk = rclksrc_v3, + }, }, }; @@ -93,12 +123,12 @@ static struct resource s5p6442_iis1_resource[] = { }; struct platform_device s5p6442_device_iis1 = { - .name = "s3c64xx-iis", + .name = "samsung-i2s", .id = 1, .num_resources = ARRAY_SIZE(s5p6442_iis1_resource), .resource = s5p6442_iis1_resource, .dev = { - .platform_data = &s3c_i2s_pdata, + .platform_data = &i2sv3_pdata, }, }; diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 31fb2e68d527..058dab4482a1 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h @@ -1,6 +1,6 @@ /* linux/arch/arm/mach-s5p6442/include/mach/map.h * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * * S5P6442 - Memory map definitions @@ -16,53 +16,61 @@ #include <plat/map-base.h> #include <plat/map-s5p.h> -#define S5P6442_PA_CHIPID (0xE0000000) -#define S5P_PA_CHIPID S5P6442_PA_CHIPID +#define S5P6442_PA_SDRAM 0x20000000 -#define S5P6442_PA_SYSCON (0xE0100000) -#define S5P_PA_SYSCON S5P6442_PA_SYSCON +#define S5P6442_PA_I2S0 0xC0B00000 +#define S5P6442_PA_I2S1 0xF2200000 -#define S5P6442_PA_GPIO (0xE0200000) +#define S5P6442_PA_CHIPID 0xE0000000 -#define S5P6442_PA_VIC0 (0xE4000000) -#define S5P6442_PA_VIC1 (0xE4100000) -#define S5P6442_PA_VIC2 (0xE4200000) +#define S5P6442_PA_SYSCON 0xE0100000 -#define S5P6442_PA_MDMA 0xE8000000 -#define S5P6442_PA_PDMA 0xE9000000 +#define S5P6442_PA_GPIO 0xE0200000 -#define S5P6442_PA_TIMER (0xEA000000) -#define S5P_PA_TIMER S5P6442_PA_TIMER +#define S5P6442_PA_VIC0 0xE4000000 +#define S5P6442_PA_VIC1 0xE4100000 +#define S5P6442_PA_VIC2 0xE4200000 -#define S5P6442_PA_SYSTIMER (0xEA100000) +#define S5P6442_PA_SROMC 0xE7000000 -#define S5P6442_PA_WATCHDOG (0xEA200000) +#define S5P6442_PA_MDMA 0xE8000000 +#define S5P6442_PA_PDMA 0xE9000000 -#define S5P6442_PA_UART (0xEC000000) +#define S5P6442_PA_TIMER 0xEA000000 -#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) -#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400) -#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800) -#define S5P_SZ_UART SZ_256 +#define S5P6442_PA_SYSTIMER 0xEA100000 -#define S5P6442_PA_IIC0 (0xEC100000) +#define S5P6442_PA_WATCHDOG 0xEA200000 -#define S5P6442_PA_SDRAM (0x20000000) -#define S5P_PA_SDRAM S5P6442_PA_SDRAM +#define S5P6442_PA_UART 0xEC000000 -#define S5P6442_PA_SPI 0xEC300000 +#define S5P6442_PA_IIC0 0xEC100000 -/* I2S */ -#define S5P6442_PA_I2S0 0xC0B00000 -#define S5P6442_PA_I2S1 0xF2200000 +#define S5P6442_PA_SPI 0xEC300000 -/* PCM */ #define S5P6442_PA_PCM0 0xF2400000 #define S5P6442_PA_PCM1 0xF2500000 -/* compatibiltiy defines. */ +/* Compatibiltiy Defines */ + +#define S3C_PA_IIC S5P6442_PA_IIC0 #define S3C_PA_WDT S5P6442_PA_WATCHDOG + +#define S5P_PA_CHIPID S5P6442_PA_CHIPID +#define S5P_PA_SDRAM S5P6442_PA_SDRAM +#define S5P_PA_SROMC S5P6442_PA_SROMC +#define S5P_PA_SYSCON S5P6442_PA_SYSCON +#define S5P_PA_TIMER S5P6442_PA_TIMER + +/* UART */ + #define S3C_PA_UART S5P6442_PA_UART -#define S3C_PA_IIC S5P6442_PA_IIC0 + +#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) +#define S5P_PA_UART0 S5P_PA_UART(0) +#define S5P_PA_UART1 S5P_PA_UART(1) +#define S5P_PA_UART2 S5P_PA_UART(2) + +#define S5P_SZ_UART SZ_256 #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c index 819fd80d00af..eaf6b9c489ff 100644 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ b/arch/arm/mach-s5p6442/mach-smdk6442.c @@ -12,6 +12,7 @@ #include <linux/types.h> #include <linux/init.h> #include <linux/serial_core.h> +#include <linux/i2c.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -25,6 +26,7 @@ #include <plat/s5p6442.h> #include <plat/devs.h> #include <plat/cpu.h> +#include <plat/iic.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -65,10 +67,16 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { }; static struct platform_device *smdk6442_devices[] __initdata = { + &s3c_device_i2c0, + &samsung_asoc_dma, &s5p6442_device_iis0, &s3c_device_wdt, }; +static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = { + { I2C_BOARD_INFO("wm8580", 0x1b), }, +}; + static void __init smdk6442_map_io(void) { s5p_init_io(NULL, 0, S5P_VA_CHIPID); @@ -78,6 +86,9 @@ static void __init smdk6442_map_io(void) static void __init smdk6442_machine_init(void) { + s3c_i2c0_set_platdata(NULL); + i2c_register_board_info(0, smdk6442_i2c_devs0, + ARRAY_SIZE(smdk6442_i2c_devs0)); platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices)); } diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c index 662695dd7761..aad85656b0cc 100644 --- a/arch/arm/mach-s5p6442/setup-i2c0.c +++ b/arch/arm/mach-s5p6442/setup-i2c0.c @@ -14,12 +14,15 @@ #include <linux/kernel.h> #include <linux/types.h> +#include <linux/gpio.h> struct platform_device; /* don't need the contents */ +#include <plat/gpio-cfg.h> #include <plat/iic.h> void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - /* Will be populated later */ + s3c_gpio_cfgall_range(S5P6442_GPD1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } |