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-rw-r--r--arch/arm/mach-ux500/Kconfig3
-rw-r--r--arch/arm/mach-ux500/Makefile3
-rw-r--r--arch/arm/mach-ux500/board-mop500-msp.c267
-rw-r--r--arch/arm/mach-ux500/board-mop500-msp.h14
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c733
-rw-r--r--arch/arm/mach-ux500/board-mop500.c99
-rw-r--r--arch/arm/mach-ux500/board-mop500.h10
-rw-r--r--arch/arm/mach-ux500/clock.c8
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c1
-rw-r--r--arch/arm/mach-ux500/cpu.c12
-rw-r--r--arch/arm/mach-ux500/devices-common.h12
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h10
-rw-r--r--arch/arm/mach-ux500/include/mach/msp.h29
-rw-r--r--arch/arm/mach-ux500/pins-db8500.h72
14 files changed, 928 insertions, 345 deletions
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 0e8470a3fbeb..53d3d46dec12 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -9,6 +9,8 @@ config UX500_SOC_COMMON
select ARM_ERRATA_754322
select ARM_ERRATA_764369
select CACHE_L2X0
+ select PINCTRL
+ select PINCTRL_NOMADIK
config UX500_SOC_DB8500
bool
@@ -16,6 +18,7 @@ config UX500_SOC_DB8500
select REGULATOR
select REGULATOR_DB8500_PRCMU
select CPU_FREQ_TABLE if CPU_FREQ
+ select PINCTRL_DB8500
menu "Ux500 target platform (boards)"
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index fc7db5df970b..041c35885981 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \
board-mop500-regulators.o \
board-mop500-uib.o board-mop500-stuib.o \
board-mop500-u8500uib.o \
- board-mop500-pins.o
+ board-mop500-pins.o \
+ board-mop500-msp.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-ux500/board-mop500-msp.c b/arch/arm/mach-ux500/board-mop500-msp.c
new file mode 100644
index 000000000000..996048038743
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500-msp.c
@@ -0,0 +1,267 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * License terms: GNU General Public License (GPL), version 2
+ */
+
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/pinctrl/consumer.h>
+
+#include <plat/gpio-nomadik.h>
+#include <plat/pincfg.h>
+#include <plat/ste_dma40.h>
+
+#include <mach/devices.h>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <mach/msp.h>
+
+#include "ste-dma40-db8500.h"
+#include "board-mop500.h"
+#include "devices-db8500.h"
+#include "pins-db8500.h"
+
+/* MSP1/3 Tx/Rx usage protection */
+static DEFINE_SPINLOCK(msp_rxtx_lock);
+
+/* Reference Count */
+static int msp_rxtx_ref;
+
+/* Pin modes */
+struct pinctrl *msp1_p;
+struct pinctrl_state *msp1_def;
+struct pinctrl_state *msp1_sleep;
+
+int msp13_i2s_init(void)
+{
+ int retval = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(&msp_rxtx_lock, flags);
+ if (msp_rxtx_ref == 0 && !(IS_ERR(msp1_p) || IS_ERR(msp1_def))) {
+ retval = pinctrl_select_state(msp1_p, msp1_def);
+ if (retval)
+ pr_err("could not set MSP1 defstate\n");
+ }
+ if (!retval)
+ msp_rxtx_ref++;
+ spin_unlock_irqrestore(&msp_rxtx_lock, flags);
+
+ return retval;
+}
+
+int msp13_i2s_exit(void)
+{
+ int retval = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(&msp_rxtx_lock, flags);
+ WARN_ON(!msp_rxtx_ref);
+ msp_rxtx_ref--;
+ if (msp_rxtx_ref == 0 && !(IS_ERR(msp1_p) || IS_ERR(msp1_sleep))) {
+ retval = pinctrl_select_state(msp1_p, msp1_sleep);
+ if (retval)
+ pr_err("could not set MSP1 sleepstate\n");
+ }
+ spin_unlock_irqrestore(&msp_rxtx_lock, flags);
+
+ return retval;
+}
+
+static struct stedma40_chan_cfg msp0_dma_rx = {
+ .high_priority = true,
+ .dir = STEDMA40_PERIPH_TO_MEM,
+
+ .src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,
+ .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
+
+ .src_info.psize = STEDMA40_PSIZE_LOG_4,
+ .dst_info.psize = STEDMA40_PSIZE_LOG_4,
+
+ /* data_width is set during configuration */
+};
+
+static struct stedma40_chan_cfg msp0_dma_tx = {
+ .high_priority = true,
+ .dir = STEDMA40_MEM_TO_PERIPH,
+
+ .src_dev_type = STEDMA40_DEV_DST_MEMORY,
+ .dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,
+
+ .src_info.psize = STEDMA40_PSIZE_LOG_4,
+ .dst_info.psize = STEDMA40_PSIZE_LOG_4,
+
+ /* data_width is set during configuration */
+};
+
+static struct msp_i2s_platform_data msp0_platform_data = {
+ .id = MSP_I2S_0,
+ .msp_i2s_dma_rx = &msp0_dma_rx,
+ .msp_i2s_dma_tx = &msp0_dma_tx,
+};
+
+static struct stedma40_chan_cfg msp1_dma_rx = {
+ .high_priority = true,
+ .dir = STEDMA40_PERIPH_TO_MEM,
+
+ .src_dev_type = DB8500_DMA_DEV30_MSP3_RX,
+ .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
+
+ .src_info.psize = STEDMA40_PSIZE_LOG_4,
+ .dst_info.psize = STEDMA40_PSIZE_LOG_4,
+
+ /* data_width is set during configuration */
+};
+
+static struct stedma40_chan_cfg msp1_dma_tx = {
+ .high_priority = true,
+ .dir = STEDMA40_MEM_TO_PERIPH,
+
+ .src_dev_type = STEDMA40_DEV_DST_MEMORY,
+ .dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,
+
+ .src_info.psize = STEDMA40_PSIZE_LOG_4,
+ .dst_info.psize = STEDMA40_PSIZE_LOG_4,
+
+ /* data_width is set during configuration */
+};
+
+static struct msp_i2s_platform_data msp1_platform_data = {
+ .id = MSP_I2S_1,
+ .msp_i2s_dma_rx = NULL,
+ .msp_i2s_dma_tx = &msp1_dma_tx,
+ .msp_i2s_init = msp13_i2s_init,
+ .msp_i2s_exit = msp13_i2s_exit,
+};
+
+static struct stedma40_chan_cfg msp2_dma_rx = {
+ .high_priority = true,
+ .dir = STEDMA40_PERIPH_TO_MEM,
+
+ .src_dev_type = DB8500_DMA_DEV14_MSP2_RX,
+ .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
+
+ /* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */
+ .src_info.psize = STEDMA40_PSIZE_LOG_1,
+ .dst_info.psize = STEDMA40_PSIZE_LOG_1,
+
+ /* data_width is set during configuration */
+};
+
+static struct stedma40_chan_cfg msp2_dma_tx = {
+ .high_priority = true,
+ .dir = STEDMA40_MEM_TO_PERIPH,
+
+ .src_dev_type = STEDMA40_DEV_DST_MEMORY,
+ .dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,
+
+ .src_info.psize = STEDMA40_PSIZE_LOG_4,
+ .dst_info.psize = STEDMA40_PSIZE_LOG_4,
+
+ .use_fixed_channel = true,
+ .phy_channel = 1,
+
+ /* data_width is set during configuration */
+};
+
+static struct platform_device *db8500_add_msp_i2s(struct device *parent,
+ int id,
+ resource_size_t base, int irq,
+ struct msp_i2s_platform_data *pdata)
+{
+ struct platform_device *pdev;
+ struct resource res[] = {
+ DEFINE_RES_MEM(base, SZ_4K),
+ DEFINE_RES_IRQ(irq),
+ };
+
+ pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",
+ id, irq);
+ pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,
+ res, ARRAY_SIZE(res),
+ pdata, sizeof(*pdata));
+ if (!pdev) {
+ pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",
+ id);
+ return NULL;
+ }
+
+ return pdev;
+}
+
+/* Platform device for ASoC U8500 machine */
+static struct platform_device snd_soc_u8500 = {
+ .name = "snd-soc-u8500",
+ .id = 0,
+ .dev = {
+ .platform_data = NULL,
+ },
+};
+
+/* Platform device for Ux500-PCM */
+static struct platform_device ux500_pcm = {
+ .name = "ux500-pcm",
+ .id = 0,
+ .dev = {
+ .platform_data = NULL,
+ },
+};
+
+static struct msp_i2s_platform_data msp2_platform_data = {
+ .id = MSP_I2S_2,
+ .msp_i2s_dma_rx = &msp2_dma_rx,
+ .msp_i2s_dma_tx = &msp2_dma_tx,
+};
+
+static struct msp_i2s_platform_data msp3_platform_data = {
+ .id = MSP_I2S_3,
+ .msp_i2s_dma_rx = &msp1_dma_rx,
+ .msp_i2s_dma_tx = NULL,
+ .msp_i2s_init = msp13_i2s_init,
+ .msp_i2s_exit = msp13_i2s_exit,
+};
+
+int mop500_msp_init(struct device *parent)
+{
+ struct platform_device *msp1;
+
+ pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
+ platform_device_register(&snd_soc_u8500);
+
+ pr_info("Initialize MSP I2S-devices.\n");
+ db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
+ &msp0_platform_data);
+ msp1 = db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
+ &msp1_platform_data);
+ db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
+ &msp2_platform_data);
+ db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
+ &msp3_platform_data);
+
+ /* Get the pinctrl handle for MSP1 */
+ if (msp1) {
+ msp1_p = pinctrl_get(&msp1->dev);
+ if (IS_ERR(msp1_p))
+ dev_err(&msp1->dev, "could not get MSP1 pinctrl\n");
+ else {
+ msp1_def = pinctrl_lookup_state(msp1_p,
+ PINCTRL_STATE_DEFAULT);
+ if (IS_ERR(msp1_def)) {
+ dev_err(&msp1->dev,
+ "could not get MSP1 defstate\n");
+ }
+ msp1_sleep = pinctrl_lookup_state(msp1_p,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(msp1_sleep))
+ dev_err(&msp1->dev,
+ "could not get MSP1 idlestate\n");
+ }
+ }
+
+ pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
+ platform_device_register(&ux500_pcm);
+
+ return 0;
+}
diff --git a/arch/arm/mach-ux500/board-mop500-msp.h b/arch/arm/mach-ux500/board-mop500-msp.h
new file mode 100644
index 000000000000..6fcfb5e2cc94
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500-msp.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
+ * for ST-Ericsson.
+ *
+ * License terms:
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+void mop500_msp_init(struct device *parent);
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index f5413dca532c..32fd99204464 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -7,299 +7,508 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/bug.h>
+#include <linux/string.h>
+#include <linux/pinctrl/machine.h>
#include <asm/mach-types.h>
#include <plat/pincfg.h>
#include <plat/gpio-nomadik.h>
+
#include <mach/hardware.h>
#include "pins-db8500.h"
+#include "board-mop500.h"
-static pin_cfg_t mop500_pins_common[] = {
- /* I2C */
- GPIO147_I2C0_SCL,
- GPIO148_I2C0_SDA,
- GPIO16_I2C1_SCL,
- GPIO17_I2C1_SDA,
- GPIO10_I2C2_SDA,
- GPIO11_I2C2_SCL,
- GPIO229_I2C3_SDA,
- GPIO230_I2C3_SCL,
-
- /* MSP0 */
- GPIO12_MSP0_TXD,
- GPIO13_MSP0_TFS,
- GPIO14_MSP0_TCK,
- GPIO15_MSP0_RXD,
-
- /* MSP2: HDMI */
- GPIO193_MSP2_TXD,
- GPIO194_MSP2_TCK,
- GPIO195_MSP2_TFS,
- GPIO196_MSP2_RXD | PIN_OUTPUT_LOW,
-
- /* Touch screen INTERFACE */
- GPIO84_GPIO | PIN_INPUT_PULLUP, /* TOUCH_INT1 */
-
- /* STMPE1601/tc35893 keypad IRQ */
- GPIO218_GPIO | PIN_INPUT_PULLUP,
-
- /* MMC0 (MicroSD card) */
- GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
- GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
- GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
-
- GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
- GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
- GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
- GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
- GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
- GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
- GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
-
- /* SDI1 (SDIO) */
- GPIO208_MC1_CLK | PIN_OUTPUT_LOW,
- GPIO209_MC1_FBCLK | PIN_INPUT_NOPULL,
- GPIO210_MC1_CMD | PIN_INPUT_PULLUP,
- GPIO211_MC1_DAT0 | PIN_INPUT_PULLUP,
- GPIO212_MC1_DAT1 | PIN_INPUT_PULLUP,
- GPIO213_MC1_DAT2 | PIN_INPUT_PULLUP,
- GPIO214_MC1_DAT3 | PIN_INPUT_PULLUP,
-
- /* MMC2 (On-board DATA INTERFACE eMMC) */
- GPIO128_MC2_CLK | PIN_OUTPUT_LOW,
- GPIO129_MC2_CMD | PIN_INPUT_PULLUP,
- GPIO130_MC2_FBCLK | PIN_INPUT_NOPULL,
- GPIO131_MC2_DAT0 | PIN_INPUT_PULLUP,
- GPIO132_MC2_DAT1 | PIN_INPUT_PULLUP,
- GPIO133_MC2_DAT2 | PIN_INPUT_PULLUP,
- GPIO134_MC2_DAT3 | PIN_INPUT_PULLUP,
- GPIO135_MC2_DAT4 | PIN_INPUT_PULLUP,
- GPIO136_MC2_DAT5 | PIN_INPUT_PULLUP,
- GPIO137_MC2_DAT6 | PIN_INPUT_PULLUP,
- GPIO138_MC2_DAT7 | PIN_INPUT_PULLUP,
-
- /* MMC4 (On-board STORAGE INTERFACE eMMC) */
- GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
- GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
- GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
- GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
- GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
- GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
- GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
- GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
- GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
- GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
- GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
-
- /* SKE keypad */
- GPIO153_KP_I7,
- GPIO154_KP_I6,
- GPIO155_KP_I5,
- GPIO156_KP_I4,
- GPIO157_KP_O7,
- GPIO158_KP_O6,
- GPIO159_KP_O5,
- GPIO160_KP_O4,
- GPIO161_KP_I3,
- GPIO162_KP_I2,
- GPIO163_KP_I1,
- GPIO164_KP_I0,
- GPIO165_KP_O3,
- GPIO166_KP_O2,
- GPIO167_KP_O1,
- GPIO168_KP_O0,
+enum custom_pin_cfg_t {
+ PINS_FOR_DEFAULT,
+ PINS_FOR_U9500,
+};
- /* UART */
- /* uart-0 pins gpio configuration should be
- * kept intact to prevent glitch in tx line
- * when tty dev is opened. Later these pins
+static enum custom_pin_cfg_t pinsfor;
+
+/* These simply sets bias for pins */
+#define BIAS(a,b) static unsigned long a[] = { b }
+
+BIAS(pd, PIN_PULL_DOWN);
+BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
+BIAS(in_nopull, PIN_INPUT_NOPULL);
+BIAS(in_nopull_sleep_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
+BIAS(in_pu, PIN_INPUT_PULLUP);
+BIAS(in_pd, PIN_INPUT_PULLDOWN);
+BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
+BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
+BIAS(out_hi, PIN_OUTPUT_HIGH);
+BIAS(out_lo, PIN_OUTPUT_LOW);
+BIAS(out_lo_sleep_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
+/* These also force them into GPIO mode */
+BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
+BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
+BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
+BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
+BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
+BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
+/* Sleep modes */
+BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
+BIAS(sleep_in_nopull_wkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE);
+BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
+BIAS(sleep_out_lo_wkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
+BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
+
+/* We use these to define hog settings that are always done on boot */
+#define DB8500_MUX_HOG(group,func) \
+ PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
+#define DB8500_PIN_HOG(pin,conf) \
+ PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
+
+/* These are default states associated with device and changed runtime */
+#define DB8500_MUX(group,func,dev) \
+ PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
+#define DB8500_PIN(pin,conf,dev) \
+ PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
+
+#define DB8500_PIN_SLEEP(pin,conf,dev) \
+ PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
+ pin, conf)
+
+/* Pin control settings */
+static struct pinctrl_map __initdata mop500_family_pinmap[] = {
+ /*
+ * uMSP0, mux in 4 pins, regular placement of RX/TX
+ * explicitly set the pins to no pull
+ */
+ DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
+ DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
+ DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
+ DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
+ DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
+ DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
+ /* MSP2 for HDMI, pull down TXD, TCK, TFS */
+ DB8500_MUX_HOG("msp2_a_1", "msp2"),
+ DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
+ DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
+ DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
+ DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
+ /*
+ * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
+ * pull-up
+ * TODO: is this really correct? Snowball doesn't have a LCD.
+ */
+ DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
+ DB8500_PIN_HOG("GPIO68_E1", in_pu),
+ DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
+ /*
+ * STMPE1601/tc35893 keypad IRQ GPIO 218
+ * TODO: set for snowball and HREF really??
+ */
+ DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
+ /*
+ * UART0, we do not mux in u0 here.
+ * uart-0 pins gpio configuration should be kept intact to prevent
+ * a glitch in tx line when the tty dev is opened. Later these pins
* are configured to uart mop500_pins_uart0
- *
- * It will be replaced with uart configuration
- * once the issue is solved.
*/
- GPIO0_GPIO | PIN_INPUT_PULLUP,
- GPIO1_GPIO | PIN_OUTPUT_HIGH,
- GPIO2_GPIO | PIN_INPUT_PULLUP,
- GPIO3_GPIO | PIN_OUTPUT_HIGH,
-
- GPIO29_U2_RXD | PIN_INPUT_PULLUP,
- GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
- GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
- GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
-
- /* Display & HDMI HW sync */
- GPIO68_LCD_VSI0 | PIN_INPUT_PULLUP,
- GPIO69_LCD_VSI1 | PIN_INPUT_PULLUP,
+ DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
+ DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
+ DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
+ DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
+ /*
+ * Mux in UART2 on altfunction C and set pull-ups.
+ * TODO: is this used on U8500 variants and Snowball really?
+ * The setting on GPIO31 conflicts with magnetometer use on hrefv60
+ */
+ DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
+ DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
+ DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
+ DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
+ DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
+ DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
+ /*
+ * The following pin sets were known as "runtime pins" before being
+ * converted to the pinctrl model. Here we model them as "default"
+ * states.
+ */
+ /* Mux in UART0 after initialization */
+ DB8500_MUX("u0_a_1", "u0", "uart0"),
+ DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
+ DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
+ DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
+ DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
+ /* UART0 sleep state */
+ DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"),
+ DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"),
+ DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"),
+ DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"),
+ /* MSP1 for ALSA codec */
+ DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
+ DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
+ DB8500_PIN("GPIO33_AF2", out_lo_sleep_nowkup, "ux500-msp-i2s.1"),
+ DB8500_PIN("GPIO34_AE1", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),
+ DB8500_PIN("GPIO35_AE2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),
+ DB8500_PIN("GPIO36_AG2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),
+ /* MSP1 sleep state */
+ DB8500_PIN_SLEEP("GPIO33_AF2", sleep_out_lo_wkup, "ux500-msp-i2s.1"),
+ DB8500_PIN_SLEEP("GPIO34_AE1", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),
+ DB8500_PIN_SLEEP("GPIO35_AE2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),
+ DB8500_PIN_SLEEP("GPIO36_AG2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),
+ /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
+ DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
+ DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
+ /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
+ DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),
+ /* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */
+ DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
+ DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"),
+ DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"),
+ DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
+ DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"),
+ DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"),
+ DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
+ DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"),
+ DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"),
+ DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
+ DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"),
+ DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"),
+ /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
+ DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
+ DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
+ DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
+ DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
+ DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
+ DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
+ DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
+ DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
+ DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
+ DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
+ DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
+ /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
+ DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
+ DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
+ DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
+ DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
+ DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
+ DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
+ DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
+ DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
+ /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
+ DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
+ DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
+ DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
+ DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
+ DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
+ DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
+ DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
+ DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
+ DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
+ DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
+ DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
+ DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
+ /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
+ DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
+ DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
+ DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
+ DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
+ DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
+ DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
+ DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
+ DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
+ DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
+ DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
+ DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
+ DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
+ /* Mux in USB pins, drive STP high */
+ DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
+ DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
+ /* Mux in SPI2 pins on the "other C1" altfunction */
+ DB8500_MUX("spi2_oc1_1", "spi2", "spi2"),
+ DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
+ DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
+ DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
+ DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
};
-static pin_cfg_t mop500_pins_default[] = {
- /* SSP0 */
- GPIO143_SSP0_CLK,
- GPIO144_SSP0_FRM,
- GPIO145_SSP0_RXD | PIN_PULL_DOWN,
- GPIO146_SSP0_TXD,
-
-
- GPIO217_GPIO | PIN_INPUT_PULLUP, /* TC35892 IRQ */
-
- /* SDI0 (MicroSD card) */
- GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
-
- /* UART */
- GPIO4_U1_RXD | PIN_INPUT_PULLUP,
- GPIO5_U1_TXD | PIN_OUTPUT_HIGH,
- GPIO6_U1_CTSn | PIN_INPUT_PULLUP,
- GPIO7_U1_RTSn | PIN_OUTPUT_HIGH,
+/*
+ * These are specifically for the MOP500 and HREFP (pre-v60) version of the
+ * board, which utilized a TC35892 GPIO expander instead of using a lot of
+ * on-chip pins as the HREFv60 and later does.
+ */
+static struct pinctrl_map __initdata mop500_pinmap[] = {
+ /* Mux in SSP0, pull down RXD pin */
+ DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
+ DB8500_PIN_HOG("GPIO145_C13", pd),
+ /*
+ * XENON Flashgun on image processor GPIO (controlled from image
+ * processor firmware), mux in these image processor GPIO lines 0
+ * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
+ * the pins.
+ */
+ DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
+ DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
+ DB8500_PIN_HOG("GPIO6_AF6", in_pu),
+ DB8500_PIN_HOG("GPIO7_AG5", in_pu),
+ /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
+ DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
+ /* Mux in UART1 and set the pull-ups */
+ DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
+ DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
+ DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
+ DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
+ DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
+ DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
+ /*
+ * Runtime stuff: make it possible to mux in the SKE keypad
+ * and bias the pins
+ */
+ DB8500_MUX("kp_a_2", "kp", "ske"),
+ DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
+ DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
+ DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
+ DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
+ DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
+ DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
+ DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
+ DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
+ DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
+ DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
+ DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
+ DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
+ DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
+ DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
+ DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
+ DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
+ /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
+ DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
+ DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
};
-static pin_cfg_t hrefv60_pins[] = {
- /* WLAN */
- GPIO4_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
- GPIO85_GPIO | PIN_OUTPUT_LOW,/* WLAN_ENA */
-
- /* XENON Flashgun INTERFACE */
- GPIO6_IP_GPIO0 | PIN_INPUT_PULLUP,/* XENON_FLASH_ID */
- GPIO7_IP_GPIO1 | PIN_INPUT_PULLUP,/* XENON_READY */
- GPIO170_GPIO | PIN_OUTPUT_LOW, /* XENON_CHARGE */
-
- /* Assistant LED INTERFACE */
- GPIO21_GPIO | PIN_OUTPUT_LOW, /* XENON_EN1 */
- GPIO64_IP_GPIO4 | PIN_OUTPUT_LOW, /* XENON_EN2 */
-
- /* Magnetometer */
- GPIO31_GPIO | PIN_INPUT_PULLUP, /* magnetometer_INT */
- GPIO32_GPIO | PIN_INPUT_PULLDOWN, /* Magnetometer DRDY */
-
- /* Display Interface */
- GPIO65_GPIO | PIN_OUTPUT_LOW, /* DISP1 RST */
- GPIO66_GPIO | PIN_OUTPUT_LOW, /* DISP2 RST */
-
- /* Touch screen INTERFACE */
- GPIO143_GPIO | PIN_OUTPUT_LOW,/*TOUCH_RST1 */
-
- /* Touch screen INTERFACE 2 */
- GPIO67_GPIO | PIN_INPUT_PULLUP, /* TOUCH_INT2 */
- GPIO146_GPIO | PIN_OUTPUT_LOW,/*TOUCH_RST2 */
-
- /* ETM_PTM_TRACE INTERFACE */
- GPIO70_GPIO | PIN_OUTPUT_LOW,/* ETM_PTM_DATA23 */
- GPIO71_GPIO | PIN_OUTPUT_LOW,/* ETM_PTM_DATA22 */
- GPIO72_GPIO | PIN_OUTPUT_LOW,/* ETM_PTM_DATA21 */
- GPIO73_GPIO | PIN_OUTPUT_LOW,/* ETM_PTM_DATA20 */
- GPIO74_GPIO | PIN_OUTPUT_LOW,/* ETM_PTM_DATA19 */
-
- /* NAHJ INTERFACE */
- GPIO76_GPIO | PIN_OUTPUT_LOW,/* NAHJ_CTRL */
- GPIO216_GPIO | PIN_OUTPUT_HIGH,/* NAHJ_CTRL_INV */
-
- /* NFC INTERFACE */
- GPIO77_GPIO | PIN_OUTPUT_LOW, /* NFC_ENA */
- GPIO144_GPIO | PIN_INPUT_PULLDOWN, /* NFC_IRQ */
- GPIO142_GPIO | PIN_OUTPUT_LOW, /* NFC_RESET */
-
- /* Keyboard MATRIX INTERFACE */
- GPIO90_MC5_CMD | PIN_OUTPUT_LOW, /* KP_O_1 */
- GPIO87_MC5_DAT1 | PIN_OUTPUT_LOW, /* KP_O_2 */
- GPIO86_MC5_DAT0 | PIN_OUTPUT_LOW, /* KP_O_3 */
- GPIO96_KP_O6 | PIN_OUTPUT_LOW, /* KP_O_6 */
- GPIO94_KP_O7 | PIN_OUTPUT_LOW, /* KP_O_7 */
- GPIO93_MC5_DAT4 | PIN_INPUT_PULLUP, /* KP_I_0 */
- GPIO89_MC5_DAT3 | PIN_INPUT_PULLUP, /* KP_I_2 */
- GPIO88_MC5_DAT2 | PIN_INPUT_PULLUP, /* KP_I_3 */
- GPIO91_GPIO | PIN_INPUT_PULLUP, /* FORCE_SENSING_INT */
- GPIO92_GPIO | PIN_OUTPUT_LOW, /* FORCE_SENSING_RST */
- GPIO97_GPIO | PIN_OUTPUT_LOW, /* FORCE_SENSING_WU */
-
- /* DiPro Sensor Interface */
- GPIO139_GPIO | PIN_INPUT_PULLUP, /* DIPRO_INT */
-
- /* HAL SWITCH INTERFACE */
- GPIO145_GPIO | PIN_INPUT_PULLDOWN,/* HAL_SW */
-
- /* Audio Amplifier Interface */
- GPIO149_GPIO | PIN_OUTPUT_LOW, /* VAUDIO_HF_EN */
-
- /* GBF INTERFACE */
- GPIO171_GPIO | PIN_OUTPUT_LOW, /* GBF_ENA_RESET */
-
- /* MSP : HDTV INTERFACE */
- GPIO192_GPIO | PIN_INPUT_PULLDOWN,
-
- /* ACCELEROMETER_INTERFACE */
- GPIO82_GPIO | PIN_INPUT_PULLUP, /* ACC_INT1 */
- GPIO83_GPIO | PIN_INPUT_PULLUP, /* ACC_INT2 */
-
- /* Proximity Sensor */
- GPIO217_GPIO | PIN_INPUT_PULLUP,
-
-
+/*
+ * The HREFv60 series of platforms is using available pins on the DB8500
+ * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
+ * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
+ */
+static struct pinctrl_map __initdata hrefv60_pinmap[] = {
+ /* Drive WLAN_ENA low */
+ DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
+ /*
+ * XENON Flashgun on image processor GPIO (controlled from image
+ * processor firmware), mux in these image processor GPIO lines 0
+ * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
+ * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
+ * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
+ */
+ DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
+ DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
+ DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
+ DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
+ DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
+ DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
+ DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
+ /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
+ DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
+ DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
+ /*
+ * Display Interface 1 uses GPIO 65 for RST (reset).
+ * Display Interface 2 uses GPIO 66 for RST (reset).
+ * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
+ */
+ DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
+ DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
+ /*
+ * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
+ * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
+ * reset signals low.
+ */
+ DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
+ DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
+ DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
+ /*
+ * Drive D19-D23 for the ETM PTM trace interface low,
+ * (presumably pins are unconnected therefore grounded here,
+ * the "other alt C1" setting enables these pins)
+ */
+ DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
+ DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
+ DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
+ DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
+ DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
+ /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
+ DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
+ DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
+ /* NFC ENA and RESET to low, pulldown IRQ line */
+ DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
+ DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
+ DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
+ /*
+ * SKE keyboard partly on alt A and partly on "Other alt C1"
+ * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
+ * rows of 6 keys, then pull up force sensing interrup and
+ * drive reset and force sensing WU low.
+ */
+ DB8500_MUX_HOG("kp_a_1", "kp"),
+ DB8500_MUX_HOG("kp_oc1_1", "kp"),
+ DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
+ DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
+ DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
+ DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
+ DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
+ DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
+ DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
+ DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
+ DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
+ DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
+ DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
+ /* DiPro Sensor interrupt */
+ DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
+ /* Audio Amplifier HF enable */
+ DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
+ /* GBF interface, pull low to reset state */
+ DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
+ /* MSP : HDTV INTERFACE GPIO line */
+ DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
+ /* Accelerometer interrupt lines */
+ DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
+ DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
+ /* SD card detect GPIO pin */
+ DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
+ /*
+ * Runtime stuff
+ * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
+ * etc.
+ */
+ DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
+ DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
+ DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
+ /*
+ * Make it possible to mux in the SKE keypad and bias the pins
+ * FIXME: what's the point with this on HREFv60? KP/SKE is already
+ * muxed in at another place! Enabling this will bork.
+ */
+ DB8500_MUX("kp_a_2", "kp", "ske"),
+ DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
+ DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
+ DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
+ DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
+ DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
+ DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
+ DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
+ DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
+ DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
+ DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
+ DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
+ DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
+ DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
+ DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
+ DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
+ DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
};
-static pin_cfg_t snowball_pins[] = {
- /* SSP0, to AB8500 */
- GPIO143_SSP0_CLK,
- GPIO144_SSP0_FRM,
- GPIO145_SSP0_RXD | PIN_PULL_DOWN,
- GPIO146_SSP0_TXD,
+static struct pinctrl_map __initdata u9500_pinmap[] = {
+ /* Mux in UART1 (just RX/TX) and set the pull-ups */
+ DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
+ DB8500_PIN_HOG("GPIO4_AH6", in_pu),
+ DB8500_PIN_HOG("GPIO5_AG6", out_hi),
+ /* WLAN_IRQ line */
+ DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
+ /* HSI */
+ DB8500_MUX_HOG("hsir_a_1", "hsi"),
+ DB8500_MUX_HOG("hsit_a_1", "hsi"),
+ DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
+ DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
+ DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
+ DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
+ DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
+ DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
+ DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
+ DB8500_PIN_HOG("GPIO226_AF8", out_hi), /* ACWAKE0 */
+};
- /* MMC0: MicroSD card */
- GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
+static struct pinctrl_map __initdata u8500_pinmap[] = {
+ DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
+ DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
+};
- /* MMC2: LAN */
- GPIO86_SM_ADQ0,
- GPIO87_SM_ADQ1,
- GPIO88_SM_ADQ2,
- GPIO89_SM_ADQ3,
- GPIO90_SM_ADQ4,
- GPIO91_SM_ADQ5,
- GPIO92_SM_ADQ6,
- GPIO93_SM_ADQ7,
+static struct pinctrl_map __initdata snowball_pinmap[] = {
+ /* Mux in SSP0 connected to AB8500, pull down RXD pin */
+ DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
+ DB8500_PIN_HOG("GPIO145_C13", pd),
+ /* Always drive the MC0 DAT31DIR line high on these boards */
+ DB8500_PIN_HOG("GPIO21_AB3", out_hi),
+ /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
+ DB8500_MUX_HOG("sm_b_1", "sm"),
+ /* Drive RSTn_LAN high */
+ DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
+ /* Accelerometer/Magnetometer */
+ DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
+ DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
+ DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
+ /* WLAN/GBF */
+ DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
+ DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
+ DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
+ DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
+};
- GPIO94_SM_ADVn,
- GPIO95_SM_CS0n,
- GPIO96_SM_OEn,
- GPIO97_SM_WEn,
+/*
+ * passing "pinsfor=" in kernel cmdline allows for custom
+ * configuration of GPIOs on u8500 derived boards.
+ */
+static int __init early_pinsfor(char *p)
+{
+ pinsfor = PINS_FOR_DEFAULT;
- GPIO128_SM_CKO,
- GPIO130_SM_FBCLK,
- GPIO131_SM_ADQ8,
- GPIO132_SM_ADQ9,
- GPIO133_SM_ADQ10,
- GPIO134_SM_ADQ11,
- GPIO135_SM_ADQ12,
- GPIO136_SM_ADQ13,
- GPIO137_SM_ADQ14,
- GPIO138_SM_ADQ15,
+ if (strcmp(p, "u9500-21") == 0)
+ pinsfor = PINS_FOR_U9500;
- /* RSTn_LAN */
- GPIO141_GPIO | PIN_OUTPUT_HIGH,
-};
+ return 0;
+}
+early_param("pinsfor", early_pinsfor);
-void __init mop500_pins_init(void)
+int pins_for_u9500(void)
{
- nmk_config_pins(mop500_pins_common,
- ARRAY_SIZE(mop500_pins_common));
+ if (pinsfor == PINS_FOR_U9500)
+ return 1;
- nmk_config_pins(mop500_pins_default,
- ARRAY_SIZE(mop500_pins_default));
+ return 0;
}
-void __init snowball_pins_init(void)
+static void __init mop500_href_family_pinmaps_init(void)
{
- nmk_config_pins(mop500_pins_common,
- ARRAY_SIZE(mop500_pins_common));
+ switch (pinsfor) {
+ case PINS_FOR_U9500:
+ pinctrl_register_mappings(u9500_pinmap,
+ ARRAY_SIZE(u9500_pinmap));
+ break;
+ case PINS_FOR_DEFAULT:
+ pinctrl_register_mappings(u8500_pinmap,
+ ARRAY_SIZE(u8500_pinmap));
+ default:
+ break;
+ }
+}
- nmk_config_pins(snowball_pins,
- ARRAY_SIZE(snowball_pins));
+void __init mop500_pinmaps_init(void)
+{
+ pinctrl_register_mappings(mop500_family_pinmap,
+ ARRAY_SIZE(mop500_family_pinmap));
+ pinctrl_register_mappings(mop500_pinmap,
+ ARRAY_SIZE(mop500_pinmap));
+ mop500_href_family_pinmaps_init();
}
-void __init hrefv60_pins_init(void)
+void __init snowball_pinmaps_init(void)
{
- nmk_config_pins(mop500_pins_common,
- ARRAY_SIZE(mop500_pins_common));
+ pinctrl_register_mappings(mop500_family_pinmap,
+ ARRAY_SIZE(mop500_family_pinmap));
+ pinctrl_register_mappings(snowball_pinmap,
+ ARRAY_SIZE(snowball_pinmap));
+ pinctrl_register_mappings(u8500_pinmap,
+ ARRAY_SIZE(u8500_pinmap));
+}
- nmk_config_pins(hrefv60_pins,
- ARRAY_SIZE(hrefv60_pins));
+void __init hrefv60_pinmaps_init(void)
+{
+ pinctrl_register_mappings(mop500_family_pinmap,
+ ARRAY_SIZE(mop500_family_pinmap));
+ pinctrl_register_mappings(hrefv60_pinmap,
+ ARRAY_SIZE(hrefv60_pinmap));
+ mop500_href_family_pinmaps_init();
}
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index f8150155a442..4bc0cbc5f071 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -1,3 +1,4 @@
+
/*
* Copyright (C) 2008-2009 ST-Ericsson
*
@@ -29,18 +30,17 @@
#include <linux/smsc911x.h>
#include <linux/gpio_keys.h>
#include <linux/delay.h>
-
#include <linux/of.h>
#include <linux/of_platform.h>
-
#include <linux/leds.h>
+#include <linux/pinctrl/consumer.h>
+
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
#include <plat/i2c.h>
#include <plat/ste_dma40.h>
-#include <plat/pincfg.h>
#include <plat/gpio-nomadik.h>
#include <mach/hardware.h>
@@ -48,11 +48,11 @@
#include <mach/devices.h>
#include <mach/irqs.h>
-#include "pins-db8500.h"
#include "ste-dma40-db8500.h"
#include "devices-db8500.h"
#include "board-mop500.h"
#include "board-mop500-regulators.h"
+#include "board-mop500-msp.h"
static struct gpio_led snowball_led_array[] = {
{
@@ -520,14 +520,6 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
};
#endif
-
-static pin_cfg_t mop500_pins_uart0[] = {
- GPIO0_U0_CTSn | PIN_INPUT_PULLUP,
- GPIO1_U0_RTSn | PIN_OUTPUT_HIGH,
- GPIO2_U0_RXD | PIN_INPUT_PULLUP,
- GPIO3_U0_TXD | PIN_OUTPUT_HIGH,
-};
-
#define PRCC_K_SOFTRST_SET 0x18
#define PRCC_K_SOFTRST_CLEAR 0x1C
static void ux500_uart0_reset(void)
@@ -548,24 +540,33 @@ static void ux500_uart0_reset(void)
udelay(1);
}
+/* This needs to be referenced by callbacks */
+struct pinctrl *u0_p;
+struct pinctrl_state *u0_def;
+struct pinctrl_state *u0_sleep;
+
static void ux500_uart0_init(void)
{
int ret;
- ret = nmk_config_pins(mop500_pins_uart0,
- ARRAY_SIZE(mop500_pins_uart0));
- if (ret < 0)
- pr_err("pl011: uart pins_enable failed\n");
+ if (IS_ERR(u0_p) || IS_ERR(u0_def))
+ return;
+
+ ret = pinctrl_select_state(u0_p, u0_def);
+ if (ret)
+ pr_err("could not set UART0 defstate\n");
}
static void ux500_uart0_exit(void)
{
int ret;
- ret = nmk_config_pins_sleep(mop500_pins_uart0,
- ARRAY_SIZE(mop500_pins_uart0));
- if (ret < 0)
- pr_err("pl011: uart pins_disable failed\n");
+ if (IS_ERR(u0_p) || IS_ERR(u0_sleep))
+ return;
+
+ ret = pinctrl_select_state(u0_p, u0_sleep);
+ if (ret)
+ pr_err("could not set UART0 idlestate\n");
}
static struct amba_pl011_data uart0_plat = {
@@ -597,7 +598,28 @@ static struct amba_pl011_data uart2_plat = {
static void __init mop500_uart_init(struct device *parent)
{
- db8500_add_uart0(parent, &uart0_plat);
+ struct amba_device *uart0_device;
+
+ uart0_device = db8500_add_uart0(parent, &uart0_plat);
+ if (uart0_device) {
+ u0_p = pinctrl_get(&uart0_device->dev);
+ if (IS_ERR(u0_p))
+ dev_err(&uart0_device->dev,
+ "could not get UART0 pinctrl\n");
+ else {
+ u0_def = pinctrl_lookup_state(u0_p,
+ PINCTRL_STATE_DEFAULT);
+ if (IS_ERR(u0_def)) {
+ dev_err(&uart0_device->dev,
+ "could not get UART0 defstate\n");
+ }
+ u0_sleep = pinctrl_lookup_state(u0_p,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(u0_sleep))
+ dev_err(&uart0_device->dev,
+ "could not get UART0 idlestate\n");
+ }
+ }
db8500_add_uart1(parent, &uart1_plat);
db8500_add_uart2(parent, &uart2_plat);
}
@@ -616,10 +638,9 @@ static void __init mop500_init_machine(void)
mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
+ mop500_pinmaps_init();
parent = u8500_init_devices();
- mop500_pins_init();
-
/* FIXME: parent of ab8500 should be prcmu */
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
mop500_platform_devs[i]->dev.parent = parent;
@@ -630,6 +651,7 @@ static void __init mop500_init_machine(void)
mop500_i2c_init(parent);
mop500_sdi_init(parent);
mop500_spi_init(parent);
+ mop500_msp_init(parent);
mop500_uart_init(parent);
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
@@ -647,10 +669,9 @@ static void __init snowball_init_machine(void)
struct device *parent = NULL;
int i;
+ snowball_pinmaps_init();
parent = u8500_init_devices();
- snowball_pins_init();
-
for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
snowball_platform_devs[i]->dev.parent = parent;
@@ -660,6 +681,7 @@ static void __init snowball_init_machine(void)
mop500_i2c_init(parent);
snowball_sdi_init(parent);
mop500_spi_init(parent);
+ mop500_msp_init(parent);
mop500_uart_init(parent);
/* This board has full regulator constraints */
@@ -679,10 +701,9 @@ static void __init hrefv60_init_machine(void)
*/
mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
+ hrefv60_pinmaps_init();
parent = u8500_init_devices();
- hrefv60_pins_init();
-
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
mop500_platform_devs[i]->dev.parent = parent;
@@ -692,6 +713,7 @@ static void __init hrefv60_init_machine(void)
mop500_i2c_init(parent);
hrefv60_sdi_init(parent);
mop500_spi_init(parent);
+ mop500_msp_init(parent);
mop500_uart_init(parent);
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
@@ -739,10 +761,22 @@ MACHINE_END
#ifdef CONFIG_MACH_UX500_DT
struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+ /* Requires DMA and call-back bindings. */
OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+ /* Requires DMA bindings. */
OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
+ /* Requires clock name bindings. */
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
+ OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
{},
};
@@ -759,6 +793,14 @@ static void __init u8500_init_machine(void)
int i2c0_devs;
int i;
+ /* Pinmaps must be in place before devices register */
+ if (of_machine_is_compatible("st-ericsson,mop500"))
+ mop500_pinmaps_init();
+ else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
+ snowball_pinmaps_init();
+ else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
+ hrefv60_pinmaps_init();
+
parent = u8500_init_devices();
for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
@@ -771,7 +813,6 @@ static void __init u8500_init_machine(void)
if (of_machine_is_compatible("st-ericsson,mop500")) {
mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
- mop500_pins_init();
platform_add_devices(mop500_platform_devs,
ARRAY_SIZE(mop500_platform_devs));
@@ -784,7 +825,6 @@ static void __init u8500_init_machine(void)
ARRAY_SIZE(mop500_i2c2_devices));
} else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
- snowball_pins_init();
platform_add_devices(snowball_platform_devs,
ARRAY_SIZE(snowball_platform_devs));
@@ -796,7 +836,6 @@ static void __init u8500_init_machine(void)
* instead.
*/
mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
- hrefv60_pins_init();
platform_add_devices(mop500_platform_devs,
ARRAY_SIZE(mop500_platform_devs));
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index fdcfa8721bb4..bc44c07c71a9 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -7,6 +7,9 @@
#ifndef __BOARD_MOP500_H
#define __BOARD_MOP500_H
+/* For NOMADIK_NR_GPIO */
+#include <mach/irqs.h>
+
/* Snowball specific GPIO assignments, this board has no GPIO expander */
#define SNOWBALL_ACCEL_INT1_GPIO 163
#define SNOWBALL_ACCEL_INT2_GPIO 164
@@ -73,6 +76,7 @@
#define SNOWBALL_PME_ETH_GPIO MOP500_AB8500_PIN_GPIO(24) /* SYSCLKREQ7/GPIO24 */
#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */
+struct device;
struct i2c_board_info;
extern void mop500_sdi_init(struct device *parent);
@@ -81,9 +85,9 @@ extern void hrefv60_sdi_init(struct device *parent);
extern void mop500_sdi_tc35892_init(struct device *parent);
void __init mop500_u8500uib_init(void);
void __init mop500_stuib_init(void);
-void __init mop500_pins_init(void);
-void __init hrefv60_pins_init(void);
-void __init snowball_pins_init(void);
+void __init mop500_pinmaps_init(void);
+void __init snowball_pinmaps_init(void);
+void __init hrefv60_pinmaps_init(void);
void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
unsigned n);
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 063f3dbd45a9..a121cb472dd6 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -334,6 +334,7 @@ static DEFINE_PRCMU_CLK(uiccclk, 0x4, 1, UICCCLK); /* v1 */
*/
/* Peripheral Cluster #1 */
+static DEFINE_PRCC_CLK(1, msp3, 11, 10, &clk_msp1clk);
static DEFINE_PRCC_CLK(1, i2c4, 10, 9, &clk_i2cclk);
static DEFINE_PRCC_CLK(1, gpio0, 9, -1, NULL);
static DEFINE_PRCC_CLK(1, slimbus0, 8, 8, &clk_slimclk);
@@ -403,7 +404,7 @@ static struct clk_lookup u8500_clks[] = {
CLK(slimbus0, "slimbus0", NULL),
CLK(i2c2, "nmk-i2c.2", NULL),
CLK(sdi0, "sdi0", NULL),
- CLK(msp0, "msp0", NULL),
+ CLK(msp0, "ux500-msp-i2s.0", NULL),
CLK(i2c1, "nmk-i2c.1", NULL),
CLK(uart1, "uart1", NULL),
CLK(uart0, "uart0", NULL),
@@ -453,7 +454,8 @@ static struct clk_lookup u8500_clks[] = {
/* Peripheral Cluster #1 */
CLK(i2c4, "nmk-i2c.4", NULL),
CLK(spi3, "spi3", NULL),
- CLK(msp1, "msp1", NULL),
+ CLK(msp1, "ux500-msp-i2s.1", NULL),
+ CLK(msp3, "ux500-msp-i2s.3", NULL),
/* Peripheral Cluster #2 */
CLK(gpio1, "gpio.6", NULL),
@@ -463,7 +465,7 @@ static struct clk_lookup u8500_clks[] = {
CLK(spi0, "spi0", NULL),
CLK(sdi3, "sdi3", NULL),
CLK(sdi1, "sdi1", NULL),
- CLK(msp2, "msp2", NULL),
+ CLK(msp2, "ux500-msp-i2s.2", NULL),
CLK(sdi4, "sdi4", NULL),
CLK(pwl, "pwl", NULL),
CLK(spi1, "spi1", NULL),
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 76a7503a11a2..16169c4bf6ca 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -163,6 +163,7 @@ static void __init db8500_add_gpios(struct device *parent)
dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
IRQ_DB8500_GPIO0, &pdata);
+ dbx500_add_pinctrl(parent, "pinctrl-db8500");
}
static int usb_db8500_rx_dma_cfg[] = {
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 0982279f51f3..a29a0e3adcf9 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -29,6 +29,18 @@
void __iomem *_PRCMU_BASE;
+/*
+ * FIXME: Should we set up the GPIO domain here?
+ *
+ * The problem is that we cannot put the interrupt resources into the platform
+ * device until the irqdomain has been added. Right now, we set the GIC interrupt
+ * domain from init_irq(), then load the gpio driver from
+ * core_initcall(nmk_gpio_init) and add the platform devices from
+ * arch_initcall(customize_machine).
+ *
+ * This feels fragile because it depends on the gpio device getting probed
+ * _before_ any device uses the gpio interrupts.
+*/
static const struct of_device_id ux500_dt_irq_match[] = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
{},
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index f75bcb2ab13b..7cbccfd9e158 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -90,4 +90,16 @@ struct nmk_gpio_platform_data;
void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
int irq, struct nmk_gpio_platform_data *pdata);
+static inline void
+dbx500_add_pinctrl(struct device *parent, const char *name)
+{
+ struct platform_device_info pdevinfo = {
+ .parent = parent,
+ .name = name,
+ .id = -1,
+ };
+
+ platform_device_register_full(&pdevinfo);
+}
+
#endif
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index 6fc7eb24d9a0..0b9677a95bbc 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -34,7 +34,6 @@ db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
}
-
#define db8500_add_i2c0(parent, pdata) \
dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
#define db8500_add_i2c1(parent, pdata) \
@@ -46,15 +45,6 @@ db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
#define db8500_add_i2c4(parent, pdata) \
dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
-#define db8500_add_msp0_i2s(parent, pdata) \
- dbx500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)
-#define db8500_add_msp1_i2s(parent, pdata) \
- dbx500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)
-#define db8500_add_msp2_i2s(parent, pdata) \
- dbx500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)
-#define db8500_add_msp3_i2s(parent, pdata) \
- dbx500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)
-
#define db8500_add_msp0_spi(parent, pdata) \
dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
IRQ_DB8500_MSP0, pdata)
diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/arch/arm/mach-ux500/include/mach/msp.h
new file mode 100644
index 000000000000..798be19129ef
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/msp.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __MSP_H
+#define __MSP_H
+
+#include <plat/ste_dma40.h>
+
+enum msp_i2s_id {
+ MSP_I2S_0 = 0,
+ MSP_I2S_1,
+ MSP_I2S_2,
+ MSP_I2S_3,
+};
+
+/* Platform data structure for a MSP I2S-device */
+struct msp_i2s_platform_data {
+ enum msp_i2s_id id;
+ struct stedma40_chan_cfg *msp_i2s_dma_rx;
+ struct stedma40_chan_cfg *msp_i2s_dma_tx;
+ int (*msp_i2s_init) (void);
+ int (*msp_i2s_exit) (void);
+};
+
+#endif
diff --git a/arch/arm/mach-ux500/pins-db8500.h b/arch/arm/mach-ux500/pins-db8500.h
index 8b1d1a7a679e..062c7acf4576 100644
--- a/arch/arm/mach-ux500/pins-db8500.h
+++ b/arch/arm/mach-ux500/pins-db8500.h
@@ -35,40 +35,40 @@
#define GPIO4_GPIO PIN_CFG(4, GPIO)
#define GPIO4_U1_RXD PIN_CFG(4, ALT_A)
-#define GPIO4_I2C4_SCL PIN_CFG_INPUT(4, ALT_B, PULLUP)
+#define GPIO4_I2C4_SCL PIN_CFG(4, ALT_B)
#define GPIO4_IP_TRSTn PIN_CFG(4, ALT_C)
#define GPIO5_GPIO PIN_CFG(5, GPIO)
#define GPIO5_U1_TXD PIN_CFG(5, ALT_A)
-#define GPIO5_I2C4_SDA PIN_CFG_INPUT(5, ALT_B, PULLUP)
+#define GPIO5_I2C4_SDA PIN_CFG(5, ALT_B)
#define GPIO5_IP_GPIO6 PIN_CFG(5, ALT_C)
#define GPIO6_GPIO PIN_CFG(6, GPIO)
#define GPIO6_U1_CTSn PIN_CFG(6, ALT_A)
-#define GPIO6_I2C1_SCL PIN_CFG_INPUT(6, ALT_B, PULLUP)
+#define GPIO6_I2C1_SCL PIN_CFG(6, ALT_B)
#define GPIO6_IP_GPIO0 PIN_CFG(6, ALT_C)
#define GPIO7_GPIO PIN_CFG(7, GPIO)
#define GPIO7_U1_RTSn PIN_CFG(7, ALT_A)
-#define GPIO7_I2C1_SDA PIN_CFG_INPUT(7, ALT_B, PULLUP)
+#define GPIO7_I2C1_SDA PIN_CFG(7, ALT_B)
#define GPIO7_IP_GPIO1 PIN_CFG(7, ALT_C)
#define GPIO8_GPIO PIN_CFG(8, GPIO)
-#define GPIO8_IPI2C_SDA PIN_CFG_INPUT(8, ALT_A, PULLUP)
-#define GPIO8_I2C2_SDA PIN_CFG_INPUT(8, ALT_B, PULLUP)
+#define GPIO8_IPI2C_SDA PIN_CFG(8, ALT_A)
+#define GPIO8_I2C2_SDA PIN_CFG(8, ALT_B)
#define GPIO9_GPIO PIN_CFG(9, GPIO)
-#define GPIO9_IPI2C_SCL PIN_CFG_INPUT(9, ALT_A, PULLUP)
-#define GPIO9_I2C2_SCL PIN_CFG_INPUT(9, ALT_B, PULLUP)
+#define GPIO9_IPI2C_SCL PIN_CFG(9, ALT_A)
+#define GPIO9_I2C2_SCL PIN_CFG(9, ALT_B)
#define GPIO10_GPIO PIN_CFG(10, GPIO)
-#define GPIO10_IPI2C_SDA PIN_CFG_INPUT(10, ALT_A, PULLUP)
-#define GPIO10_I2C2_SDA PIN_CFG_INPUT(10, ALT_B, PULLUP)
+#define GPIO10_IPI2C_SDA PIN_CFG(10, ALT_A)
+#define GPIO10_I2C2_SDA PIN_CFG(10, ALT_B)
#define GPIO10_IP_GPIO3 PIN_CFG(10, ALT_C)
#define GPIO11_GPIO PIN_CFG(11, GPIO)
-#define GPIO11_IPI2C_SCL PIN_CFG_INPUT(11, ALT_A, PULLUP)
-#define GPIO11_I2C2_SCL PIN_CFG_INPUT(11, ALT_B, PULLUP)
+#define GPIO11_IPI2C_SCL PIN_CFG(11, ALT_A)
+#define GPIO11_I2C2_SCL PIN_CFG(11, ALT_B)
#define GPIO11_IP_GPIO2 PIN_CFG(11, ALT_C)
#define GPIO12_GPIO PIN_CFG(12, GPIO)
@@ -87,12 +87,12 @@
#define GPIO16_GPIO PIN_CFG(16, GPIO)
#define GPIO16_MSP0_RFS PIN_CFG(16, ALT_A)
-#define GPIO16_I2C1_SCL PIN_CFG_INPUT(16, ALT_B, PULLUP)
+#define GPIO16_I2C1_SCL PIN_CFG(16, ALT_B)
#define GPIO16_SLIM0_DAT PIN_CFG(16, ALT_C)
#define GPIO17_GPIO PIN_CFG(17, GPIO)
#define GPIO17_MSP0_RCK PIN_CFG(17, ALT_A)
-#define GPIO17_I2C1_SDA PIN_CFG_INPUT(17, ALT_B, PULLUP)
+#define GPIO17_I2C1_SDA PIN_CFG(17, ALT_B)
#define GPIO17_SLIM0_CLK PIN_CFG(17, ALT_C)
#define GPIO18_GPIO PIN_CFG(18, GPIO)
@@ -434,10 +434,10 @@
#define GPIO146_SSP0_TXD PIN_CFG(146, ALT_A)
#define GPIO147_GPIO PIN_CFG(147, GPIO)
-#define GPIO147_I2C0_SCL PIN_CFG_INPUT(147, ALT_A, PULLUP)
+#define GPIO147_I2C0_SCL PIN_CFG(147, ALT_A)
#define GPIO148_GPIO PIN_CFG(148, GPIO)
-#define GPIO148_I2C0_SDA PIN_CFG_INPUT(148, ALT_A, PULLUP)
+#define GPIO148_I2C0_SDA PIN_CFG(148, ALT_A)
#define GPIO149_GPIO PIN_CFG(149, GPIO)
#define GPIO149_IP_GPIO0 PIN_CFG(149, ALT_A)
@@ -459,82 +459,82 @@
#define GPIO152_KP_O9 PIN_CFG(152, ALT_C)
#define GPIO153_GPIO PIN_CFG(153, GPIO)
-#define GPIO153_KP_I7 PIN_CFG_INPUT(153, ALT_A, PULLDOWN)
+#define GPIO153_KP_I7 PIN_CFG(153, ALT_A)
#define GPIO153_LCD_D24 PIN_CFG(153, ALT_B)
#define GPIO153_U2_RXD PIN_CFG(153, ALT_C)
#define GPIO154_GPIO PIN_CFG(154, GPIO)
-#define GPIO154_KP_I6 PIN_CFG_INPUT(154, ALT_A, PULLDOWN)
+#define GPIO154_KP_I6 PIN_CFG(154, ALT_A)
#define GPIO154_LCD_D25 PIN_CFG(154, ALT_B)
#define GPIO154_U2_TXD PIN_CFG(154, ALT_C)
#define GPIO155_GPIO PIN_CFG(155, GPIO)
-#define GPIO155_KP_I5 PIN_CFG_INPUT(155, ALT_A, PULLDOWN)
+#define GPIO155_KP_I5 PIN_CFG(155, ALT_A)
#define GPIO155_LCD_D26 PIN_CFG(155, ALT_B)
#define GPIO155_STMAPE_CLK PIN_CFG(155, ALT_C)
#define GPIO156_GPIO PIN_CFG(156, GPIO)
-#define GPIO156_KP_I4 PIN_CFG_INPUT(156, ALT_A, PULLDOWN)
+#define GPIO156_KP_I4 PIN_CFG(156, ALT_A)
#define GPIO156_LCD_D27 PIN_CFG(156, ALT_B)
#define GPIO156_STMAPE_DAT3 PIN_CFG(156, ALT_C)
#define GPIO157_GPIO PIN_CFG(157, GPIO)
-#define GPIO157_KP_O7 PIN_CFG_INPUT(157, ALT_A, PULLUP)
+#define GPIO157_KP_O7 PIN_CFG(157, ALT_A)
#define GPIO157_LCD_D28 PIN_CFG(157, ALT_B)
#define GPIO157_STMAPE_DAT2 PIN_CFG(157, ALT_C)
#define GPIO158_GPIO PIN_CFG(158, GPIO)
-#define GPIO158_KP_O6 PIN_CFG_INPUT(158, ALT_A, PULLUP)
+#define GPIO158_KP_O6 PIN_CFG(158, ALT_A)
#define GPIO158_LCD_D29 PIN_CFG(158, ALT_B)
#define GPIO158_STMAPE_DAT1 PIN_CFG(158, ALT_C)
#define GPIO159_GPIO PIN_CFG(159, GPIO)
-#define GPIO159_KP_O5 PIN_CFG_INPUT(159, ALT_A, PULLUP)
+#define GPIO159_KP_O5 PIN_CFG(159, ALT_A)
#define GPIO159_LCD_D30 PIN_CFG(159, ALT_B)
#define GPIO159_STMAPE_DAT0 PIN_CFG(159, ALT_C)
#define GPIO160_GPIO PIN_CFG(160, GPIO)
-#define GPIO160_KP_O4 PIN_CFG_INPUT(160, ALT_A, PULLUP)
+#define GPIO160_KP_O4 PIN_CFG(160, ALT_A)
#define GPIO160_LCD_D31 PIN_CFG(160, ALT_B)
#define GPIO160_NONE PIN_CFG(160, ALT_C)
#define GPIO161_GPIO PIN_CFG(161, GPIO)
-#define GPIO161_KP_I3 PIN_CFG_INPUT(161, ALT_A, PULLDOWN)
+#define GPIO161_KP_I3 PIN_CFG(161, ALT_A)
#define GPIO161_LCD_D32 PIN_CFG(161, ALT_B)
#define GPIO161_UARTMOD_RXD PIN_CFG(161, ALT_C)
#define GPIO162_GPIO PIN_CFG(162, GPIO)
-#define GPIO162_KP_I2 PIN_CFG_INPUT(162, ALT_A, PULLDOWN)
+#define GPIO162_KP_I2 PIN_CFG(162, ALT_A)
#define GPIO162_LCD_D33 PIN_CFG(162, ALT_B)
#define GPIO162_UARTMOD_TXD PIN_CFG(162, ALT_C)
#define GPIO163_GPIO PIN_CFG(163, GPIO)
-#define GPIO163_KP_I1 PIN_CFG_INPUT(163, ALT_A, PULLDOWN)
+#define GPIO163_KP_I1 PIN_CFG(163, ALT_A)
#define GPIO163_LCD_D34 PIN_CFG(163, ALT_B)
#define GPIO163_STMMOD_CLK PIN_CFG(163, ALT_C)
#define GPIO164_GPIO PIN_CFG(164, GPIO)
-#define GPIO164_KP_I0 PIN_CFG_INPUT(164, ALT_A, PULLUP)
+#define GPIO164_KP_I0 PIN_CFG(164, ALT_A)
#define GPIO164_LCD_D35 PIN_CFG(164, ALT_B)
#define GPIO164_STMMOD_DAT3 PIN_CFG(164, ALT_C)
#define GPIO165_GPIO PIN_CFG(165, GPIO)
-#define GPIO165_KP_O3 PIN_CFG_INPUT(165, ALT_A, PULLUP)
+#define GPIO165_KP_O3 PIN_CFG(165, ALT_A)
#define GPIO165_LCD_D36 PIN_CFG(165, ALT_B)
#define GPIO165_STMMOD_DAT2 PIN_CFG(165, ALT_C)
#define GPIO166_GPIO PIN_CFG(166, GPIO)
-#define GPIO166_KP_O2 PIN_CFG_INPUT(166, ALT_A, PULLUP)
+#define GPIO166_KP_O2 PIN_CFG(166, ALT_A)
#define GPIO166_LCD_D37 PIN_CFG(166, ALT_B)
#define GPIO166_STMMOD_DAT1 PIN_CFG(166, ALT_C)
#define GPIO167_GPIO PIN_CFG(167, GPIO)
-#define GPIO167_KP_O1 PIN_CFG_INPUT(167, ALT_A, PULLUP)
+#define GPIO167_KP_O1 PIN_CFG(167, ALT_A)
#define GPIO167_LCD_D38 PIN_CFG(167, ALT_B)
#define GPIO167_STMMOD_DAT0 PIN_CFG(167, ALT_C)
#define GPIO168_GPIO PIN_CFG(168, GPIO)
-#define GPIO168_KP_O0 PIN_CFG_INPUT(168, ALT_A, PULLUP)
+#define GPIO168_KP_O0 PIN_CFG(168, ALT_A)
#define GPIO168_LCD_D39 PIN_CFG(168, ALT_B)
#define GPIO168_NONE PIN_CFG(168, ALT_C)
@@ -637,7 +637,7 @@
#define GPIO216_GPIO PIN_CFG(216, GPIO)
#define GPIO216_MC1_DAT2DIR PIN_CFG(216, ALT_A)
#define GPIO216_MC3_CMDDIR PIN_CFG(216, ALT_B)
-#define GPIO216_I2C3_SDA PIN_CFG_INPUT(216, ALT_C, PULLUP)
+#define GPIO216_I2C3_SDA PIN_CFG(216, ALT_C)
#define GPIO216_SPI2_FRM PIN_CFG(216, ALT_C)
#define GPIO217_GPIO PIN_CFG(217, GPIO)
@@ -649,7 +649,7 @@
#define GPIO218_GPIO PIN_CFG(218, GPIO)
#define GPIO218_MC1_DAT31DIR PIN_CFG(218, ALT_A)
#define GPIO218_MC3_DAT0DIR PIN_CFG(218, ALT_B)
-#define GPIO218_I2C3_SCL PIN_CFG_INPUT(218, ALT_C, PULLUP)
+#define GPIO218_I2C3_SCL PIN_CFG(218, ALT_C)
#define GPIO218_SPI2_RXD PIN_CFG(218, ALT_C)
#define GPIO219_GPIO PIN_CFG(219, GPIO)
@@ -698,12 +698,12 @@
#define GPIO229_GPIO PIN_CFG(229, GPIO)
#define GPIO229_CLKOUT1 PIN_CFG(229, ALT_A)
#define GPIO229_PWL PIN_CFG(229, ALT_B)
-#define GPIO229_I2C3_SDA PIN_CFG_INPUT(229, ALT_C, PULLUP)
+#define GPIO229_I2C3_SDA PIN_CFG(229, ALT_C)
#define GPIO230_GPIO PIN_CFG(230, GPIO)
#define GPIO230_CLKOUT2 PIN_CFG(230, ALT_A)
#define GPIO230_PWL PIN_CFG(230, ALT_B)
-#define GPIO230_I2C3_SCL PIN_CFG_INPUT(230, ALT_C, PULLUP)
+#define GPIO230_I2C3_SCL PIN_CFG(230, ALT_C)
#define GPIO256_GPIO PIN_CFG(256, GPIO)
#define GPIO256_USB_NXT PIN_CFG(256, ALT_A)
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 20:11:11 +0100