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-rw-r--r--arch/arm/plat-omap/Kconfig1
-rw-r--r--arch/arm/plat-omap/Makefile5
-rw-r--r--arch/arm/plat-omap/cpu-omap.c32
-rw-r--r--arch/arm/plat-omap/devices.c63
-rw-r--r--arch/arm/plat-omap/dma.c23
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/gpio.c68
7 files changed, 67 insertions, 127 deletions
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index c1f7e5a819a3..b917206ee906 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -11,7 +11,6 @@ choice
config ARCH_OMAP1
bool "TI OMAP1"
- select GENERIC_CLOCKEVENTS
config ARCH_OMAP2
bool "TI OMAP2"
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index ce17df31b845..8f56c255d1ee 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -14,9 +14,14 @@ obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
# OCPI interconnect support for 1710, 1610 and 5912
obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
+obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
obj-$(CONFIG_I2C_OMAP) += i2c.o
+
+# OMAP mailbox framework
+obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
+
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index c0d63b0c61c9..d719c15daa55 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -33,43 +33,33 @@
#define MPU_CLK "virt_prcm_set"
#endif
+static struct clk *mpu_clk;
+
/* TODO: Add support for SDRAM timing changes */
int omap_verify_speed(struct cpufreq_policy *policy)
{
- struct clk * mpu_clk;
-
if (policy->cpu)
return -EINVAL;
cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
policy->cpuinfo.max_freq);
- mpu_clk = clk_get(NULL, MPU_CLK);
- if (IS_ERR(mpu_clk))
- return PTR_ERR(mpu_clk);
+
policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
policy->cpuinfo.max_freq);
- clk_put(mpu_clk);
-
return 0;
}
unsigned int omap_getspeed(unsigned int cpu)
{
- struct clk * mpu_clk;
unsigned long rate;
if (cpu)
return 0;
- mpu_clk = clk_get(NULL, MPU_CLK);
- if (IS_ERR(mpu_clk))
- return 0;
rate = clk_get_rate(mpu_clk) / 1000;
- clk_put(mpu_clk);
-
return rate;
}
@@ -77,14 +67,9 @@ static int omap_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation)
{
- struct clk * mpu_clk;
struct cpufreq_freqs freqs;
int ret = 0;
- mpu_clk = clk_get(NULL, MPU_CLK);
- if (IS_ERR(mpu_clk))
- return PTR_ERR(mpu_clk);
-
freqs.old = omap_getspeed(0);
freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
freqs.cpu = 0;
@@ -92,15 +77,12 @@ static int omap_target(struct cpufreq_policy *policy,
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
ret = clk_set_rate(mpu_clk, target_freq * 1000);
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
- clk_put(mpu_clk);
return ret;
}
static int __init omap_cpu_init(struct cpufreq_policy *policy)
{
- struct clk * mpu_clk;
-
mpu_clk = clk_get(NULL, MPU_CLK);
if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk);
@@ -111,17 +93,23 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000;
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
- clk_put(mpu_clk);
return 0;
}
+static int omap_cpu_exit(struct cpufreq_policy *policy)
+{
+ clk_put(mpu_clk);
+ return 0;
+}
+
static struct cpufreq_driver omap_driver = {
.flags = CPUFREQ_STICKY,
.verify = omap_verify_speed,
.target = omap_target,
.get = omap_getspeed,
.init = omap_cpu_init,
+ .exit = omap_cpu_exit,
.name = "omap",
};
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index c5dab1d6417e..4a53f9ba6c43 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -89,68 +89,6 @@ static inline void omap_init_dsp(void) { }
#endif /* CONFIG_OMAP_DSP */
/*-------------------------------------------------------------------------*/
-#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
-
-#define OMAP1_I2C_BASE 0xfffb3800
-#define OMAP2_I2C_BASE1 0x48070000
-#define OMAP_I2C_SIZE 0x3f
-#define OMAP1_I2C_INT INT_I2C
-#define OMAP2_I2C_INT1 56
-
-static struct resource i2c_resources1[] = {
- {
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = 0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-/* DMA not used; works around erratum writing to non-empty i2c fifo */
-
-static struct platform_device omap_i2c_device1 = {
- .name = "i2c_omap",
- .id = 1,
- .num_resources = ARRAY_SIZE(i2c_resources1),
- .resource = i2c_resources1,
-};
-
-/* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
-static void omap_init_i2c(void)
-{
- if (cpu_is_omap24xx()) {
- i2c_resources1[0].start = OMAP2_I2C_BASE1;
- i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
- i2c_resources1[1].start = OMAP2_I2C_INT1;
- } else {
- i2c_resources1[0].start = OMAP1_I2C_BASE;
- i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
- i2c_resources1[1].start = OMAP1_I2C_INT;
- }
-
- /* FIXME define and use a boot tag, in case of boards that
- * either don't wire up I2C, or chips that mux it differently...
- * it can include clocking and address info, maybe more.
- */
- if (cpu_is_omap24xx()) {
- omap_cfg_reg(M19_24XX_I2C1_SCL);
- omap_cfg_reg(L15_24XX_I2C1_SDA);
- } else {
- omap_cfg_reg(I2C_SCL);
- omap_cfg_reg(I2C_SDA);
- }
-
- (void) platform_device_register(&omap_i2c_device1);
-}
-
-#else
-static inline void omap_init_i2c(void) {}
-#endif
-
-/*-------------------------------------------------------------------------*/
#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
static void omap_init_kp(void)
@@ -501,7 +439,6 @@ static int __init omap_init_devices(void)
* in alphabetical order so they're easier to sort through.
*/
omap_init_dsp();
- omap_init_i2c();
omap_init_kp();
omap_init_mmc();
omap_init_uwire();
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index a46676db8113..793740686be2 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -137,7 +137,7 @@ static void omap_disable_channel_irq(int lch);
static inline void omap_enable_channel_irq(int lch);
#define REVISIT_24XX() printk(KERN_ERR "FIXME: no %s on 24xx\n", \
- __FUNCTION__);
+ __func__);
#ifdef CONFIG_ARCH_OMAP15XX
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
@@ -699,7 +699,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
u32 reg;
if (!cpu_class_is_omap2()) {
- printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __FUNCTION__);
+ printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__);
return;
}
@@ -1020,12 +1020,12 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
}
w = OMAP_DMA_CLNK_CTRL_REG(lch_head);
- w &= ~(0x0f);
+ w &= ~(0x1f);
w |= lch_queue;
OMAP_DMA_CLNK_CTRL_REG(lch_head) = w;
w = OMAP_DMA_CLNK_CTRL_REG(lch_queue);
- w &= ~(0x0f);
+ w &= ~(0x1f);
w |= (dma_chan[lch_queue].next_linked_ch);
OMAP_DMA_CLNK_CTRL_REG(lch_queue) = w;
}
@@ -1248,7 +1248,7 @@ EXPORT_SYMBOL(omap_dma_chain_status);
* @param frame_count
* @param callbk_data - channel callback parameter data.
*
- * @return - Success : start_dma status
+ * @return - Success : 0
* Failure: -EINVAL/-EBUSY
*/
int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
@@ -1367,7 +1367,7 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
}
}
- return start_dma;
+ return 0;
}
EXPORT_SYMBOL(omap_dma_chain_a_transfer);
@@ -1663,6 +1663,7 @@ static int omap2_dma_handle_ch(int ch)
if (!status) {
if (printk_ratelimit())
printk(KERN_WARNING "Spurious DMA IRQ for lch %d\n", ch);
+ omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
return 0;
}
if (unlikely(dma_chan[ch].dev_id == -1)) {
@@ -1705,14 +1706,8 @@ static int omap2_dma_handle_ch(int ch)
status = OMAP_DMA_CSR_REG(ch);
}
- if (likely(dma_chan[ch].callback != NULL)) {
- if (dma_chan[ch].chain_id != -1)
- dma_chan[ch].callback(dma_chan[ch].chain_id, status,
- dma_chan[ch].data);
- else
- dma_chan[ch].callback(ch, status, dma_chan[ch].data);
-
- }
+ if (likely(dma_chan[ch].callback != NULL))
+ dma_chan[ch].callback(ch, status, dma_chan[ch].data);
OMAP_DMA_CSR_REG(ch) = status;
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index e719d0eeb5c8..302ad8dff2cb 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -268,7 +268,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
if (id <= 0 || id > dm_timer_count || dm_timers[id-1].reserved) {
spin_unlock_irqrestore(&dm_timer_lock, flags);
printk("BUG: warning at %s:%d/%s(): unable to get timer %d\n",
- __FILE__, __LINE__, __FUNCTION__, id);
+ __FILE__, __LINE__, __func__, id);
dump_stack();
return NULL;
}
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 56f4d1394d56..8c78e4e57b5c 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -333,13 +333,14 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
void omap_set_gpio_direction(int gpio, int is_input)
{
struct gpio_bank *bank;
+ unsigned long flags;
if (check_gpio(gpio) < 0)
return;
bank = get_gpio_bank(gpio);
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
_set_gpio_direction(bank, get_gpio_index(gpio), is_input);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
}
static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
@@ -406,13 +407,14 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
void omap_set_gpio_dataout(int gpio, int enable)
{
struct gpio_bank *bank;
+ unsigned long flags;
if (check_gpio(gpio) < 0)
return;
bank = get_gpio_bank(gpio);
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
_set_gpio_dataout(bank, get_gpio_index(gpio), enable);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
}
int omap_get_gpio_datain(int gpio)
@@ -624,6 +626,7 @@ static int gpio_irq_type(unsigned irq, unsigned type)
struct gpio_bank *bank;
unsigned gpio;
int retval;
+ unsigned long flags;
if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE)
gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
@@ -642,13 +645,13 @@ static int gpio_irq_type(unsigned irq, unsigned type)
return -EINVAL;
bank = get_irq_chip_data(irq);
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
if (retval == 0) {
irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
irq_desc[irq].status |= type;
}
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return retval;
}
@@ -830,11 +833,13 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena
*/
static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
{
+ unsigned long flags;
+
switch (bank->method) {
#ifdef CONFIG_ARCH_OMAP16XX
case METHOD_MPUIO:
case METHOD_GPIO_1610:
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
if (enable) {
bank->suspend_wakeup |= (1 << gpio);
enable_irq_wake(bank->irq);
@@ -842,7 +847,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
disable_irq_wake(bank->irq);
bank->suspend_wakeup &= ~(1 << gpio);
}
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return 0;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -853,7 +858,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
(bank - gpio_bank) * 32 + gpio);
return -EINVAL;
}
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
if (enable) {
bank->suspend_wakeup |= (1 << gpio);
enable_irq_wake(bank->irq);
@@ -861,7 +866,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
disable_irq_wake(bank->irq);
bank->suspend_wakeup &= ~(1 << gpio);
}
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return 0;
#endif
default:
@@ -897,16 +902,17 @@ static int gpio_wake_enable(unsigned int irq, unsigned int enable)
int omap_request_gpio(int gpio)
{
struct gpio_bank *bank;
+ unsigned long flags;
if (check_gpio(gpio) < 0)
return -EINVAL;
bank = get_gpio_bank(gpio);
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
if (unlikely(bank->reserved_map & (1 << get_gpio_index(gpio)))) {
printk(KERN_ERR "omap-gpio: GPIO %d is already reserved!\n", gpio);
dump_stack();
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return -1;
}
bank->reserved_map |= (1 << get_gpio_index(gpio));
@@ -925,7 +931,7 @@ int omap_request_gpio(int gpio)
__raw_writel(__raw_readl(reg) | (1 << get_gpio_index(gpio)), reg);
}
#endif
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
@@ -933,15 +939,16 @@ int omap_request_gpio(int gpio)
void omap_free_gpio(int gpio)
{
struct gpio_bank *bank;
+ unsigned long flags;
if (check_gpio(gpio) < 0)
return;
bank = get_gpio_bank(gpio);
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
if (unlikely(!(bank->reserved_map & (1 << get_gpio_index(gpio))))) {
printk(KERN_ERR "omap-gpio: GPIO %d wasn't reserved!\n", gpio);
dump_stack();
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return;
}
#ifdef CONFIG_ARCH_OMAP16XX
@@ -960,7 +967,7 @@ void omap_free_gpio(int gpio)
#endif
bank->reserved_map &= ~(1 << get_gpio_index(gpio));
_reset_gpio(bank, gpio);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
}
/*
@@ -1127,10 +1134,9 @@ static void gpio_mask_irq(unsigned int irq)
static void gpio_unmask_irq(unsigned int irq)
{
unsigned int gpio = irq - IH_GPIO_BASE;
- unsigned int gpio_idx = get_gpio_index(gpio);
struct gpio_bank *bank = get_irq_chip_data(irq);
- _set_gpio_irqenable(bank, gpio_idx, 1);
+ _set_gpio_irqenable(bank, gpio, 1);
}
static struct irq_chip gpio_irq_chip = {
@@ -1194,11 +1200,12 @@ static int omap_mpuio_suspend_late(struct platform_device *pdev, pm_message_t me
{
struct gpio_bank *bank = platform_get_drvdata(pdev);
void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
+ unsigned long flags;
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
bank->saved_wakeup = __raw_readl(mask_reg);
__raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
@@ -1207,10 +1214,11 @@ static int omap_mpuio_resume_early(struct platform_device *pdev)
{
struct gpio_bank *bank = platform_get_drvdata(pdev);
void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
+ unsigned long flags;
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
__raw_writel(bank->saved_wakeup, mask_reg);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
@@ -1277,6 +1285,11 @@ static struct clk *gpio_fclks[OMAP34XX_NR_GPIOS];
static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
#endif
+/* This lock class tells lockdep that GPIO irqs are in a different
+ * category than their parents, so it won't report false recursion.
+ */
+static struct lock_class_key gpio_lock_class;
+
static int __init _omap_gpio_init(void)
{
int i;
@@ -1450,6 +1463,7 @@ static int __init _omap_gpio_init(void)
#endif
for (j = bank->virtual_irq_start;
j < bank->virtual_irq_start + gpio_count; j++) {
+ lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
set_irq_chip_data(j, bank);
if (bank_is_mpuio(bank))
set_irq_chip(j, &mpuio_irq_chip);
@@ -1489,6 +1503,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
void __iomem *wake_status;
void __iomem *wake_clear;
void __iomem *wake_set;
+ unsigned long flags;
switch (bank->method) {
#ifdef CONFIG_ARCH_OMAP16XX
@@ -1509,11 +1524,11 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
continue;
}
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
bank->saved_wakeup = __raw_readl(wake_status);
__raw_writel(0xffffffff, wake_clear);
__raw_writel(bank->suspend_wakeup, wake_set);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
}
return 0;
@@ -1530,6 +1545,7 @@ static int omap_gpio_resume(struct sys_device *dev)
struct gpio_bank *bank = &gpio_bank[i];
void __iomem *wake_clear;
void __iomem *wake_set;
+ unsigned long flags;
switch (bank->method) {
#ifdef CONFIG_ARCH_OMAP16XX
@@ -1548,10 +1564,10 @@ static int omap_gpio_resume(struct sys_device *dev)
continue;
}
- spin_lock(&bank->lock);
+ spin_lock_irqsave(&bank->lock, flags);
__raw_writel(0xffffffff, wake_clear);
__raw_writel(bank->saved_wakeup, wake_set);
- spin_unlock(&bank->lock);
+ spin_unlock_irqrestore(&bank->lock, flags);
}
return 0;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 14:52:19 +0100