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-rw-r--r--arch/arm64/boot/dts/freescale/imx8mq.dtsi18
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 0235967d1a2e..253d6d66af1a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -472,9 +472,25 @@
reg = <IMX8M_POWER_DOMAIN_MIPI>;
};
- pgc_pcie1: power-domain@1 {
+ /*
+ * As per comment in ATF source code:
+ *
+ * PCIE1 and PCIE2 share the
+ * same reset signal, if we
+ * power down PCIE2, PCIE1
+ * will be held in reset too.
+ *
+ * So instead of creating two
+ * separate power domains for
+ * PCIE1 and PCIE2 we create a
+ * link between both and use
+ * it as a shared PCIE power
+ * domain.
+ */
+ pgc_pcie: power-domain@1 {
#power-domain-cells = <0>;
reg = <IMX8M_POWER_DOMAIN_PCIE1>;
+ power-domains = <&pgc_pcie2>;
};
pgc_otg1: power-domain@2 {