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-rw-r--r--arch/arm/Kbuild11
-rw-r--r--arch/arm/Kconfig39
-rw-r--r--arch/arm/Kconfig.assembler6
-rw-r--r--arch/arm/Makefile16
-rw-r--r--arch/arm/common/Makefile1
-rw-r--r--arch/arm/common/it8152.c352
-rw-r--r--arch/arm/include/asm/hardware/it8152.h116
-rw-r--r--arch/arm/include/asm/uaccess.h6
-rw-r--r--arch/arm/include/asm/vfp.h2
-rw-r--r--arch/arm/include/asm/vfpmacros.h31
-rw-r--r--arch/arm/kernel/bios32.c17
-rw-r--r--arch/arm/kernel/stacktrace.c24
-rw-r--r--arch/arm/mm/mmu.c5
-rw-r--r--arch/arm/mm/proc-macros.S4
-rw-r--r--arch/arm/vfp/Makefile2
-rw-r--r--arch/arm/vfp/vfphw.S31
-rw-r--r--arch/arm/vfp/vfpinstr.h23
17 files changed, 114 insertions, 572 deletions
diff --git a/arch/arm/Kbuild b/arch/arm/Kbuild
new file mode 100644
index 000000000000..5208f7061524
--- /dev/null
+++ b/arch/arm/Kbuild
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_FPE_NWFPE) += nwfpe/
+# Put arch/arm/fastfpe/ to use this.
+obj-$(CONFIG_FPE_FASTFPE) += $(patsubst $(srctree)/$(src)/%,%,$(wildcard $(srctree)/$(src)/fastfpe/))
+obj-$(CONFIG_VFP) += vfp/
+obj-$(CONFIG_XEN) += xen/
+obj-$(CONFIG_VDSO) += vdso/
+obj-y += kernel/ mm/ common/
+obj-y += probes/
+obj-y += net/
+obj-y += crypto/
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 218bf25b369a..e00d94b16658 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1150,12 +1150,6 @@ config PCI_NANOENGINE
help
Enable PCI on the BSE nanoEngine board.
-config PCI_HOST_ITE8152
- bool
- depends on PCI && MACH_ARMCORE
- default y
- select DMABOUNCE
-
config ARM_ERRATA_814220
bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
depends on CPU_V7
@@ -1430,37 +1424,6 @@ config THUMB2_KERNEL
If unsure, say N.
-config THUMB2_AVOID_R_ARM_THM_JUMP11
- bool "Work around buggy Thumb-2 short branch relocations in gas"
- depends on THUMB2_KERNEL && MODULES
- default y
- help
- Various binutils versions can resolve Thumb-2 branches to
- locally-defined, preemptible global symbols as short-range "b.n"
- branch instructions.
-
- This is a problem, because there's no guarantee the final
- destination of the symbol, or any candidate locations for a
- trampoline, are within range of the branch. For this reason, the
- kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
- relocation in modules at all, and it makes little sense to add
- support.
-
- The symptom is that the kernel fails with an "unsupported
- relocation" error when loading some modules.
-
- Until fixed tools are available, passing
- -fno-optimize-sibling-calls to gcc should prevent gcc generating
- code which hits this problem, at the cost of a bit of extra runtime
- stack usage in some cases.
-
- The problem is described in more detail at:
- https://bugs.launchpad.net/binutils-linaro/+bug/725126
-
- Only Thumb-2 kernels are affected.
-
- Unless you are sure your tools don't have this problem, say Y.
-
config ARM_PATCH_IDIV
bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
depends on CPU_32v7 && !XIP_KERNEL
@@ -2099,3 +2062,5 @@ source "drivers/firmware/Kconfig"
if CRYPTO
source "arch/arm/crypto/Kconfig"
endif
+
+source "arch/arm/Kconfig.assembler"
diff --git a/arch/arm/Kconfig.assembler b/arch/arm/Kconfig.assembler
new file mode 100644
index 000000000000..5cb31aae1188
--- /dev/null
+++ b/arch/arm/Kconfig.assembler
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config AS_VFP_VMRS_FPINST
+ def_bool $(as-instr,.fpu vfpv2\nvmrs r0$(comma)FPINST)
+ help
+ Supported by binutils >= 2.24 and LLVM integrated assembler.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e7f4ca060c0f..4e877354515f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -123,10 +123,6 @@ AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
ifeq ($(CONFIG_THUMB2_KERNEL),y)
CFLAGS_ISA :=-mthumb -Wa,-mimplicit-it=always $(AFLAGS_NOWARN)
AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb
-# Work around buggy relocation from gas if requested:
-ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y)
-KBUILD_CFLAGS_MODULE +=-fno-optimize-sibling-calls
-endif
else
CFLAGS_ISA :=$(call cc-option,-marm,) $(AFLAGS_NOWARN)
AFLAGS_ISA :=$(CFLAGS_ISA)
@@ -276,18 +272,8 @@ endif
export TEXT_OFFSET GZFLAGS MMUEXT
-core-$(CONFIG_FPE_NWFPE) += arch/arm/nwfpe/
-# Put arch/arm/fastfpe/ to use this.
-core-$(CONFIG_FPE_FASTFPE) += $(patsubst $(srctree)/%,%,$(wildcard $(srctree)/arch/arm/fastfpe/))
-core-$(CONFIG_VFP) += arch/arm/vfp/
-core-$(CONFIG_XEN) += arch/arm/xen/
-core-$(CONFIG_VDSO) += arch/arm/vdso/
-
+core-y += arch/arm/
# If we have a machine-specific directory, then include it in the build.
-core-y += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
-core-y += arch/arm/probes/
-core-y += arch/arm/net/
-core-y += arch/arm/crypto/
core-y += $(machdirs) $(platdirs)
# For cleaning
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 219a260bbe5f..8cd574be94cf 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_CPU_V7) += secure_cntvoff.o
-obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
CFLAGS_REMOVE_mcpm_entry.o = -pg
AFLAGS_mcpm_head.o := -march=armv7-a
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
deleted file mode 100644
index 9ec740cac469..000000000000
--- a/arch/arm/common/it8152.c
+++ /dev/null
@@ -1,352 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/common/it8152.c
- *
- * Copyright Compulab Ltd, 2002-2007
- * Mike Rapoport <mike@compulab.co.il>
- *
- * The DMA bouncing part is taken from arch/arm/mach-ixp4xx/common-pci.c
- * (see this file for respective copyrights)
- *
- * Thanks to Guennadi Liakhovetski <gl@dsa-ac.de> for IRQ enumberation
- * and demux code.
- */
-
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/ptrace.h>
-#include <linux/interrupt.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/export.h>
-
-#include <asm/mach/pci.h>
-#include <asm/hardware/it8152.h>
-
-#define MAX_SLOTS 21
-
-static void it8152_mask_irq(struct irq_data *d)
-{
- unsigned int irq = d->irq;
-
- if (irq >= IT8152_LD_IRQ(0)) {
- __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |
- (1 << (irq - IT8152_LD_IRQ(0)))),
- IT8152_INTC_LDCNIMR);
- } else if (irq >= IT8152_LP_IRQ(0)) {
- __raw_writel((__raw_readl(IT8152_INTC_LPCNIMR) |
- (1 << (irq - IT8152_LP_IRQ(0)))),
- IT8152_INTC_LPCNIMR);
- } else if (irq >= IT8152_PD_IRQ(0)) {
- __raw_writel((__raw_readl(IT8152_INTC_PDCNIMR) |
- (1 << (irq - IT8152_PD_IRQ(0)))),
- IT8152_INTC_PDCNIMR);
- }
-}
-
-static void it8152_unmask_irq(struct irq_data *d)
-{
- unsigned int irq = d->irq;
-
- if (irq >= IT8152_LD_IRQ(0)) {
- __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &
- ~(1 << (irq - IT8152_LD_IRQ(0)))),
- IT8152_INTC_LDCNIMR);
- } else if (irq >= IT8152_LP_IRQ(0)) {
- __raw_writel((__raw_readl(IT8152_INTC_LPCNIMR) &
- ~(1 << (irq - IT8152_LP_IRQ(0)))),
- IT8152_INTC_LPCNIMR);
- } else if (irq >= IT8152_PD_IRQ(0)) {
- __raw_writel((__raw_readl(IT8152_INTC_PDCNIMR) &
- ~(1 << (irq - IT8152_PD_IRQ(0)))),
- IT8152_INTC_PDCNIMR);
- }
-}
-
-static struct irq_chip it8152_irq_chip = {
- .name = "it8152",
- .irq_ack = it8152_mask_irq,
- .irq_mask = it8152_mask_irq,
- .irq_unmask = it8152_unmask_irq,
-};
-
-void it8152_init_irq(void)
-{
- int irq;
-
- __raw_writel((0xffff), IT8152_INTC_PDCNIMR);
- __raw_writel((0), IT8152_INTC_PDCNIRR);
- __raw_writel((0xffff), IT8152_INTC_LPCNIMR);
- __raw_writel((0), IT8152_INTC_LPCNIRR);
- __raw_writel((0xffff), IT8152_INTC_LDCNIMR);
- __raw_writel((0), IT8152_INTC_LDCNIRR);
-
- for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) {
- irq_set_chip_and_handler(irq, &it8152_irq_chip,
- handle_level_irq);
- irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
- }
-}
-
-void it8152_irq_demux(struct irq_desc *desc)
-{
- int bits_pd, bits_lp, bits_ld;
- int i;
-
- while (1) {
- /* Read all */
- bits_pd = __raw_readl(IT8152_INTC_PDCNIRR);
- bits_lp = __raw_readl(IT8152_INTC_LPCNIRR);
- bits_ld = __raw_readl(IT8152_INTC_LDCNIRR);
-
- /* Ack */
- __raw_writel((~bits_pd), IT8152_INTC_PDCNIRR);
- __raw_writel((~bits_lp), IT8152_INTC_LPCNIRR);
- __raw_writel((~bits_ld), IT8152_INTC_LDCNIRR);
-
- if (!(bits_ld | bits_lp | bits_pd)) {
- /* Re-read to guarantee, that there was a moment of
- time, when they all three were 0. */
- bits_pd = __raw_readl(IT8152_INTC_PDCNIRR);
- bits_lp = __raw_readl(IT8152_INTC_LPCNIRR);
- bits_ld = __raw_readl(IT8152_INTC_LDCNIRR);
- if (!(bits_ld | bits_lp | bits_pd))
- return;
- }
-
- bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1);
- while (bits_pd) {
- i = __ffs(bits_pd);
- generic_handle_irq(IT8152_PD_IRQ(i));
- bits_pd &= ~(1 << i);
- }
-
- bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1);
- while (bits_lp) {
- i = __ffs(bits_lp);
- generic_handle_irq(IT8152_LP_IRQ(i));
- bits_lp &= ~(1 << i);
- }
-
- bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1);
- while (bits_ld) {
- i = __ffs(bits_ld);
- generic_handle_irq(IT8152_LD_IRQ(i));
- bits_ld &= ~(1 << i);
- }
- }
-}
-
-/* mapping for on-chip devices */
-int __init it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- if ((dev->vendor == PCI_VENDOR_ID_ITE) &&
- (dev->device == PCI_DEVICE_ID_ITE_8152)) {
- if ((dev->class >> 8) == PCI_CLASS_MULTIMEDIA_AUDIO)
- return IT8152_AUDIO_INT;
- if ((dev->class >> 8) == PCI_CLASS_SERIAL_USB)
- return IT8152_USB_INT;
- if ((dev->class >> 8) == PCI_CLASS_SYSTEM_DMA)
- return IT8152_CDMA_INT;
- }
-
- return 0;
-}
-
-static unsigned long it8152_pci_dev_base_address(struct pci_bus *bus,
- unsigned int devfn)
-{
- unsigned long addr = 0;
-
- if (bus->number == 0) {
- if (devfn < PCI_DEVFN(MAX_SLOTS, 0))
- addr = (devfn << 8);
- } else
- addr = (bus->number << 16) | (devfn << 8);
-
- return addr;
-}
-
-static int it8152_pci_read_config(struct pci_bus *bus,
- unsigned int devfn, int where,
- int size, u32 *value)
-{
- unsigned long addr = it8152_pci_dev_base_address(bus, devfn);
- u32 v;
- int shift;
-
- shift = (where & 3);
-
- __raw_writel((addr + where), IT8152_PCI_CFG_ADDR);
- v = (__raw_readl(IT8152_PCI_CFG_DATA) >> (8 * (shift)));
-
- *value = v;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int it8152_pci_write_config(struct pci_bus *bus,
- unsigned int devfn, int where,
- int size, u32 value)
-{
- unsigned long addr = it8152_pci_dev_base_address(bus, devfn);
- u32 v, vtemp, mask = 0;
- int shift;
-
- if (size == 1)
- mask = 0xff;
- if (size == 2)
- mask = 0xffff;
-
- shift = (where & 3);
-
- __raw_writel((addr + where), IT8152_PCI_CFG_ADDR);
- vtemp = __raw_readl(IT8152_PCI_CFG_DATA);
-
- if (mask)
- vtemp &= ~(mask << (8 * shift));
- else
- vtemp = 0;
-
- v = (value << (8 * shift));
- __raw_writel((addr + where), IT8152_PCI_CFG_ADDR);
- __raw_writel((v | vtemp), IT8152_PCI_CFG_DATA);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops it8152_ops = {
- .read = it8152_pci_read_config,
- .write = it8152_pci_write_config,
-};
-
-static struct resource it8152_io = {
- .name = "IT8152 PCI I/O region",
- .flags = IORESOURCE_IO,
-};
-
-static struct resource it8152_mem = {
- .name = "IT8152 PCI memory region",
- .start = 0x10000000,
- .end = 0x13e00000,
- .flags = IORESOURCE_MEM,
-};
-
-/*
- * The following functions are needed for DMA bouncing.
- * ITE8152 chip can address up to 64MByte, so all the devices
- * connected to ITE8152 (PCI and USB) should have limited DMA window
- */
-static int it8152_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
-{
- dev_dbg(dev, "%s: dma_addr %08x, size %08x\n",
- __func__, dma_addr, size);
- return (dma_addr + size - PHYS_OFFSET) >= SZ_64M;
-}
-
-/*
- * Setup DMA mask to 64MB on devices connected to ITE8152. Ignore all
- * other devices.
- */
-static int it8152_pci_platform_notify(struct device *dev)
-{
- if (dev_is_pci(dev)) {
- if (dev->dma_mask)
- *dev->dma_mask = (SZ_64M - 1) | PHYS_OFFSET;
- dev->coherent_dma_mask = (SZ_64M - 1) | PHYS_OFFSET;
- dmabounce_register_dev(dev, 2048, 4096, it8152_needs_bounce);
- }
- return 0;
-}
-
-static int it8152_pci_platform_notify_remove(struct device *dev)
-{
- if (dev_is_pci(dev))
- dmabounce_unregister_dev(dev);
-
- return 0;
-}
-
-int dma_set_coherent_mask(struct device *dev, u64 mask)
-{
- if (mask >= PHYS_OFFSET + SZ_64M - 1)
- return 0;
-
- return -EIO;
-}
-
-int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
-{
- /*
- * FIXME: use pci_ioremap_io to remap the IO space here and
- * move over to the generic io.h implementation.
- * This requires solving the same problem for PXA PCMCIA
- * support.
- */
- it8152_io.start = (unsigned long)IT8152_IO_BASE + 0x12000;
- it8152_io.end = (unsigned long)IT8152_IO_BASE + 0x12000 + 0x100000;
-
- sys->mem_offset = 0x10000000;
- sys->io_offset = (unsigned long)IT8152_IO_BASE;
-
- if (request_resource(&ioport_resource, &it8152_io)) {
- printk(KERN_ERR "PCI: unable to allocate IO region\n");
- goto err0;
- }
- if (request_resource(&iomem_resource, &it8152_mem)) {
- printk(KERN_ERR "PCI: unable to allocate memory region\n");
- goto err1;
- }
-
- pci_add_resource_offset(&sys->resources, &it8152_io, sys->io_offset);
- pci_add_resource_offset(&sys->resources, &it8152_mem, sys->mem_offset);
-
- if (platform_notify || platform_notify_remove) {
- printk(KERN_ERR "PCI: Can't use platform_notify\n");
- goto err2;
- }
-
- platform_notify = it8152_pci_platform_notify;
- platform_notify_remove = it8152_pci_platform_notify_remove;
-
- return 1;
-
-err2:
- release_resource(&it8152_io);
-err1:
- release_resource(&it8152_mem);
-err0:
- return -EBUSY;
-}
-
-/* ITE bridge requires setting latency timer to avoid early bus access
- termination by PCI bus master devices
-*/
-void pcibios_set_master(struct pci_dev *dev)
-{
- u8 lat;
-
- /* no need to update on-chip OHCI controller */
- if ((dev->vendor == PCI_VENDOR_ID_ITE) &&
- (dev->device == PCI_DEVICE_ID_ITE_8152) &&
- ((dev->class >> 8) == PCI_CLASS_SERIAL_USB))
- return;
-
- pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
- if (lat < 16)
- lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
- else if (lat > pcibios_max_latency)
- lat = pcibios_max_latency;
- else
- return;
- printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
- pci_name(dev), lat);
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
-
-
-EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
deleted file mode 100644
index e175c2384f28..000000000000
--- a/arch/arm/include/asm/hardware/it8152.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/include/arm/hardware/it8152.h
- *
- * Copyright Compulab Ltd., 2006,2007
- * Mike Rapoport <mike@compulab.co.il>
- *
- * ITE 8152 companion chip register definitions
- */
-
-#ifndef __ASM_HARDWARE_IT8152_H
-#define __ASM_HARDWARE_IT8152_H
-
-#include <mach/irqs.h>
-
-extern void __iomem *it8152_base_address;
-
-#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)
-#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)
-
-#define __REG_IT8152(x) (it8152_base_address + (x))
-
-#define IT8152_PCI_CFG_ADDR __REG_IT8152(0x3f00800)
-#define IT8152_PCI_CFG_DATA __REG_IT8152(0x3f00804)
-
-#define IT8152_INTC_LDCNIRR __REG_IT8152(0x3f00300)
-#define IT8152_INTC_LDPNIRR __REG_IT8152(0x3f00304)
-#define IT8152_INTC_LDCNIMR __REG_IT8152(0x3f00308)
-#define IT8152_INTC_LDPNIMR __REG_IT8152(0x3f0030C)
-#define IT8152_INTC_LDNITR __REG_IT8152(0x3f00310)
-#define IT8152_INTC_LDNIAR __REG_IT8152(0x3f00314)
-#define IT8152_INTC_LPCNIRR __REG_IT8152(0x3f00320)
-#define IT8152_INTC_LPPNIRR __REG_IT8152(0x3f00324)
-#define IT8152_INTC_LPCNIMR __REG_IT8152(0x3f00328)
-#define IT8152_INTC_LPPNIMR __REG_IT8152(0x3f0032C)
-#define IT8152_INTC_LPNITR __REG_IT8152(0x3f00330)
-#define IT8152_INTC_LPNIAR __REG_IT8152(0x3f00334)
-#define IT8152_INTC_PDCNIRR __REG_IT8152(0x3f00340)
-#define IT8152_INTC_PDPNIRR __REG_IT8152(0x3f00344)
-#define IT8152_INTC_PDCNIMR __REG_IT8152(0x3f00348)
-#define IT8152_INTC_PDPNIMR __REG_IT8152(0x3f0034C)
-#define IT8152_INTC_PDNITR __REG_IT8152(0x3f00350)
-#define IT8152_INTC_PDNIAR __REG_IT8152(0x3f00354)
-#define IT8152_INTC_INTC_TYPER __REG_IT8152(0x3f003FC)
-
-#define IT8152_GPIO_GPDR __REG_IT8152(0x3f00500)
-
-/*
- Interrupt controller per register summary:
- ---------------------------------------
- LCDNIRR:
- IT8152_LD_IRQ(8) PCICLK stop
- IT8152_LD_IRQ(7) MCLK ready
- IT8152_LD_IRQ(6) s/w
- IT8152_LD_IRQ(5) UART
- IT8152_LD_IRQ(4) GPIO
- IT8152_LD_IRQ(3) TIMER 4
- IT8152_LD_IRQ(2) TIMER 3
- IT8152_LD_IRQ(1) TIMER 2
- IT8152_LD_IRQ(0) TIMER 1
-
- LPCNIRR:
- IT8152_LP_IRQ(x) serial IRQ x
-
- PCIDNIRR:
- IT8152_PD_IRQ(14) PCISERR
- IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR)
- IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR)
- IT8152_PD_IRQ(11) PCI INTD
- IT8152_PD_IRQ(10) PCI INTC
- IT8152_PD_IRQ(9) PCI INTB
- IT8152_PD_IRQ(8) PCI INTA
- IT8152_PD_IRQ(7) serial INTD
- IT8152_PD_IRQ(6) serial INTC
- IT8152_PD_IRQ(5) serial INTB
- IT8152_PD_IRQ(4) serial INTA
- IT8152_PD_IRQ(3) serial IRQ IOCHK (IOCHKR)
- IT8152_PD_IRQ(2) chaining DMA (CDMAR)
- IT8152_PD_IRQ(1) USB (USBR)
- IT8152_PD_IRQ(0) Audio controller (ACR)
- */
-#define IT8152_IRQ(x) (IRQ_BOARD_START + (x))
-#define IT8152_LAST_IRQ (IRQ_BOARD_START + 40)
-
-/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
-#define IT8152_LD_IRQ_COUNT 9
-#define IT8152_LP_IRQ_COUNT 16
-#define IT8152_PD_IRQ_COUNT 15
-
-/* Priorities: */
-#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
-#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
-#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
-
-/* frequently used interrupts */
-#define IT8152_PCISERR IT8152_PD_IRQ(14)
-#define IT8152_H2PTADR IT8152_PD_IRQ(13)
-#define IT8152_H2PMAR IT8152_PD_IRQ(12)
-#define IT8152_PCI_INTD IT8152_PD_IRQ(11)
-#define IT8152_PCI_INTC IT8152_PD_IRQ(10)
-#define IT8152_PCI_INTB IT8152_PD_IRQ(9)
-#define IT8152_PCI_INTA IT8152_PD_IRQ(8)
-#define IT8152_CDMA_INT IT8152_PD_IRQ(2)
-#define IT8152_USB_INT IT8152_PD_IRQ(1)
-#define IT8152_AUDIO_INT IT8152_PD_IRQ(0)
-
-struct pci_dev;
-struct pci_sys_data;
-
-extern void it8152_irq_demux(struct irq_desc *desc);
-extern void it8152_init_irq(void);
-extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
-extern struct pci_ops it8152_ops;
-
-#endif /* __ASM_HARDWARE_IT8152_H */
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 98c6b91be4a8..b5fdd30252f8 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -78,7 +78,11 @@ static inline void set_fs(mm_segment_t fs)
#define segment_eq(a, b) ((a) == (b))
-/* We use 33-bit arithmetic here... */
+/*
+ * We use 33-bit arithmetic here. Success returns zero, failure returns
+ * addr_limit. We take advantage that addr_limit will be zero for KERNEL_DS,
+ * so this will always return success in that case.
+ */
#define __range_ok(addr, size) ({ \
unsigned long flag, roksum; \
__chk_user_ptr(addr); \
diff --git a/arch/arm/include/asm/vfp.h b/arch/arm/include/asm/vfp.h
index 7157d2a30a49..19928bfb4f9c 100644
--- a/arch/arm/include/asm/vfp.h
+++ b/arch/arm/include/asm/vfp.h
@@ -9,6 +9,7 @@
#ifndef __ASM_VFP_H
#define __ASM_VFP_H
+#ifndef CONFIG_AS_VFP_VMRS_FPINST
#define FPSID cr0
#define FPSCR cr1
#define MVFR1 cr6
@@ -16,6 +17,7 @@
#define FPEXC cr8
#define FPINST cr9
#define FPINST2 cr10
+#endif
/* FPSID bits */
#define FPSID_IMPLEMENTER_BIT (24)
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 628c336e8e3b..ba0d4cb5377e 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -8,7 +8,16 @@
#include <asm/vfp.h>
-@ Macros to allow building with old toolkits (with no VFP support)
+#ifdef CONFIG_AS_VFP_VMRS_FPINST
+ .macro VFPFMRX, rd, sysreg, cond
+ vmrs\cond \rd, \sysreg
+ .endm
+
+ .macro VFPFMXR, sysreg, rd, cond
+ vmsr\cond \sysreg, \rd
+ .endm
+#else
+ @ Macros to allow building with old toolkits (with no VFP support)
.macro VFPFMRX, rd, sysreg, cond
MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
.endm
@@ -16,26 +25,29 @@
.macro VFPFMXR, sysreg, rd, cond
MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
.endm
+#endif
@ read all the working registers back into the VFP
.macro VFPFLDMIA, base, tmp
+ .fpu vfpv2
#if __LINUX_ARM_ARCH__ < 6
- LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
+ fldmiax \base!, {d0-d15}
#else
- LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
+ vldmia \base!, {d0-d15}
#endif
#ifdef CONFIG_VFPv3
+ .fpu vfpv3
#if __LINUX_ARM_ARCH__ <= 6
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
tst \tmp, #HWCAP_VFPD32
- ldclne p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
+ vldmiane \base!, {d16-d31}
addeq \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
cmp \tmp, #2 @ 32 x 64bit registers?
- ldcleq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
+ vldmiaeq \base!, {d16-d31}
addne \base, \base, #32*4 @ step over unused register space
#endif
#endif
@@ -44,22 +56,23 @@
@ write all the working registers out of the VFP
.macro VFPFSTMIA, base, tmp
#if __LINUX_ARM_ARCH__ < 6
- STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
+ fstmiax \base!, {d0-d15}
#else
- STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
+ vstmia \base!, {d0-d15}
#endif
#ifdef CONFIG_VFPv3
+ .fpu vfpv3
#if __LINUX_ARM_ARCH__ <= 6
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
tst \tmp, #HWCAP_VFPD32
- stclne p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
+ vstmiane \base!, {d16-d31}
addeq \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
cmp \tmp, #2 @ 32 x 64bit registers?
- stcleq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
+ vstmiaeq \base!, {d16-d31}
addne \base, \base, #32*4 @ step over unused register space
#endif
#endif
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index ed46ca69813d..eecec16aa708 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -252,23 +252,6 @@ static void pci_fixup_cy82c693(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
-static void pci_fixup_it8152(struct pci_dev *dev)
-{
- int i;
- /* fixup for ITE 8152 devices */
- /* FIXME: add defines for class 0x68000 and 0x80103 */
- if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST ||
- dev->class == 0x68000 ||
- dev->class == 0x80103) {
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- dev->resource[i].start = 0;
- dev->resource[i].end = 0;
- dev->resource[i].flags = 0;
- }
- }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8152, pci_fixup_it8152);
-
/*
* If the bus contains any of these devices, then we must not turn on
* parity checking of any kind. Currently this is CyberPro 20x0 only.
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index cc726afea023..76ea4178a55c 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -22,6 +22,19 @@
* A simple function epilogue looks like this:
* ldm sp, {fp, sp, pc}
*
+ * When compiled with clang, pc and sp are not pushed. A simple function
+ * prologue looks like this when built with clang:
+ *
+ * stmdb {..., fp, lr}
+ * add fp, sp, #x
+ * sub sp, sp, #y
+ *
+ * A simple function epilogue looks like this when built with clang:
+ *
+ * sub sp, fp, #x
+ * ldm {..., fp, pc}
+ *
+ *
* Note that with framepointer enabled, even the leaf functions have the same
* prologue and epilogue, therefore we can ignore the LR value in this case.
*/
@@ -34,6 +47,16 @@ int notrace unwind_frame(struct stackframe *frame)
low = frame->sp;
high = ALIGN(low, THREAD_SIZE);
+#ifdef CONFIG_CC_IS_CLANG
+ /* check current frame pointer is within bounds */
+ if (fp < low + 4 || fp > high - 4)
+ return -EINVAL;
+
+ frame->sp = frame->fp;
+ frame->fp = *(unsigned long *)(fp);
+ frame->pc = frame->lr;
+ frame->lr = *(unsigned long *)(fp + 4);
+#else
/* check current frame pointer is within bounds */
if (fp < low + 12 || fp > high - 4)
return -EINVAL;
@@ -42,6 +65,7 @@ int notrace unwind_frame(struct stackframe *frame)
frame->fp = *(unsigned long *)(fp - 12);
frame->sp = *(unsigned long *)(fp - 8);
frame->pc = *(unsigned long *)(fp - 4);
+#endif
return 0;
}
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index bcd82614c25d..cc3c9a6a1113 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -74,8 +74,6 @@ struct cachepolicy {
pteval_t pte;
};
-unsigned long kimage_voffset __ro_after_init;
-
static struct cachepolicy cache_policies[] __initdata = {
{
.policy = "uncached",
@@ -1654,9 +1652,6 @@ void __init paging_init(const struct machine_desc *mdesc)
empty_zero_page = virt_to_page(zero_page);
__flush_dcache_page(NULL, empty_zero_page);
-
- /* Compute the virt/idmap offset, mostly for the sake of KVM */
- kimage_voffset = (unsigned long)&kimage_voffset - virt_to_idmap(&kimage_voffset);
}
void __init early_mm_init(const struct machine_desc *mdesc)
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 60ac7c5999a9..e2c743aa2eb2 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -5,7 +5,6 @@
* VMA_VM_FLAGS
* VM_EXEC
*/
-#include <linux/const.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>
@@ -31,8 +30,7 @@
* act_mm - get current->active_mm
*/
.macro act_mm, rd
- bic \rd, sp, #(THREAD_SIZE - 1) & ~63
- bic \rd, \rd, #63
+ get_thread_info \rd
ldr \rd, [\rd, #TI_TASK]
.if (TSK_ACTIVE_MM > IMM12_MASK)
add \rd, \rd, #TSK_ACTIVE_MM & ~IMM12_MASK
diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile
index 9975b63ac3b0..749901a72d6d 100644
--- a/arch/arm/vfp/Makefile
+++ b/arch/arm/vfp/Makefile
@@ -8,6 +8,4 @@
# ccflags-y := -DDEBUG
# asflags-y := -DDEBUG
-KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp -mfloat-abi=soft)
-
obj-y += vfpmodule.o entry.o vfphw.o vfpsingle.o vfpdouble.o
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index b2e560290860..4fcff9f59947 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -78,6 +78,7 @@
ENTRY(vfp_support_entry)
DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
+ .fpu vfpv2
ldr r3, [sp, #S_PSR] @ Neither lazy restore nor FP exceptions
and r3, r3, #MODE_MASK @ are supported in kernel mode
teq r3, #USR_MODE
@@ -258,11 +259,14 @@ vfp_current_hw_state_address:
ENTRY(vfp_get_float)
tbl_branch r0, r3, #3
+ .fpu vfpv2
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1: mrc p10, 0, r0, c\dr, c0, 0 @ fmrs r0, s0
+1: vmov r0, s\dr
ret lr
.org 1b + 8
-1: mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1
+ .endr
+ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
+1: vmov r0, s\dr
ret lr
.org 1b + 8
.endr
@@ -270,11 +274,14 @@ ENDPROC(vfp_get_float)
ENTRY(vfp_put_float)
tbl_branch r1, r3, #3
+ .fpu vfpv2
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1: mcr p10, 0, r0, c\dr, c0, 0 @ fmsr r0, s0
+1: vmov s\dr, r0
ret lr
.org 1b + 8
-1: mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1
+ .endr
+ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
+1: vmov s\dr, r0
ret lr
.org 1b + 8
.endr
@@ -282,15 +289,17 @@ ENDPROC(vfp_put_float)
ENTRY(vfp_get_double)
tbl_branch r0, r3, #3
+ .fpu vfpv2
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1: fmrrd r0, r1, d\dr
+1: vmov r0, r1, d\dr
ret lr
.org 1b + 8
.endr
#ifdef CONFIG_VFPv3
@ d16 - d31 registers
- .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1: mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr
+ .fpu vfpv3
+ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
+1: vmov r0, r1, d\dr
ret lr
.org 1b + 8
.endr
@@ -304,15 +313,17 @@ ENDPROC(vfp_get_double)
ENTRY(vfp_put_double)
tbl_branch r2, r3, #3
+ .fpu vfpv2
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1: fmdrr d\dr, r0, r1
+1: vmov d\dr, r0, r1
ret lr
.org 1b + 8
.endr
#ifdef CONFIG_VFPv3
+ .fpu vfpv3
@ d16 - d31 registers
- .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr
+ .irp dr,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
+1: vmov d\dr, r0, r1
ret lr
.org 1b + 8
.endr
diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h
index 38dc154e39ff..3c7938fd40aa 100644
--- a/arch/arm/vfp/vfpinstr.h
+++ b/arch/arm/vfp/vfpinstr.h
@@ -62,10 +62,23 @@
#define FPSCR_C (1 << 29)
#define FPSCR_V (1 << 28)
-/*
- * Since we aren't building with -mfpu=vfp, we need to code
- * these instructions using their MRC/MCR equivalents.
- */
+#ifdef CONFIG_AS_VFP_VMRS_FPINST
+
+#define fmrx(_vfp_) ({ \
+ u32 __v; \
+ asm(".fpu vfpv2\n" \
+ "vmrs %0, " #_vfp_ \
+ : "=r" (__v) : : "cc"); \
+ __v; \
+ })
+
+#define fmxr(_vfp_,_var_) \
+ asm(".fpu vfpv2\n" \
+ "vmsr " #_vfp_ ", %0" \
+ : : "r" (_var_) : "cc")
+
+#else
+
#define vfpreg(_vfp_) #_vfp_
#define fmrx(_vfp_) ({ \
@@ -79,6 +92,8 @@
asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" \
: : "r" (_var_) : "cc")
+#endif
+
u32 vfp_single_cpdo(u32 inst, u32 fpscr);
u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 10:54:51 +0100