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-rw-r--r--arch/microblaze/Kconfig6
-rw-r--r--arch/microblaze/Makefile2
-rw-r--r--arch/microblaze/include/asm/io.h2
-rw-r--r--arch/microblaze/include/asm/pci-bridge.h2
-rw-r--r--arch/microblaze/include/asm/pci.h2
-rw-r--r--arch/microblaze/include/asm/unistd.h6
-rw-r--r--arch/microblaze/kernel/Makefile1
-rw-r--r--arch/microblaze/kernel/cpu/Makefile2
-rw-r--r--arch/microblaze/kernel/cpu/cache.c2
-rw-r--r--arch/microblaze/kernel/ftrace.c10
-rw-r--r--arch/microblaze/kernel/intc.c10
-rw-r--r--arch/microblaze/kernel/irq.c42
-rw-r--r--arch/microblaze/kernel/syscall_table.S4
-rw-r--r--arch/microblaze/lib/Makefile6
-rw-r--r--arch/microblaze/lib/memcpy.c8
-rw-r--r--arch/microblaze/lib/memmove.c6
-rw-r--r--arch/microblaze/lib/memset.c2
-rw-r--r--arch/microblaze/pci/indirect_pci.c2
-rw-r--r--arch/microblaze/pci/pci-common.c2
-rw-r--r--arch/microblaze/platform/generic/Kconfig.auto2
20 files changed, 48 insertions, 71 deletions
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 922c4194c7bb..eccdefe70d4e 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -6,7 +6,6 @@ config MICROBLAZE
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_DYNAMIC_FTRACE
select HAVE_FTRACE_MCOUNT_RECORD
- select USB_ARCH_HAS_EHCI
select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_OPROFILE
select HAVE_ARCH_KGDB
@@ -17,7 +16,7 @@ config MICROBLAZE
select OF_EARLY_FLATTREE
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
- select GENERIC_HARDIRQS_NO_DEPRECATED
+ select GENERIC_IRQ_SHOW
config SWAP
def_bool n
@@ -37,6 +36,9 @@ config ARCH_HAS_ILOG2_U64
config GENERIC_FIND_NEXT_BIT
def_bool y
+config GENERIC_FIND_BIT_LE
+ def_bool y
+
config GENERIC_HWEIGHT
def_bool y
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index 6f432e6df9af..b23c40eb7a52 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -18,7 +18,7 @@ export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
# rather than bools y/n
# Work out HW multipler support. This is tricky.
-# 1. Spartan2 has no HW multiplers.
+# 1. Spartan2 has no HW multipliers.
# 2. MicroBlaze v3.x always uses them, except in Spartan 2
# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY)))
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index eae32220f447..8cdac14b55b0 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -70,7 +70,7 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
/*
* read (readb, readw, readl, readq) and write (writeb, writew,
- * writel, writeq) accessors are for PCI and thus littel endian.
+ * writel, writeq) accessors are for PCI and thus little endian.
* Linux 2.4 for Microblaze had this wrong.
*/
static inline unsigned char readb(const volatile void __iomem *addr)
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 10717669e0c2..746df91e5796 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -76,7 +76,7 @@ struct pci_controller {
* Used for variants of PCI indirect handling and possible quirks:
* SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
* EXT_REG - provides access to PCI-e extended registers
- * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
+ * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
* on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
* to determine which bus number to match on when generating type0
* config cycles
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 2232ff942ba9..ba65cf472544 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -158,7 +158,7 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
extern void pcibios_setup_bus_devices(struct pci_bus *bus);
extern void pcibios_setup_bus_self(struct pci_bus *bus);
-/* This part of code was originaly in xilinx-pci.h */
+/* This part of code was originally in xilinx-pci.h */
#ifdef CONFIG_PCI_XILINX
extern void __init xilinx_pci_init(void);
#else
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index d770b00ec6b1..30edd61a6b8f 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -386,8 +386,12 @@
#define __NR_fanotify_init 368
#define __NR_fanotify_mark 369
#define __NR_prlimit64 370
+#define __NR_name_to_handle_at 371
+#define __NR_open_by_handle_at 372
+#define __NR_clock_adjtime 373
+#define __NR_syncfs 374
-#define __NR_syscalls 371
+#define __NR_syscalls 375
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index f0cb5c26c81c..494b63b72dd7 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -10,6 +10,7 @@ CFLAGS_REMOVE_early_printk.o = -pg
CFLAGS_REMOVE_selfmod.o = -pg
CFLAGS_REMOVE_heartbeat.o = -pg
CFLAGS_REMOVE_ftrace.o = -pg
+CFLAGS_REMOVE_process.o = -pg
endif
extra-y := head.o vmlinux.lds
diff --git a/arch/microblaze/kernel/cpu/Makefile b/arch/microblaze/kernel/cpu/Makefile
index 59cc7bceaf8c..fceed4edea41 100644
--- a/arch/microblaze/kernel/cpu/Makefile
+++ b/arch/microblaze/kernel/cpu/Makefile
@@ -6,7 +6,7 @@ ifdef CONFIG_FUNCTION_TRACER
CFLAGS_REMOVE_cache.o = -pg
endif
-EXTRA_CFLAGS += -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \
+ccflags-y := -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \
-DCPU_REV=$(CPU_REV)
obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index cf0afd90a2c0..4b7d8a3f4aef 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -129,7 +129,7 @@ do { \
* to use for simple wdc or wic.
*
* start address is cache aligned
- * end address is not aligned, if end is aligned then I have to substract
+ * end address is not aligned, if end is aligned then I have to subtract
* cacheline length because I can't flush/invalidate the next cacheline.
* If is not, I align it because I will flush/invalidate whole line.
*/
diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c
index 515feb404555..357d56abe24a 100644
--- a/arch/microblaze/kernel/ftrace.c
+++ b/arch/microblaze/kernel/ftrace.c
@@ -51,6 +51,9 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
: "r" (parent), "r" (return_hooker)
);
+ flush_dcache_range((u32)parent, (u32)parent + 4);
+ flush_icache_range((u32)parent, (u32)parent + 4);
+
if (unlikely(faulted)) {
ftrace_graph_stop();
WARN_ON(1);
@@ -95,6 +98,9 @@ static int ftrace_modify_code(unsigned long addr, unsigned int value)
if (unlikely(faulted))
return -EFAULT;
+ flush_dcache_range(addr, addr + 4);
+ flush_icache_range(addr, addr + 4);
+
return 0;
}
@@ -195,8 +201,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
ret += ftrace_modify_code((unsigned long)&ftrace_caller,
MICROBLAZE_NOP);
- /* All changes are done - lets do caches consistent */
- flush_icache();
return ret;
}
@@ -210,7 +214,6 @@ int ftrace_enable_ftrace_graph_caller(void)
old_jump = *(unsigned int *)ip; /* save jump over instruction */
ret = ftrace_modify_code(ip, MICROBLAZE_NOP);
- flush_icache();
pr_debug("%s: Replace instruction: 0x%x\n", __func__, old_jump);
return ret;
@@ -222,7 +225,6 @@ int ftrace_disable_ftrace_graph_caller(void)
unsigned long ip = (unsigned long)(&ftrace_call_graph);
ret = ftrace_modify_code(ip, old_jump);
- flush_icache();
pr_debug("%s\n", __func__);
return ret;
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index e4661285118e..c88f066f41bd 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -50,7 +50,7 @@ static void intc_enable_or_unmask(struct irq_data *d)
* ack function since the handle_level_irq function
* acks the irq before calling the interrupt handler
*/
- if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
+ if (irqd_is_level_type(d))
out_be32(INTC_BASE + IAR, mask);
}
@@ -157,12 +157,12 @@ void __init init_IRQ(void)
for (i = 0; i < nr_irq; ++i) {
if (intr_type & (0x00000001 << i)) {
- set_irq_chip_and_handler_name(i, &intc_dev,
- handle_edge_irq, intc_dev.name);
+ irq_set_chip_and_handler_name(i, &intc_dev,
+ handle_edge_irq, "edge");
irq_clear_status_flags(i, IRQ_LEVEL);
} else {
- set_irq_chip_and_handler_name(i, &intc_dev,
- handle_level_irq, intc_dev.name);
+ irq_set_chip_and_handler_name(i, &intc_dev,
+ handle_level_irq, "level");
irq_set_status_flags(i, IRQ_LEVEL);
}
}
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index 098822413729..ce7ac8435d5c 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -47,48 +47,6 @@ next_irq:
trace_hardirqs_on();
}
-int show_interrupts(struct seq_file *p, void *v)
-{
- int i = *(loff_t *) v, j;
- struct irq_desc *desc;
- struct irqaction *action;
- unsigned long flags;
-
- if (i == 0) {
- seq_printf(p, " ");
- for_each_online_cpu(j)
- seq_printf(p, "CPU%-8d", j);
- seq_putc(p, '\n');
- }
-
- if (i < nr_irq) {
- desc = irq_to_desc(i);
- raw_spin_lock_irqsave(&desc->lock, flags);
- action = desc->action;
- if (!action)
- goto skip;
- seq_printf(p, "%3d: ", i);
-#ifndef CONFIG_SMP
- seq_printf(p, "%10u ", kstat_irqs(i));
-#else
- for_each_online_cpu(j)
- seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
-#endif
- seq_printf(p, " %8s", desc->status &
- IRQ_LEVEL ? "level" : "edge");
- seq_printf(p, " %8s", desc->irq_data.chip->name);
- seq_printf(p, " %s", action->name);
-
- for (action = action->next; action; action = action->next)
- seq_printf(p, ", %s", action->name);
-
- seq_putc(p, '\n');
-skip:
- raw_spin_unlock_irqrestore(&desc->lock, flags);
- }
- return 0;
-}
-
/* MS: There is no any advance mapping mechanism. We are using simple 32bit
intc without any cascades or any connection that's why mapping is 1:1 */
unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq)
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index e88a930fd1e3..85cea81d1ca1 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -375,3 +375,7 @@ ENTRY(sys_call_table)
.long sys_fanotify_init
.long sys_fanotify_mark
.long sys_prlimit64 /* 370 */
+ .long sys_name_to_handle_at
+ .long sys_open_by_handle_at
+ .long sys_clock_adjtime
+ .long sys_syncfs
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index f1fcbff3da25..10c320aa908b 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -2,6 +2,12 @@
# Makefile
#
+ifdef CONFIG_FUNCTION_TRACER
+CFLAGS_REMOVE_ashldi3.o = -pg
+CFLAGS_REMOVE_ashrdi3.o = -pg
+CFLAGS_REMOVE_lshrdi3.o = -pg
+endif
+
lib-y := memset.o
ifeq ($(CONFIG_OPT_LIB_ASM),y)
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index cc495d7d99cc..52746e718dfa 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -63,8 +63,8 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
if (likely(c >= 4)) {
unsigned value, buf_hold;
- /* Align the dstination to a word boundry. */
- /* This is done in an endian independant manner. */
+ /* Align the destination to a word boundary. */
+ /* This is done in an endian independent manner. */
switch ((unsigned long)dst & 3) {
case 1:
*dst++ = *src++;
@@ -80,7 +80,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
i_dst = (void *)dst;
/* Choose a copy scheme based on the source */
- /* alignment relative to dstination. */
+ /* alignment relative to destination. */
switch ((unsigned long)src & 3) {
case 0x0: /* Both byte offsets are aligned */
i_src = (const void *)src;
@@ -173,7 +173,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
}
/* Finish off any remaining bytes */
- /* simple fast copy, ... unless a cache boundry is crossed */
+ /* simple fast copy, ... unless a cache boundary is crossed */
switch (c) {
case 3:
*dst++ = *src++;
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
index 810fd68775e3..2146c3752a80 100644
--- a/arch/microblaze/lib/memmove.c
+++ b/arch/microblaze/lib/memmove.c
@@ -83,8 +83,8 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
if (c >= 4) {
unsigned value, buf_hold;
- /* Align the destination to a word boundry. */
- /* This is done in an endian independant manner. */
+ /* Align the destination to a word boundary. */
+ /* This is done in an endian independent manner. */
switch ((unsigned long)dst & 3) {
case 3:
@@ -193,7 +193,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
dst = (void *)i_dst;
}
- /* simple fast copy, ... unless a cache boundry is crossed */
+ /* simple fast copy, ... unless a cache boundary is crossed */
/* Finish off any remaining bytes */
switch (c) {
case 4:
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index 834565d1607e..ddf67939576d 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -64,7 +64,7 @@ void *memset(void *v_src, int c, __kernel_size_t n)
if (likely(n >= 4)) {
/* Align the destination to a word boundary */
- /* This is done in an endian independant manner */
+ /* This is done in an endian independent manner */
switch ((unsigned) src & 3) {
case 1:
*src++ = c;
diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c
index 25f18f017f21..4196eb6bd764 100644
--- a/arch/microblaze/pci/indirect_pci.c
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -108,7 +108,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
(devfn << 8) | reg | cfg_type));
- /* surpress setting of PCI_PRIMARY_BUS */
+ /* suppress setting of PCI_PRIMARY_BUS */
if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
if ((offset == PCI_PRIMARY_BUS) &&
(bus->number == hose->first_busno))
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 1e01a1253631..53599067d2f9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -237,7 +237,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
virq = irq_create_mapping(NULL, line);
if (virq != NO_IRQ)
- set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
} else {
pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
oirq.size, oirq.specifier[0], oirq.specifier[1],
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto
index 5d86fc19029d..25a6f019e94d 100644
--- a/arch/microblaze/platform/generic/Kconfig.auto
+++ b/arch/microblaze/platform/generic/Kconfig.auto
@@ -29,7 +29,7 @@ config KERNEL_BASE_ADDR
BASE Address for kernel
config XILINX_MICROBLAZE0_FAMILY
- string "Targetted FPGA family"
+ string "Targeted FPGA family"
default "virtex5"
config XILINX_MICROBLAZE0_USE_MSR_INSTR
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 03:38:51 +0100