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-rw-r--r--arch/ppc64/kernel/bpa_iommu.c8
-rw-r--r--arch/ppc64/kernel/dma.c2
-rw-r--r--arch/ppc64/kernel/head.S6
-rw-r--r--arch/ppc64/kernel/iommu.c2
-rw-r--r--arch/ppc64/kernel/kprobes.c8
-rw-r--r--arch/ppc64/kernel/machine_kexec.c1
-rw-r--r--arch/ppc64/kernel/module.c13
-rw-r--r--arch/ppc64/kernel/of_device.c7
-rw-r--r--arch/ppc64/kernel/pSeries_iommu.c181
-rw-r--r--arch/ppc64/kernel/pSeries_pci.c4
-rw-r--r--arch/ppc64/kernel/pci.c9
-rw-r--r--arch/ppc64/kernel/pci_direct_iommu.c2
-rw-r--r--arch/ppc64/kernel/pci_iommu.c2
-rw-r--r--arch/ppc64/kernel/pmac_setup.c21
-rw-r--r--arch/ppc64/kernel/pmac_time.c4
-rw-r--r--arch/ppc64/kernel/prom_init.c3
-rw-r--r--arch/ppc64/kernel/ptrace.c1
-rw-r--r--arch/ppc64/kernel/vdso32/gettimeofday.S2
-rw-r--r--arch/ppc64/kernel/vio.c2
19 files changed, 161 insertions, 117 deletions
diff --git a/arch/ppc64/kernel/bpa_iommu.c b/arch/ppc64/kernel/bpa_iommu.c
index f33a7bccb0d7..5f2460090e03 100644
--- a/arch/ppc64/kernel/bpa_iommu.c
+++ b/arch/ppc64/kernel/bpa_iommu.c
@@ -99,7 +99,11 @@ get_iost_entry(unsigned long iopt_base, unsigned long io_address, unsigned page_
break;
default: /* not a known compile time constant */
- BUILD_BUG_ON(1);
+ {
+ /* BUILD_BUG_ON() is not usable here */
+ extern void __get_iost_entry_bad_page_size(void);
+ __get_iost_entry_bad_page_size();
+ }
break;
}
@@ -306,7 +310,7 @@ static void bpa_map_iommu(void)
static void *bpa_alloc_coherent(struct device *hwdev, size_t size,
- dma_addr_t *dma_handle, unsigned int __nocast flag)
+ dma_addr_t *dma_handle, gfp_t flag)
{
void *ret;
diff --git a/arch/ppc64/kernel/dma.c b/arch/ppc64/kernel/dma.c
index 4da8e31b2b61..7c3419656ccc 100644
--- a/arch/ppc64/kernel/dma.c
+++ b/arch/ppc64/kernel/dma.c
@@ -53,7 +53,7 @@ int dma_set_mask(struct device *dev, u64 dma_mask)
EXPORT_SYMBOL(dma_set_mask);
void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, unsigned int __nocast flag)
+ dma_addr_t *dma_handle, gfp_t flag)
{
struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 58c314738c99..72c61041151a 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -1649,7 +1649,7 @@ _GLOBAL(__secondary_start)
ld r3,0(r3)
lwz r3,PLATFORM(r3) /* r3 = platform flags */
andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
- bne 98f
+ beq 98f /* branch if result is 0 */
mfspr r3,PVR
srwi r3,r3,16
cmpwi r3,0x37 /* SStar */
@@ -1813,7 +1813,7 @@ _STATIC(start_here_multiplatform)
ld r3,0(r3)
lwz r3,PLATFORM(r3) /* r3 = platform flags */
andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
- bne 98f
+ beq 98f /* branch if result is 0 */
mfspr r3,PVR
srwi r3,r3,16
cmpwi r3,0x37 /* SStar */
@@ -1834,7 +1834,7 @@ _STATIC(start_here_multiplatform)
lwz r3,PLATFORM(r3) /* r3 = platform flags */
/* Test if bit 0 is set (LPAR bit) */
andi. r3,r3,PLATFORM_LPAR
- bne 98f
+ bne 98f /* branch if result is !0 */
LOADADDR(r6,_SDR1) /* Only if NOT LPAR */
sub r6,r6,r26
ld r6,0(r6) /* get the value of _SDR1 */
diff --git a/arch/ppc64/kernel/iommu.c b/arch/ppc64/kernel/iommu.c
index 9032b6bfe036..4d9b4388918b 100644
--- a/arch/ppc64/kernel/iommu.c
+++ b/arch/ppc64/kernel/iommu.c
@@ -519,7 +519,7 @@ void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
* to the dma address (mapping) of the first page.
*/
void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
- dma_addr_t *dma_handle, unsigned int __nocast flag)
+ dma_addr_t *dma_handle, gfp_t flag)
{
void *ret = NULL;
dma_addr_t mapping;
diff --git a/arch/ppc64/kernel/kprobes.c b/arch/ppc64/kernel/kprobes.c
index 7e80d49c589a..9c6facc24f70 100644
--- a/arch/ppc64/kernel/kprobes.c
+++ b/arch/ppc64/kernel/kprobes.c
@@ -59,9 +59,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
/* insn must be on a special executable page on ppc64 */
if (!ret) {
- up(&kprobe_mutex);
- p->ainsn.insn = get_insn_slot();
down(&kprobe_mutex);
+ p->ainsn.insn = get_insn_slot();
+ up(&kprobe_mutex);
if (!p->ainsn.insn)
ret = -ENOMEM;
}
@@ -90,9 +90,9 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
void __kprobes arch_remove_kprobe(struct kprobe *p)
{
- up(&kprobe_mutex);
- free_insn_slot(p->ainsn.insn);
down(&kprobe_mutex);
+ free_insn_slot(p->ainsn.insn);
+ up(&kprobe_mutex);
}
static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
diff --git a/arch/ppc64/kernel/machine_kexec.c b/arch/ppc64/kernel/machine_kexec.c
index 4775f12a013c..bf7cc4f8210f 100644
--- a/arch/ppc64/kernel/machine_kexec.c
+++ b/arch/ppc64/kernel/machine_kexec.c
@@ -205,6 +205,7 @@ static void kexec_prepare_cpus(void)
continue;
while (paca[i].hw_cpu_id != -1) {
+ barrier();
if (!cpu_possible(i)) {
printk("kexec: cpu %d hw_cpu_id %d is not"
" possible, ignoring\n",
diff --git a/arch/ppc64/kernel/module.c b/arch/ppc64/kernel/module.c
index c683bf88e690..928b8581fcb0 100644
--- a/arch/ppc64/kernel/module.c
+++ b/arch/ppc64/kernel/module.c
@@ -341,6 +341,19 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
*(unsigned long *)location = my_r2(sechdrs, me);
break;
+ case R_PPC64_TOC16:
+ /* Subtact TOC pointer */
+ value -= my_r2(sechdrs, me);
+ if (value + 0x8000 > 0xffff) {
+ printk("%s: bad TOC16 relocation (%lu)\n",
+ me->name, value);
+ return -ENOEXEC;
+ }
+ *((uint16_t *) location)
+ = (*((uint16_t *) location) & ~0xffff)
+ | (value & 0xffff);
+ break;
+
case R_PPC64_TOC16_DS:
/* Subtact TOC pointer */
value -= my_r2(sechdrs, me);
diff --git a/arch/ppc64/kernel/of_device.c b/arch/ppc64/kernel/of_device.c
index da580812ddfe..9f200f0f2ad5 100644
--- a/arch/ppc64/kernel/of_device.c
+++ b/arch/ppc64/kernel/of_device.c
@@ -233,7 +233,9 @@ void of_device_unregister(struct of_device *ofdev)
device_unregister(&ofdev->dev);
}
-struct of_device* of_platform_device_create(struct device_node *np, const char *bus_id)
+struct of_device* of_platform_device_create(struct device_node *np,
+ const char *bus_id,
+ struct device *parent)
{
struct of_device *dev;
@@ -245,7 +247,7 @@ struct of_device* of_platform_device_create(struct device_node *np, const char *
dev->node = np;
dev->dma_mask = 0xffffffffUL;
dev->dev.dma_mask = &dev->dma_mask;
- dev->dev.parent = NULL;
+ dev->dev.parent = parent;
dev->dev.bus = &of_platform_bus_type;
dev->dev.release = of_release_dev;
@@ -259,6 +261,7 @@ struct of_device* of_platform_device_create(struct device_node *np, const char *
return dev;
}
+
EXPORT_SYMBOL(of_match_device);
EXPORT_SYMBOL(of_platform_bus_type);
EXPORT_SYMBOL(of_register_driver);
diff --git a/arch/ppc64/kernel/pSeries_iommu.c b/arch/ppc64/kernel/pSeries_iommu.c
index f0fd7fbd6531..d17f0108a032 100644
--- a/arch/ppc64/kernel/pSeries_iommu.c
+++ b/arch/ppc64/kernel/pSeries_iommu.c
@@ -265,8 +265,10 @@ static void iommu_table_setparms(struct pci_controller *phb,
tbl->it_offset = phb->dma_window_base_cur >> PAGE_SHIFT;
/* Test if we are going over 2GB of DMA space */
- if (phb->dma_window_base_cur + phb->dma_window_size > (1L << 31))
+ if (phb->dma_window_base_cur + phb->dma_window_size > 0x80000000ul) {
+ udbg_printf("PCI_DMA: Unexpected number of IOAs under this PHB.\n");
panic("PCI_DMA: Unexpected number of IOAs under this PHB.\n");
+ }
phb->dma_window_base_cur += phb->dma_window_size;
@@ -310,92 +312,85 @@ static void iommu_table_setparms_lpar(struct pci_controller *phb,
static void iommu_bus_setup_pSeries(struct pci_bus *bus)
{
- struct device_node *dn, *pdn;
- struct pci_dn *pci;
+ struct device_node *dn;
struct iommu_table *tbl;
+ struct device_node *isa_dn, *isa_dn_orig;
+ struct device_node *tmp;
+ struct pci_dn *pci;
+ int children;
DBG("iommu_bus_setup_pSeries, bus %p, bus->self %p\n", bus, bus->self);
- /* For each (root) bus, we carve up the available DMA space in 256MB
- * pieces. Since each piece is used by one (sub) bus/device, that would
- * give a maximum of 7 devices per PHB. In most cases, this is plenty.
- *
- * The exception is on Python PHBs (pre-POWER4). Here we don't have EADS
- * bridges below the PHB to allocate the sectioned tables to, so instead
- * we allocate a 1GB table at the PHB level.
+ dn = pci_bus_to_OF_node(bus);
+ pci = PCI_DN(dn);
+
+ if (bus->self) {
+ /* This is not a root bus, any setup will be done for the
+ * device-side of the bridge in iommu_dev_setup_pSeries().
+ */
+ return;
+ }
+
+ /* Check if the ISA bus on the system is under
+ * this PHB.
*/
+ isa_dn = isa_dn_orig = of_find_node_by_type(NULL, "isa");
- dn = pci_bus_to_OF_node(bus);
- pci = dn->data;
-
- if (!bus->self) {
- /* Root bus */
- if (is_python(dn)) {
- unsigned int *iohole;
-
- DBG("Python root bus %s\n", bus->name);
-
- iohole = (unsigned int *)get_property(dn, "io-hole", 0);
-
- if (iohole) {
- /* On first bus we need to leave room for the
- * ISA address space. Just skip the first 256MB
- * alltogether. This leaves 768MB for the window.
- */
- DBG("PHB has io-hole, reserving 256MB\n");
- pci->phb->dma_window_size = 3 << 28;
- pci->phb->dma_window_base_cur = 1 << 28;
- } else {
- /* 1GB window by default */
- pci->phb->dma_window_size = 1 << 30;
- pci->phb->dma_window_base_cur = 0;
- }
-
- tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
-
- iommu_table_setparms(pci->phb, dn, tbl);
- pci->iommu_table = iommu_init_table(tbl);
- } else {
- /* Do a 128MB table at root. This is used for the IDE
- * controller on some SMP-mode POWER4 machines. It
- * doesn't hurt to allocate it on other machines
- * -- it'll just be unused since new tables are
- * allocated on the EADS level.
- *
- * Allocate at offset 128MB to avoid having to deal
- * with ISA holes; 128MB table for IDE is plenty.
- */
- pci->phb->dma_window_size = 1 << 27;
- pci->phb->dma_window_base_cur = 1 << 27;
-
- tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
-
- iommu_table_setparms(pci->phb, dn, tbl);
- pci->iommu_table = iommu_init_table(tbl);
-
- /* All child buses have 256MB tables */
- pci->phb->dma_window_size = 1 << 28;
- }
- } else {
- pdn = pci_bus_to_OF_node(bus->parent);
+ while (isa_dn && isa_dn != dn)
+ isa_dn = isa_dn->parent;
+
+ if (isa_dn_orig)
+ of_node_put(isa_dn_orig);
- if (!bus->parent->self && !is_python(pdn)) {
- struct iommu_table *tbl;
- /* First child and not python means this is the EADS
- * level. Allocate new table for this slot with 256MB
- * window.
- */
+ /* Count number of direct PCI children of the PHB.
+ * All PCI device nodes have class-code property, so it's
+ * an easy way to find them.
+ */
+ for (children = 0, tmp = dn->child; tmp; tmp = tmp->sibling)
+ if (get_property(tmp, "class-code", NULL))
+ children++;
- tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
+ DBG("Children: %d\n", children);
- iommu_table_setparms(pci->phb, dn, tbl);
+ /* Calculate amount of DMA window per slot. Each window must be
+ * a power of two (due to pci_alloc_consistent requirements).
+ *
+ * Keep 256MB aside for PHBs with ISA.
+ */
- pci->iommu_table = iommu_init_table(tbl);
- } else {
- /* Lower than first child or under python, use parent table */
- pci->iommu_table = PCI_DN(pdn)->iommu_table;
- }
+ if (!isa_dn) {
+ /* No ISA/IDE - just set window size and return */
+ pci->phb->dma_window_size = 0x80000000ul; /* To be divided */
+
+ while (pci->phb->dma_window_size * children > 0x80000000ul)
+ pci->phb->dma_window_size >>= 1;
+ DBG("No ISA/IDE, window size is 0x%lx\n",
+ pci->phb->dma_window_size);
+ pci->phb->dma_window_base_cur = 0;
+
+ return;
}
+
+ /* If we have ISA, then we probably have an IDE
+ * controller too. Allocate a 128MB table but
+ * skip the first 128MB to avoid stepping on ISA
+ * space.
+ */
+ pci->phb->dma_window_size = 0x8000000ul;
+ pci->phb->dma_window_base_cur = 0x8000000ul;
+
+ tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
+
+ iommu_table_setparms(pci->phb, dn, tbl);
+ pci->iommu_table = iommu_init_table(tbl);
+
+ /* Divide the rest (1.75GB) among the children */
+ pci->phb->dma_window_size = 0x80000000ul;
+ while (pci->phb->dma_window_size * children > 0x70000000ul)
+ pci->phb->dma_window_size >>= 1;
+
+ DBG("ISA/IDE, window size is 0x%lx\n", pci->phb->dma_window_size);
+
}
@@ -446,21 +441,36 @@ static void iommu_bus_setup_pSeriesLP(struct pci_bus *bus)
static void iommu_dev_setup_pSeries(struct pci_dev *dev)
{
struct device_node *dn, *mydn;
+ struct iommu_table *tbl;
+
+ DBG("iommu_dev_setup_pSeries, dev %p (%s)\n", dev, pci_name(dev));
- DBG("iommu_dev_setup_pSeries, dev %p (%s)\n", dev, dev->pretty_name);
- /* Now copy the iommu_table ptr from the bus device down to the
- * pci device_node. This means get_iommu_table() won't need to search
- * up the device tree to find it.
- */
mydn = dn = pci_device_to_OF_node(dev);
+ /* If we're the direct child of a root bus, then we need to allocate
+ * an iommu table ourselves. The bus setup code should have setup
+ * the window sizes already.
+ */
+ if (!dev->bus->self) {
+ DBG(" --> first child, no bridge. Allocating iommu table.\n");
+ tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
+ iommu_table_setparms(PCI_DN(dn)->phb, dn, tbl);
+ PCI_DN(mydn)->iommu_table = iommu_init_table(tbl);
+
+ return;
+ }
+
+ /* If this device is further down the bus tree, search upwards until
+ * an already allocated iommu table is found and use that.
+ */
+
while (dn && dn->data && PCI_DN(dn)->iommu_table == NULL)
dn = dn->parent;
if (dn && dn->data) {
PCI_DN(mydn)->iommu_table = PCI_DN(dn)->iommu_table;
} else {
- DBG("iommu_dev_setup_pSeries, dev %p (%s) has no iommu table\n", dev, dev->pretty_name);
+ DBG("iommu_dev_setup_pSeries, dev %p (%s) has no iommu table\n", dev, pci_name(dev));
}
}
@@ -494,7 +504,7 @@ static void iommu_dev_setup_pSeriesLP(struct pci_dev *dev)
int *dma_window = NULL;
struct pci_dn *pci;
- DBG("iommu_dev_setup_pSeriesLP, dev %p (%s)\n", dev, dev->pretty_name);
+ DBG("iommu_dev_setup_pSeriesLP, dev %p (%s)\n", dev, pci_name(dev));
/* dev setup for LPAR is a little tricky, since the device tree might
* contain the dma-window properties per-device and not neccesarily
@@ -516,9 +526,8 @@ static void iommu_dev_setup_pSeriesLP(struct pci_dev *dev)
* slots on POWER4 machines.
*/
if (dma_window == NULL || pdn->parent == NULL) {
- /* Fall back to regular (non-LPAR) dev setup */
- DBG("No dma window for device, falling back to regular setup\n");
- iommu_dev_setup_pSeries(dev);
+ DBG("No dma window for device, linking to parent\n");
+ PCI_DN(dn)->iommu_table = PCI_DN(pdn)->iommu_table;
return;
} else {
DBG("Found DMA window, allocating table\n");
diff --git a/arch/ppc64/kernel/pSeries_pci.c b/arch/ppc64/kernel/pSeries_pci.c
index 1f5f141fb7a1..928f8febdb3b 100644
--- a/arch/ppc64/kernel/pSeries_pci.c
+++ b/arch/ppc64/kernel/pSeries_pci.c
@@ -32,7 +32,7 @@
#include "pci.h"
-static int __initdata s7a_workaround = -1;
+static int __devinitdata s7a_workaround = -1;
#if 0
void pcibios_name_device(struct pci_dev *dev)
@@ -60,7 +60,7 @@ void pcibios_name_device(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
#endif
-static void __init check_s7a(void)
+static void __devinit check_s7a(void)
{
struct device_node *root;
char *model;
diff --git a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c
index 861138ad092c..ff4be1da69d5 100644
--- a/arch/ppc64/kernel/pci.c
+++ b/arch/ppc64/kernel/pci.c
@@ -246,11 +246,14 @@ static unsigned int pci_parse_of_flags(u32 addr0)
unsigned int flags = 0;
if (addr0 & 0x02000000) {
- flags |= IORESOURCE_MEM;
+ flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
+ flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
+ flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
if (addr0 & 0x40000000)
- flags |= IORESOURCE_PREFETCH;
+ flags |= IORESOURCE_PREFETCH
+ | PCI_BASE_ADDRESS_MEM_PREFETCH;
} else if (addr0 & 0x01000000)
- flags |= IORESOURCE_IO;
+ flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
return flags;
}
diff --git a/arch/ppc64/kernel/pci_direct_iommu.c b/arch/ppc64/kernel/pci_direct_iommu.c
index b8f7f58824f4..54055c81017a 100644
--- a/arch/ppc64/kernel/pci_direct_iommu.c
+++ b/arch/ppc64/kernel/pci_direct_iommu.c
@@ -31,7 +31,7 @@
#include "pci.h"
static void *pci_direct_alloc_coherent(struct device *hwdev, size_t size,
- dma_addr_t *dma_handle, unsigned int __nocast flag)
+ dma_addr_t *dma_handle, gfp_t flag)
{
void *ret;
diff --git a/arch/ppc64/kernel/pci_iommu.c b/arch/ppc64/kernel/pci_iommu.c
index 14647e09c9cd..d9e33b7d4203 100644
--- a/arch/ppc64/kernel/pci_iommu.c
+++ b/arch/ppc64/kernel/pci_iommu.c
@@ -76,7 +76,7 @@ static inline struct iommu_table *devnode_table(struct device *dev)
* to the dma address (mapping) of the first page.
*/
static void *pci_iommu_alloc_coherent(struct device *hwdev, size_t size,
- dma_addr_t *dma_handle, unsigned int __nocast flag)
+ dma_addr_t *dma_handle, gfp_t flag)
{
return iommu_alloc_coherent(devnode_table(hwdev), size, dma_handle,
flag);
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
index 325426c7bed0..fa8121d53b89 100644
--- a/arch/ppc64/kernel/pmac_setup.c
+++ b/arch/ppc64/kernel/pmac_setup.c
@@ -115,7 +115,7 @@ static void __pmac pmac_show_cpuinfo(struct seq_file *m)
/* find motherboard type */
seq_printf(m, "machine\t\t: ");
- np = find_devices("device-tree");
+ np = of_find_node_by_path("/");
if (np != NULL) {
pp = (char *) get_property(np, "model", NULL);
if (pp != NULL)
@@ -133,6 +133,7 @@ static void __pmac pmac_show_cpuinfo(struct seq_file *m)
}
seq_printf(m, "\n");
}
+ of_node_put(np);
} else
seq_printf(m, "PowerMac\n");
@@ -434,15 +435,23 @@ static int pmac_check_legacy_ioport(unsigned int baseport)
static int __init pmac_declare_of_platform_devices(void)
{
- struct device_node *np;
+ struct device_node *np, *npp;
- np = find_devices("u3");
- if (np) {
- for (np = np->child; np != NULL; np = np->sibling)
+ npp = of_find_node_by_name(NULL, "u3");
+ if (npp) {
+ for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
if (strncmp(np->name, "i2c", 3) == 0) {
- of_platform_device_create(np, "u3-i2c");
+ of_platform_device_create(np, "u3-i2c", NULL);
+ of_node_put(np);
break;
}
+ }
+ of_node_put(npp);
+ }
+ npp = of_find_node_by_type(NULL, "smu");
+ if (npp) {
+ of_platform_device_create(npp, "smu", NULL);
+ of_node_put(npp);
}
return 0;
diff --git a/arch/ppc64/kernel/pmac_time.c b/arch/ppc64/kernel/pmac_time.c
index 3059edb09cc8..41bbb8c59697 100644
--- a/arch/ppc64/kernel/pmac_time.c
+++ b/arch/ppc64/kernel/pmac_time.c
@@ -84,7 +84,7 @@ void __pmac pmac_get_rtc_time(struct rtc_time *tm)
#ifdef CONFIG_PMAC_SMU
case SYS_CTRLER_SMU:
- smu_get_rtc_time(tm);
+ smu_get_rtc_time(tm, 1);
break;
#endif /* CONFIG_PMAC_SMU */
default:
@@ -128,7 +128,7 @@ int __pmac pmac_set_rtc_time(struct rtc_time *tm)
#ifdef CONFIG_PMAC_SMU
case SYS_CTRLER_SMU:
- return smu_set_rtc_time(tm);
+ return smu_set_rtc_time(tm, 1);
#endif /* CONFIG_PMAC_SMU */
default:
return -ENODEV;
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index 9979919cdf92..f252670874a4 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -1711,6 +1711,7 @@ static void __init flatten_device_tree(void)
unsigned long offset = reloc_offset();
unsigned long mem_start, mem_end, room;
struct boot_param_header *hdr;
+ struct prom_t *_prom = PTRRELOC(&prom);
char *namep;
u64 *rsvmap;
@@ -1765,6 +1766,7 @@ static void __init flatten_device_tree(void)
RELOC(dt_struct_end) = PAGE_ALIGN(mem_start);
/* Finish header */
+ hdr->boot_cpuid_phys = _prom->cpu;
hdr->magic = OF_DT_HEADER;
hdr->totalsize = RELOC(dt_struct_end) - RELOC(dt_header_start);
hdr->off_dt_struct = RELOC(dt_struct_start) - RELOC(dt_header_start);
@@ -1854,7 +1856,6 @@ static void __init prom_find_boot_cpu(void)
cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu);
- prom_setprop(cpu_pkg, "linux,boot-cpu", NULL, 0);
prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval));
_prom->cpu = getprop_rval;
diff --git a/arch/ppc64/kernel/ptrace.c b/arch/ppc64/kernel/ptrace.c
index 85ed3188a91d..b1c044ca5756 100644
--- a/arch/ppc64/kernel/ptrace.c
+++ b/arch/ppc64/kernel/ptrace.c
@@ -219,6 +219,7 @@ int sys_ptrace(long request, long pid, long addr, long data)
case PTRACE_SET_DEBUGREG:
ret = ptrace_set_debugreg(child, addr, data);
+ break;
case PTRACE_DETACH:
ret = ptrace_detach(child, data);
diff --git a/arch/ppc64/kernel/vdso32/gettimeofday.S b/arch/ppc64/kernel/vdso32/gettimeofday.S
index 07f1c1c650c8..e243c1d24af7 100644
--- a/arch/ppc64/kernel/vdso32/gettimeofday.S
+++ b/arch/ppc64/kernel/vdso32/gettimeofday.S
@@ -109,7 +109,7 @@ __do_get_xsec:
lwz r6,(CFG_TB_TO_XS+4)(r9)
mulhwu r4,r7,r5
mulhwu r6,r7,r6
- mullw r6,r7,r5
+ mullw r0,r7,r5
addc r6,r6,r0
/* At this point, we have the scaled xsec value in r4 + XER:CA
diff --git a/arch/ppc64/kernel/vio.c b/arch/ppc64/kernel/vio.c
index c90e1dd875ce..0e555b7a6587 100644
--- a/arch/ppc64/kernel/vio.c
+++ b/arch/ppc64/kernel/vio.c
@@ -218,7 +218,7 @@ static void vio_unmap_sg(struct device *dev, struct scatterlist *sglist,
}
static void *vio_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, unsigned int __nocast flag)
+ dma_addr_t *dma_handle, gfp_t flag)
{
return iommu_alloc_coherent(to_vio_dev(dev)->iommu_table, size,
dma_handle, flag);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 19:21:07 +0100