diff options
Diffstat (limited to 'arch')
138 files changed, 7533 insertions, 2016 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f504c801792f..5021db2217ed 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -540,16 +540,15 @@ config ARCH_OMAP help Support for TI's OMAP platform (OMAP1 and OMAP2). -config ARCH_MSM7X00A - bool "Qualcomm MSM7X00A" +config ARCH_MSM + bool "Qualcomm MSM" select GENERIC_TIME select GENERIC_CLOCKEVENTS help - Support for Qualcomm MSM7X00A based systems. This runs on the ARM11 - apps processor of the MSM7X00A and depends on a shared memory + Support for Qualcomm MSM7K based systems. This runs on the ARM11 + apps processor of the MSM7K and depends on a shared memory interface to the ARM9 modem processor which runs the baseband stack and controls some vital subsystems (clock and power control, etc). - <http://www.cdmatech.com/products/msm7200_chipset_solution.jsp> endchoice diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 7d5121260fda..bd6e28115ebb 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -141,7 +141,7 @@ endif machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_ORION5X) := orion5x plat-$(CONFIG_PLAT_ORION) := orion - machine-$(CONFIG_ARCH_MSM7X00A) := msm + machine-$(CONFIG_ARCH_MSM) := msm machine-$(CONFIG_ARCH_LOKI) := loki machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig index 9b8748a8d9dd..f3af0b593eb0 100644 --- a/arch/arm/configs/corgi_defconfig +++ b/arch/arm/configs/corgi_defconfig @@ -1,71 +1,111 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.15-rc2 -# Mon Nov 28 10:30:09 2005 +# Linux kernel version: 2.6.27 +# Mon Oct 20 10:12:23 2008 # CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_MMU=y -CONFIG_UID16=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_SYSCTL=y +# CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set -CONFIG_HOTPLUG=y -CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set -CONFIG_INITRAMFS_SOURCE="" +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y - -# -# Block layer -# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers @@ -79,50 +119,97 @@ CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y # # System Type # +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP3XX is not set -# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set # CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set CONFIG_ARCH_PXA=y # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_MSM7X00A is not set # -# Intel PXA2xx Implementations +# Intel PXA2xx/PXA3xx Implementations # +# CONFIG_ARCH_GUMSTIX is not set # CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set # CONFIG_MACH_MAINSTONE is not set +# CONFIG_MACH_MP900C is not set # CONFIG_ARCH_PXA_IDP is not set CONFIG_PXA_SHARPSL=y -CONFIG_PXA_SHARPSL_25x=y -# CONFIG_PXA_SHARPSL_27x is not set CONFIG_MACH_POODLE=y CONFIG_MACH_CORGI=y CONFIG_MACH_SHEPHERD=y CONFIG_MACH_HUSKY=y +# CONFIG_MACH_AKITA is not set +# CONFIG_MACH_SPITZ is not set +# CONFIG_MACH_BORZOI is not set CONFIG_MACH_TOSA=y +# CONFIG_ARCH_VIPER is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_TRIZEPS_PXA is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_CM_X300 is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_MIOA701 is not set +# CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set CONFIG_PXA25x=y CONFIG_PXA_SHARP_C7xx=y CONFIG_PXA_SSP=y +# CONFIG_PXA_PWM is not set +# CONFIG_TOSA_BT is not set +CONFIG_PXA_HAVE_BOARD_IRQS=y + +# +# Boot options +# + +# +# Power management +# # # Processor Type @@ -131,25 +218,30 @@ CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y # # Processor Features # CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +# CONFIG_IWMMXT is not set CONFIG_XSCALE_PMU=y +CONFIG_SHARP_LOCOMO=y CONFIG_SHARP_PARAM=y +CONFIG_SHARPSL_PM=y CONFIG_SHARP_SCOOP=y # # Bus support # -CONFIG_ISA_DMA_API=y - -# -# PCCARD (PCMCIA/CardBus) support -# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_PCCARD=y # CONFIG_PCMCIA_DEBUG is not set CONFIG_PCMCIA=y @@ -164,16 +256,32 @@ CONFIG_PCMCIA_PXA2XX=y # # Kernel Features # +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PREEMPT=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y CONFIG_ALIGNMENT_TRAP=y # @@ -183,6 +291,13 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 debug" # CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set # # Floating point emulation @@ -199,6 +314,7 @@ CONFIG_FPE_NWFPE=y # Userspace binary formats # CONFIG_BINFMT_ELF=y +CONFIG_HAVE_AOUT=y CONFIG_BINFMT_AOUT=m CONFIG_BINFMT_MISC=m # CONFIG_ARTHUR is not set @@ -207,12 +323,12 @@ CONFIG_BINFMT_MISC=m # Power management options # CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -CONFIG_APM=y - -# -# Networking -# +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_NET=y # @@ -223,6 +339,10 @@ CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -236,140 +356,131 @@ CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=m # CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set CONFIG_INET6_AH=m CONFIG_INET6_ESP=m CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y # # Core Netfilter Configuration # -# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_VS is not set # # IP: Netfilter Configuration # -CONFIG_IP_NF_CONNTRACK=m -# CONFIG_IP_NF_CT_ACCT is not set -# CONFIG_IP_NF_CONNTRACK_MARK is not set -# CONFIG_IP_NF_CONNTRACK_EVENTS is not set -CONFIG_IP_NF_CT_PROTO_SCTP=m -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -# CONFIG_IP_NF_NETBIOS_NS is not set -CONFIG_IP_NF_TFTP=m -CONFIG_IP_NF_AMANDA=m -# CONFIG_IP_NF_PPTP is not set +# CONFIG_NF_DEFRAG_IPV4 is not set CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_LIMIT=m -CONFIG_IP_NF_MATCH_IPRANGE=m -CONFIG_IP_NF_MATCH_MAC=m -CONFIG_IP_NF_MATCH_PKTTYPE=m -CONFIG_IP_NF_MATCH_MARK=m -CONFIG_IP_NF_MATCH_MULTIPORT=m -CONFIG_IP_NF_MATCH_TOS=m -CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +# CONFIG_IP_NF_MATCH_AH is not set CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_DSCP=m -CONFIG_IP_NF_MATCH_AH_ESP=m -CONFIG_IP_NF_MATCH_LENGTH=m CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_MATCH_TCPMSS=m -CONFIG_IP_NF_MATCH_HELPER=m -CONFIG_IP_NF_MATCH_STATE=m -CONFIG_IP_NF_MATCH_CONNTRACK=m -CONFIG_IP_NF_MATCH_OWNER=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_REALM=m -CONFIG_IP_NF_MATCH_SCTP=m -# CONFIG_IP_NF_MATCH_DCCP is not set -CONFIG_IP_NF_MATCH_COMMENT=m -CONFIG_IP_NF_MATCH_HASHLIMIT=m -# CONFIG_IP_NF_MATCH_STRING is not set CONFIG_IP_NF_FILTER=m # CONFIG_IP_NF_TARGET_REJECT is not set CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_IP_NF_TARGET_TCPMSS=m -# CONFIG_IP_NF_TARGET_NFQUEUE is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_NAT_NEEDED=y -# CONFIG_IP_NF_TARGET_MASQUERADE is not set -# CONFIG_IP_NF_TARGET_REDIRECT is not set -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_SAME is not set -# CONFIG_IP_NF_NAT_SNMP_BASIC is not set -CONFIG_IP_NF_NAT_IRC=m -CONFIG_IP_NF_NAT_FTP=m -CONFIG_IP_NF_NAT_TFTP=m -CONFIG_IP_NF_NAT_AMANDA=m CONFIG_IP_NF_MANGLE=m -# CONFIG_IP_NF_TARGET_TOS is not set # CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_DSCP is not set -# CONFIG_IP_NF_TARGET_MARK is not set -# CONFIG_IP_NF_TARGET_CLASSIFY is not set # CONFIG_IP_NF_TARGET_TTL is not set CONFIG_IP_NF_RAW=m -# CONFIG_IP_NF_TARGET_NOTRACK is not set CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # -# IPv6: Netfilter Configuration (EXPERIMENTAL) +# IPv6: Netfilter Configuration # CONFIG_IP6_NF_QUEUE=m CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_LIMIT=m -CONFIG_IP6_NF_MATCH_MAC=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_MATCH_OPTS=m +# CONFIG_IP6_NF_MATCH_AH is not set +CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_MULTIPORT=m -CONFIG_IP6_NF_MATCH_OWNER=m -CONFIG_IP6_NF_MATCH_MARK=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_AHESP=m -CONFIG_IP6_NF_MATCH_LENGTH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_FILTER=m +# CONFIG_IP6_NF_MATCH_MH is not set +CONFIG_IP6_NF_MATCH_RT=m # CONFIG_IP6_NF_TARGET_LOG is not set +CONFIG_IP6_NF_FILTER=m # CONFIG_IP6_NF_TARGET_REJECT is not set -# CONFIG_IP6_NF_TARGET_NFQUEUE is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_TARGET_MARK is not set # CONFIG_IP6_NF_TARGET_HL is not set CONFIG_IP6_NF_RAW=m - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set @@ -377,21 +488,16 @@ CONFIG_IP6_NF_RAW=m # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set -CONFIG_NET_CLS_ROUTE=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set CONFIG_IRDA=m # @@ -421,27 +527,17 @@ CONFIG_IRCOMM=m # # Dongle support # - -# -# Old SIR device drivers -# -# CONFIG_IRPORT_SIR is not set - -# -# Old Serial dongle support -# +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set # # FIR device drivers # # CONFIG_USB_IRDA is not set # CONFIG_SIGMATEL_FIR is not set -# CONFIG_NSC_FIR is not set -# CONFIG_WINBOND_FIR is not set -# CONFIG_SMC_IRCC_FIR is not set -# CONFIG_ALI_FIR is not set -# CONFIG_VIA_FIR is not set CONFIG_PXA_FICP=m +# CONFIG_MCS_FIR is not set CONFIG_BT=m CONFIG_BT_L2CAP=m CONFIG_BT_SCO=m @@ -457,9 +553,12 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HCIUSB=m # CONFIG_BT_HCIUSB_SCO is not set +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -468,11 +567,20 @@ CONFIG_BT_HCIBT3C=m CONFIG_BT_HCIBLUECARD=m CONFIG_BT_HCIBTUART=m CONFIG_BT_HCIVHCI=m +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_OLD_REGULATORY is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set CONFIG_IEEE80211=m # CONFIG_IEEE80211_DEBUG is not set CONFIG_IEEE80211_CRYPT_WEP=m # CONFIG_IEEE80211_CRYPT_CCMP is not set # CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # # Device Drivers @@ -481,19 +589,16 @@ CONFIG_IEEE80211_CRYPT_WEP=m # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set - -# -# Connector - unified userspace <-> kernelspace linker -# +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set @@ -501,16 +606,20 @@ CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -535,16 +644,18 @@ CONFIG_MTD_ROM=y # Mapping drivers for chip access # CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set CONFIG_MTD_SHARP_SL=y # CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set # CONFIG_MTD_BLOCK2MTD is not set # @@ -553,78 +664,66 @@ CONFIG_MTD_SHARP_SL=y # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# CONFIG_MTD_NAND=y CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_H1900 is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set CONFIG_MTD_NAND_SHARPSL=y # CONFIG_MTD_NAND_NANDSIM is not set - -# -# OneNAND Flash Device Drivers -# +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set # CONFIG_MTD_ONENAND is not set # -# Parallel port support +# UBI - Unsorted block images # +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# +CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_UB is not set # CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y # -# Please see Documentation/ide.txt for help/info on IDE drives +# Please see Documentation/ide/ide.txt for help/info on IDE drives # # CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set CONFIG_BLK_DEV_IDECS=y # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y # # IDE chipset support/bugfixes # -CONFIG_IDE_GENERIC=y -# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_PLATFORM is not set # CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # @@ -644,121 +743,76 @@ CONFIG_CHR_DEV_SG=m CONFIG_SCSI_MULTI_LUN=y # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m # -# SCSI Transport Attributes +# SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_SATA is not set # CONFIG_SCSI_DEBUG is not set - -# -# PCMCIA SCSI adapter support -# -# CONFIG_PCMCIA_AHA152X is not set -# CONFIG_PCMCIA_FDOMAIN is not set -# CONFIG_PCMCIA_NINJA_SCSI is not set -# CONFIG_PCMCIA_QLOGIC is not set -# CONFIG_PCMCIA_SYM53C500 is not set - -# -# Multi-device support (RAID and LVM) -# +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set # CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# PHY device support -# +# CONFIG_VETH is not set # CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# CONFIG_NET_ETHERNET=y CONFIG_MII=m +# CONFIG_AX88796 is not set # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y # -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -CONFIG_NET_RADIO=y - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set -# CONFIG_PCMCIA_WAVELAN is not set -# CONFIG_PCMCIA_NETWAVE is not set - -# -# Wireless 802.11 Frequency Hopping cards support +# Wireless LAN # -# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # -# Wireless 802.11b ISA/PCI cards support -# -CONFIG_HERMES=m -# CONFIG_ATMEL is not set - -# -# Wireless 802.11b Pcmcia/Cardbus cards support -# -CONFIG_PCMCIA_HERMES=m -CONFIG_PCMCIA_SPECTRUM=m -# CONFIG_AIRO_CS is not set -# CONFIG_PCMCIA_WL3501 is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_CS=m -CONFIG_NET_WIRELESS=y - -# -# PCMCIA network device support +# USB Network Adapters # +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +CONFIG_USB_NET_ZAURUS=m CONFIG_NET_PCMCIA=y # CONFIG_PCMCIA_3C589 is not set # CONFIG_PCMCIA_3C574 is not set @@ -768,10 +822,6 @@ CONFIG_PCMCIA_PCNET=m # CONFIG_PCMCIA_SMC91C92 is not set # CONFIG_PCMCIA_XIRC2PS is not set # CONFIG_PCMCIA_AXNET is not set - -# -# Wan interfaces -# # CONFIG_WAN is not set CONFIG_PPP=m # CONFIG_PPP_MULTILINK is not set @@ -782,30 +832,29 @@ CONFIG_PPP_ASYNC=m CONFIG_PPP_BSDCOMP=m # CONFIG_PPP_MPPE is not set # CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set +CONFIG_SLHC=m # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# # CONFIG_ISDN is not set # # Input device support # CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set # # Input Device Drivers @@ -814,19 +863,39 @@ CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ATKBD is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_LOCOMO is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set CONFIG_KEYBOARD_CORGI=y CONFIG_KEYBOARD_SPITZ=y +CONFIG_KEYBOARD_TOSA=y +# CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES is not set +# CONFIG_KEYBOARD_GPIO is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_CORGI=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_CORGI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set CONFIG_INPUT_UINPUT=m # @@ -839,8 +908,11 @@ CONFIG_INPUT_UINPUT=m # Character devices # CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -849,6 +921,7 @@ CONFIG_HW_CONSOLE=y CONFIG_SERIAL_8250=m CONFIG_SERIAL_8250_CS=m CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 # CONFIG_SERIAL_8250_EXTENDED is not set # @@ -860,97 +933,130 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=m # CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_DTLK is not set # CONFIG_R3964 is not set # -# Ftape, the floppy tape device driver -# - -# # PCMCIA character devices # # CONFIG_SYNCLINK_CS is not set # CONFIG_CARDMAN_4000 is not set # CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set # CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# # CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y # CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_HELPER_AUTO=y # -# I2C Algorithms +# I2C Hardware Bus support # -CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set # -# I2C Hardware Bus support +# I2C system bus drivers (mostly embedded / system-on-chip) # +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set CONFIG_I2C_PXA=y # CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# # CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_STUB is not set -# CONFIG_I2C_PCA_ISA is not set # # Miscellaneous I2C Chip support # -# CONFIG_SENSORS_DS1337 is not set -# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set # CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_TPS65010 is not set # CONFIG_SENSORS_MAX6875 is not set -# CONFIG_RTC_X1205_I2C is not set +# CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y # -# Hardware Monitoring support +# SPI Master Controller Drivers # +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set @@ -960,70 +1066,193 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +CONFIG_SENSORS_MAX1111=y # CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set # -# Misc devices +# Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# Multimedia Capabilities Port drivers +# Multifunction device drivers # +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set # # Multimedia devices # -CONFIG_VIDEO_DEV=m - -# -# Video For Linux -# # -# Video Adapters +# Multimedia core support # +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set # CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set # CONFIG_VIDEO_SAA5246A is not set # CONFIG_VIDEO_SAA5249 is not set -# CONFIG_TUNER_3036 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set # CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_USBVISION is not set +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set # CONFIG_VIDEO_OVCAMCHIP is not set -# CONFIG_VIDEO_AUDIO_DECODER is not set -# CONFIG_VIDEO_DECODER is not set - -# -# Radio Adapters -# -# CONFIG_RADIO_MAESTRO is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +CONFIG_USB_DSBR=m +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_DAB is not set # # Graphics support # +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_PXA is not set +# CONFIG_FB_MBX is not set CONFIG_FB_W100=y # CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_CORGI=y +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_LOCOMO=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set # # Console display driver support @@ -1031,6 +1260,7 @@ CONFIG_FB_W100=y # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -1043,93 +1273,95 @@ CONFIG_FONT_8x16=y # CONFIG_FONT_SUN8x16 is not set # CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_10x18 is not set - -# -# Logo configuration -# # CONFIG_LOGO is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_DEVICE=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CORGI=y - -# -# Sound -# CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +# CONFIG_SND is not set +CONFIG_SOUND_PRIME=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # -# Advanced Linux Sound Architecture +# USB Input Devices # -# CONFIG_SND is not set +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set # -# Open Sound System +# USB HID Boot Protocol drivers # -CONFIG_SOUND_PRIME=y -# CONFIG_SOUND_MSNDCLAS is not set -# CONFIG_SOUND_MSNDPIN is not set -CONFIG_SOUND_OSS=y -# CONFIG_SOUND_TRACEINIT is not set -# CONFIG_SOUND_DMAP is not set -# CONFIG_SOUND_AD1816 is not set -# CONFIG_SOUND_SGALAXY is not set -# CONFIG_SOUND_ADLIB is not set -# CONFIG_SOUND_ACI_MIXER is not set -# CONFIG_SOUND_CS4232 is not set -# CONFIG_SOUND_SSCAPE is not set -# CONFIG_SOUND_GUS is not set -# CONFIG_SOUND_VMIDI is not set -# CONFIG_SOUND_TRIX is not set -# CONFIG_SOUND_MSS is not set -# CONFIG_SOUND_MPU401 is not set -# CONFIG_SOUND_NM256 is not set -# CONFIG_SOUND_MAD16 is not set -# CONFIG_SOUND_PAS is not set -# CONFIG_SOUND_PSS is not set -# CONFIG_SOUND_SB is not set -# CONFIG_SOUND_AWE32_SYNTH is not set -# CONFIG_SOUND_WAVEFRONT is not set -# CONFIG_SOUND_MAUI is not set -# CONFIG_SOUND_YM3812 is not set -# CONFIG_SOUND_OPL3SA1 is not set -# CONFIG_SOUND_OPL3SA2 is not set -# CONFIG_SOUND_UART6850 is not set -# CONFIG_SOUND_AEDSP16 is not set -# CONFIG_SOUND_TVMIXER is not set -# CONFIG_SOUND_AD1980 is not set - -# -# USB support +CONFIG_USB_KBD=m +CONFIG_USB_MOUSE=m + # +# Special HID drivers +# +CONFIG_HID_COMPAT=y +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BRIGHT=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DELL=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GYRATION=m +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_THRUSTMASTER_FF=m +CONFIG_ZEROPLUS_FF=m +CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y # CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set CONFIG_USB=m # CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set +CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_SUSPEND is not set # CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_SL811_HCD=m CONFIG_USB_SL811_CS=m +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set # # USB Device Class drivers # -# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1148,33 +1380,11 @@ CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=m -CONFIG_USB_HIDINPUT=y -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set - -# -# USB HID Boot Protocol drivers -# -CONFIG_USB_KBD=m -CONFIG_USB_MOUSE=m -CONFIG_USB_AIPTEK=m -CONFIG_USB_WACOM=m -# CONFIG_USB_ACECAD is not set -CONFIG_USB_KBTAB=m -CONFIG_USB_POWERMATE=m -CONFIG_USB_MTOUCH=m -# CONFIG_USB_ITMTOUCH is not set -CONFIG_USB_EGALAX=m -# CONFIG_USB_YEALINK is not set -CONFIG_USB_XPAD=m -CONFIG_USB_ATI_REMOTE=m -# CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set # # USB Imaging devices @@ -1183,56 +1393,22 @@ CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m # -# USB Multimedia devices -# -CONFIG_USB_DABUSB=m -CONFIG_USB_VICAM=m -CONFIG_USB_DSBR=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_OV511=m -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -# CONFIG_USB_PWC is not set - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_GL620A is not set -CONFIG_USB_NET_NET1080=m -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_ZD1201 is not set -CONFIG_USB_MON=y - -# # USB port drivers # - -# -# USB Serial Converter support -# CONFIG_USB_SERIAL=m +CONFIG_USB_EZUSB=y CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_AIRPRIME is not set -# CONFIG_USB_SERIAL_ANYDATA is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set CONFIG_USB_SERIAL_BELKIN=m +# CONFIG_USB_SERIAL_CH341 is not set # CONFIG_USB_SERIAL_WHITEHEAT is not set CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m # CONFIG_USB_SERIAL_CP2101 is not set CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_FUNSOFT is not set CONFIG_USB_SERIAL_VISOR=m CONFIG_USB_SERIAL_IPAQ=m CONFIG_USB_SERIAL_IR=m @@ -1240,6 +1416,7 @@ CONFIG_USB_SERIAL_EDGEPORT=m CONFIG_USB_SERIAL_EDGEPORT_TI=m CONFIG_USB_SERIAL_GARMIN=m CONFIG_USB_SERIAL_IPW=m +# CONFIG_USB_SERIAL_IUU is not set CONFIG_USB_SERIAL_KEYSPAN_PDA=m CONFIG_USB_SERIAL_KEYSPAN=m # CONFIG_USB_SERIAL_KEYSPAN_MPR is not set @@ -1257,50 +1434,68 @@ CONFIG_USB_SERIAL_KEYSPAN=m CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set # CONFIG_USB_SERIAL_HP4X is not set CONFIG_USB_SERIAL_SAFE=m # CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set CONFIG_USB_SERIAL_TI=m CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m +# CONFIG_USB_SERIAL_OPTION is not set CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_EZUSB=y +# CONFIG_USB_SERIAL_DEBUG is not set # # USB Miscellaneous drivers # CONFIG_USB_EMI62=m CONFIG_USB_EMI26=m -CONFIG_USB_AUERSWALD=m +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set CONFIG_USB_RIO500=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m +# CONFIG_USB_BERRY_CHARGE is not set CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set CONFIG_USB_CYTHERM=m -CONFIG_USB_PHIDGETKIT=m -CONFIG_USB_PHIDGETSERVO=m +# CONFIG_USB_PHIDGET is not set CONFIG_USB_IDMOUSE=m +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set # CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_NET2280 is not set -CONFIG_USB_GADGET_PXA2XX=y -CONFIG_USB_PXA2XX=y -# CONFIG_USB_PXA2XX_SMALL is not set -# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set # CONFIG_USB_GADGET_LH7A40X is not set # CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_PXA25X=y +CONFIG_USB_PXA25X=y +# CONFIG_USB_PXA25X_SMALL is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set # CONFIG_USB_GADGET_DUALSPEED is not set CONFIG_USB_ZERO=m @@ -1310,15 +1505,42 @@ CONFIG_USB_GADGETFS=m CONFIG_USB_FILE_STORAGE=m # CONFIG_USB_FILE_STORAGE_TEST is not set CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set # -# MMC/SD Card support +# MMC/SD/SDIO Card Drivers # -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# CONFIG_MMC_PXA=y -# CONFIG_MMC_WBSD is not set +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set # # File systems @@ -1327,16 +1549,17 @@ CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set +# CONFIG_EXT4_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -1361,11 +1584,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # Pseudo filesystems # CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set +# CONFIG_CONFIGFS_FS is not set # # Miscellaneous filesystems @@ -1377,39 +1602,42 @@ CONFIG_RAMFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y CONFIG_JFFS2_RUBIN=y # CONFIG_JFFS2_CMODE_NONE is not set CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set CONFIG_CRAMFS=m # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=m CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set CONFIG_NFS_V4=y -# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m +# CONFIG_SUNRPC_REGISTER_V4 is not set CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_RPCSEC_GSS_SPKM3 is not set CONFIG_SMB_FS=m @@ -1419,7 +1647,6 @@ CONFIG_SMB_NLS_REMOTE="cp437" # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types @@ -1439,11 +1666,9 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# +# CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y @@ -1484,35 +1709,71 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set CONFIG_NLS_UTF8=y - -# -# Profiling support -# -CONFIG_PROFILING=y -CONFIG_OPROFILE=m +# CONFIG_DLM is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y -CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set # CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set # CONFIG_DEBUG_USER is not set CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set @@ -1521,46 +1782,113 @@ CONFIG_DEBUG_LL=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y # -# Cryptographic options +# Crypto core or helper # -CONFIG_CRYPTO=y -CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=m CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m # CONFIG_CRYPTO_TGR192 is not set -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +# CONFIG_CRYPTO_CAMELLIA is not set CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -CONFIG_CRYPTO_TEST=m +# CONFIG_CRYPTO_LZO is not set # -# Hardware crypto devices +# Random Number Generation # +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y # # Library routines # +CONFIG_BITREVERSE=y CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig index ae4c5e62086a..3b4ecf2a90dd 100644 --- a/arch/arm/configs/msm_defconfig +++ b/arch/arm/configs/msm_defconfig @@ -133,7 +133,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -CONFIG_ARCH_MSM7X00A=y +CONFIG_ARCH_MSM=y # # Boot options diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig index 7d59fb1f1cea..4df5b4db2aa0 100644 --- a/arch/arm/configs/spitz_defconfig +++ b/arch/arm/configs/spitz_defconfig @@ -1,71 +1,111 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.15-rc2 -# Mon Nov 28 10:26:52 2005 +# Linux kernel version: 2.6.27 +# Mon Oct 20 10:25:37 2008 # CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_MMU=y -CONFIG_UID16=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_SYSCTL=y +# CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set -CONFIG_HOTPLUG=y -CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set -CONFIG_INITRAMFS_SOURCE="" +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y - -# -# Block layer -# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers @@ -79,49 +119,95 @@ CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y # # System Type # +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP3XX is not set -# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set # CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set CONFIG_ARCH_PXA=y # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_MSM7X00A is not set # -# Intel PXA2xx Implementations +# Intel PXA2xx/PXA3xx Implementations # +# CONFIG_ARCH_GUMSTIX is not set # CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set # CONFIG_MACH_MAINSTONE is not set +# CONFIG_MACH_MP900C is not set # CONFIG_ARCH_PXA_IDP is not set CONFIG_PXA_SHARPSL=y -# CONFIG_PXA_SHARPSL_25x is not set -CONFIG_PXA_SHARPSL_27x=y +# CONFIG_MACH_POODLE is not set +# CONFIG_MACH_CORGI is not set +# CONFIG_MACH_SHEPHERD is not set +# CONFIG_MACH_HUSKY is not set CONFIG_MACH_AKITA=y CONFIG_MACH_SPITZ=y CONFIG_MACH_BORZOI=y +# CONFIG_MACH_TOSA is not set +# CONFIG_ARCH_VIPER is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_TRIZEPS_PXA is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_CM_X300 is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_MIOA701 is not set +# CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set CONFIG_PXA27x=y -CONFIG_IWMMXT=y CONFIG_PXA_SHARP_Cxx00=y CONFIG_PXA_SSP=y +# CONFIG_PXA_PWM is not set + +# +# Boot options +# + +# +# Power management +# # # Processor Type @@ -130,25 +216,29 @@ CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y # # Processor Features # CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y CONFIG_XSCALE_PMU=y CONFIG_SHARP_PARAM=y +CONFIG_SHARPSL_PM=y CONFIG_SHARP_SCOOP=y # # Bus support # -CONFIG_ISA_DMA_API=y - -# -# PCCARD (PCMCIA/CardBus) support -# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_PCCARD=y # CONFIG_PCMCIA_DEBUG is not set CONFIG_PCMCIA=y @@ -163,16 +253,32 @@ CONFIG_PCMCIA_PXA2XX=y # # Kernel Features # +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PREEMPT=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y CONFIG_ALIGNMENT_TRAP=y # @@ -182,6 +288,13 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 debug" # CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set # # Floating point emulation @@ -198,6 +311,7 @@ CONFIG_FPE_NWFPE=y # Userspace binary formats # CONFIG_BINFMT_ELF=y +CONFIG_HAVE_AOUT=y CONFIG_BINFMT_AOUT=m CONFIG_BINFMT_MISC=m # CONFIG_ARTHUR is not set @@ -206,12 +320,12 @@ CONFIG_BINFMT_MISC=m # Power management options # CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -CONFIG_APM=y - -# -# Networking -# +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_NET=y # @@ -222,6 +336,10 @@ CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -235,140 +353,131 @@ CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=m # CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set CONFIG_INET6_AH=m CONFIG_INET6_ESP=m CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y # # Core Netfilter Configuration # -# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_VS is not set # # IP: Netfilter Configuration # -CONFIG_IP_NF_CONNTRACK=m -# CONFIG_IP_NF_CT_ACCT is not set -# CONFIG_IP_NF_CONNTRACK_MARK is not set -# CONFIG_IP_NF_CONNTRACK_EVENTS is not set -CONFIG_IP_NF_CT_PROTO_SCTP=m -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -# CONFIG_IP_NF_NETBIOS_NS is not set -CONFIG_IP_NF_TFTP=m -CONFIG_IP_NF_AMANDA=m -# CONFIG_IP_NF_PPTP is not set +# CONFIG_NF_DEFRAG_IPV4 is not set CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_LIMIT=m -CONFIG_IP_NF_MATCH_IPRANGE=m -CONFIG_IP_NF_MATCH_MAC=m -CONFIG_IP_NF_MATCH_PKTTYPE=m -CONFIG_IP_NF_MATCH_MARK=m -CONFIG_IP_NF_MATCH_MULTIPORT=m -CONFIG_IP_NF_MATCH_TOS=m -CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +# CONFIG_IP_NF_MATCH_AH is not set CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_DSCP=m -CONFIG_IP_NF_MATCH_AH_ESP=m -CONFIG_IP_NF_MATCH_LENGTH=m CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_MATCH_TCPMSS=m -CONFIG_IP_NF_MATCH_HELPER=m -CONFIG_IP_NF_MATCH_STATE=m -CONFIG_IP_NF_MATCH_CONNTRACK=m -CONFIG_IP_NF_MATCH_OWNER=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_REALM=m -CONFIG_IP_NF_MATCH_SCTP=m -# CONFIG_IP_NF_MATCH_DCCP is not set -CONFIG_IP_NF_MATCH_COMMENT=m -CONFIG_IP_NF_MATCH_HASHLIMIT=m -# CONFIG_IP_NF_MATCH_STRING is not set CONFIG_IP_NF_FILTER=m # CONFIG_IP_NF_TARGET_REJECT is not set CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_IP_NF_TARGET_TCPMSS=m -# CONFIG_IP_NF_TARGET_NFQUEUE is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_NAT_NEEDED=y -# CONFIG_IP_NF_TARGET_MASQUERADE is not set -# CONFIG_IP_NF_TARGET_REDIRECT is not set -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_SAME is not set -# CONFIG_IP_NF_NAT_SNMP_BASIC is not set -CONFIG_IP_NF_NAT_IRC=m -CONFIG_IP_NF_NAT_FTP=m -CONFIG_IP_NF_NAT_TFTP=m -CONFIG_IP_NF_NAT_AMANDA=m CONFIG_IP_NF_MANGLE=m -# CONFIG_IP_NF_TARGET_TOS is not set # CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_DSCP is not set -# CONFIG_IP_NF_TARGET_MARK is not set -# CONFIG_IP_NF_TARGET_CLASSIFY is not set # CONFIG_IP_NF_TARGET_TTL is not set CONFIG_IP_NF_RAW=m -# CONFIG_IP_NF_TARGET_NOTRACK is not set CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # -# IPv6: Netfilter Configuration (EXPERIMENTAL) +# IPv6: Netfilter Configuration # CONFIG_IP6_NF_QUEUE=m CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_LIMIT=m -CONFIG_IP6_NF_MATCH_MAC=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_MATCH_OPTS=m +# CONFIG_IP6_NF_MATCH_AH is not set +CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_MULTIPORT=m -CONFIG_IP6_NF_MATCH_OWNER=m -CONFIG_IP6_NF_MATCH_MARK=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_AHESP=m -CONFIG_IP6_NF_MATCH_LENGTH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_FILTER=m +# CONFIG_IP6_NF_MATCH_MH is not set +CONFIG_IP6_NF_MATCH_RT=m # CONFIG_IP6_NF_TARGET_LOG is not set +CONFIG_IP6_NF_FILTER=m # CONFIG_IP6_NF_TARGET_REJECT is not set -# CONFIG_IP6_NF_TARGET_NFQUEUE is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_TARGET_MARK is not set # CONFIG_IP6_NF_TARGET_HL is not set CONFIG_IP6_NF_RAW=m - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set @@ -376,21 +485,16 @@ CONFIG_IP6_NF_RAW=m # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set -CONFIG_NET_CLS_ROUTE=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set CONFIG_IRDA=m # @@ -420,27 +524,17 @@ CONFIG_IRCOMM=m # # Dongle support # - -# -# Old SIR device drivers -# -# CONFIG_IRPORT_SIR is not set - -# -# Old Serial dongle support -# +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set # # FIR device drivers # # CONFIG_USB_IRDA is not set # CONFIG_SIGMATEL_FIR is not set -# CONFIG_NSC_FIR is not set -# CONFIG_WINBOND_FIR is not set -# CONFIG_SMC_IRCC_FIR is not set -# CONFIG_ALI_FIR is not set -# CONFIG_VIA_FIR is not set CONFIG_PXA_FICP=m +# CONFIG_MCS_FIR is not set CONFIG_BT=m CONFIG_BT_L2CAP=m CONFIG_BT_SCO=m @@ -456,9 +550,12 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HCIUSB=m # CONFIG_BT_HCIUSB_SCO is not set +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -467,11 +564,20 @@ CONFIG_BT_HCIBT3C=m CONFIG_BT_HCIBLUECARD=m CONFIG_BT_HCIBTUART=m CONFIG_BT_HCIVHCI=m +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_OLD_REGULATORY is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set CONFIG_IEEE80211=m # CONFIG_IEEE80211_DEBUG is not set CONFIG_IEEE80211_CRYPT_WEP=m # CONFIG_IEEE80211_CRYPT_CCMP is not set # CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # # Device Drivers @@ -480,19 +586,16 @@ CONFIG_IEEE80211_CRYPT_WEP=m # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set - -# -# Connector - unified userspace <-> kernelspace linker -# +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set @@ -500,16 +603,20 @@ CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -534,16 +641,18 @@ CONFIG_MTD_ROM=y # Mapping drivers for chip access # CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set CONFIG_MTD_SHARP_SL=y # CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set # CONFIG_MTD_BLOCK2MTD is not set # @@ -552,78 +661,66 @@ CONFIG_MTD_SHARP_SL=y # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# CONFIG_MTD_NAND=y CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_H1900 is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set CONFIG_MTD_NAND_SHARPSL=y # CONFIG_MTD_NAND_NANDSIM is not set - -# -# OneNAND Flash Device Drivers -# +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set # CONFIG_MTD_ONENAND is not set # -# Parallel port support +# UBI - Unsorted block images # +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# +CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_UB is not set # CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y # -# Please see Documentation/ide.txt for help/info on IDE drives +# Please see Documentation/ide/ide.txt for help/info on IDE drives # # CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set CONFIG_BLK_DEV_IDECS=y # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y # # IDE chipset support/bugfixes # -CONFIG_IDE_GENERIC=y -# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_PLATFORM is not set # CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # @@ -643,121 +740,76 @@ CONFIG_CHR_DEV_SG=m CONFIG_SCSI_MULTI_LUN=y # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m # -# SCSI Transport Attributes +# SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_SATA is not set # CONFIG_SCSI_DEBUG is not set - -# -# PCMCIA SCSI adapter support -# -# CONFIG_PCMCIA_AHA152X is not set -# CONFIG_PCMCIA_FDOMAIN is not set -# CONFIG_PCMCIA_NINJA_SCSI is not set -# CONFIG_PCMCIA_QLOGIC is not set -# CONFIG_PCMCIA_SYM53C500 is not set - -# -# Multi-device support (RAID and LVM) -# +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set # CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# PHY device support -# +# CONFIG_VETH is not set # CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# CONFIG_NET_ETHERNET=y CONFIG_MII=m +# CONFIG_AX88796 is not set # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y # -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices +# Wireless LAN # +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # -# Wireless LAN (non-hamradio) -# -CONFIG_NET_RADIO=y - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set -# CONFIG_PCMCIA_WAVELAN is not set -# CONFIG_PCMCIA_NETWAVE is not set - -# -# Wireless 802.11 Frequency Hopping cards support -# -# CONFIG_PCMCIA_RAYCS is not set - -# -# Wireless 802.11b ISA/PCI cards support -# -CONFIG_HERMES=m -# CONFIG_ATMEL is not set - -# -# Wireless 802.11b Pcmcia/Cardbus cards support -# -CONFIG_PCMCIA_HERMES=m -CONFIG_PCMCIA_SPECTRUM=m -# CONFIG_AIRO_CS is not set -# CONFIG_PCMCIA_WL3501 is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_CS=m -CONFIG_NET_WIRELESS=y - -# -# PCMCIA network device support +# USB Network Adapters # +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +CONFIG_USB_NET_ZAURUS=m CONFIG_NET_PCMCIA=y # CONFIG_PCMCIA_3C589 is not set # CONFIG_PCMCIA_3C574 is not set @@ -767,10 +819,6 @@ CONFIG_PCMCIA_PCNET=m # CONFIG_PCMCIA_SMC91C92 is not set # CONFIG_PCMCIA_XIRC2PS is not set # CONFIG_PCMCIA_AXNET is not set - -# -# Wan interfaces -# # CONFIG_WAN is not set CONFIG_PPP=m # CONFIG_PPP_MULTILINK is not set @@ -781,31 +829,29 @@ CONFIG_PPP_ASYNC=m CONFIG_PPP_BSDCOMP=m # CONFIG_PPP_MPPE is not set # CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set +CONFIG_SLHC=m # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# # CONFIG_ISDN is not set # # Input device support # CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set -# CONFIG_INPUT_POWER is not set +# CONFIG_INPUT_APMPOWER is not set # # Input Device Drivers @@ -816,17 +862,35 @@ CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_CORGI is not set CONFIG_KEYBOARD_SPITZ=y +# CONFIG_KEYBOARD_PXA27x is not set +# CONFIG_KEYBOARD_GPIO is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_CORGI=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_CORGI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set CONFIG_INPUT_UINPUT=m # @@ -839,8 +903,11 @@ CONFIG_INPUT_UINPUT=m # Character devices # CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -849,6 +916,7 @@ CONFIG_HW_CONSOLE=y CONFIG_SERIAL_8250=m CONFIG_SERIAL_8250_CS=m CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 # CONFIG_SERIAL_8250_EXTENDED is not set # @@ -860,101 +928,253 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=m # CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_DTLK is not set # CONFIG_R3964 is not set # -# Ftape, the floppy tape device driver -# - -# # PCMCIA character devices # # CONFIG_SYNCLINK_CS is not set # CONFIG_CARDMAN_4000 is not set # CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set # CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# # CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y # CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_HELPER_AUTO=y # -# I2C Algorithms +# I2C Hardware Bus support # -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set # -# I2C Hardware Bus support +# I2C system bus drivers (mostly embedded / system-on-chip) # +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set CONFIG_I2C_PXA=y # CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# # CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_STUB is not set -# CONFIG_I2C_PCA_ISA is not set # -# Hardware Monitoring support +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: # +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +CONFIG_SENSORS_MAX1111=y +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set # -# Misc devices +# Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# Multimedia Capabilities Port drivers +# Multifunction device drivers # +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set # -# Digital Video Broadcasting Devices +# Multimedia drivers # -# CONFIG_DVB is not set +# CONFIG_DAB is not set # # Graphics support # +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# # CONFIG_FB_S1D13XXX is not set CONFIG_FB_PXA=y +# CONFIG_FB_PXA_SMARTPANEL is not set # CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set # CONFIG_FB_W100 is not set # CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_CORGI=y +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set # # Console display driver support @@ -962,6 +1182,7 @@ CONFIG_FB_PXA=y # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -974,55 +1195,96 @@ CONFIG_FONT_8x16=y # CONFIG_FONT_SUN8x16 is not set # CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_10x18 is not set +# CONFIG_LOGO is not set +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # -# Logo configuration +# USB Input Devices # -# CONFIG_LOGO is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_DEVICE=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_DEVICE=y -CONFIG_BACKLIGHT_CORGI=y +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set # -# Sound +# USB HID Boot Protocol drivers # -# CONFIG_SOUND is not set +CONFIG_USB_KBD=m +CONFIG_USB_MOUSE=m # -# USB support -# +# Special HID drivers +# +CONFIG_HID_COMPAT=y +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BRIGHT=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DELL=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GYRATION=m +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_THRUSTMASTER_FF=m +CONFIG_ZEROPLUS_FF=m +CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set CONFIG_USB=m # CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set +CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_SUSPEND is not set # CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=m -# CONFIG_USB_OHCI_BIG_ENDIAN is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SL811_HCD=m CONFIG_USB_SL811_CS=m +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set # # USB Device Class drivers # CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1041,33 +1303,11 @@ CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=m -CONFIG_USB_HIDINPUT=y -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set - -# -# USB HID Boot Protocol drivers -# -CONFIG_USB_KBD=m -CONFIG_USB_MOUSE=m -CONFIG_USB_AIPTEK=m -CONFIG_USB_WACOM=m -# CONFIG_USB_ACECAD is not set -CONFIG_USB_KBTAB=m -CONFIG_USB_POWERMATE=m -CONFIG_USB_MTOUCH=m -# CONFIG_USB_ITMTOUCH is not set -CONFIG_USB_EGALAX=m -# CONFIG_USB_YEALINK is not set -CONFIG_USB_XPAD=m -CONFIG_USB_ATI_REMOTE=m -# CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set # # USB Imaging devices @@ -1076,51 +1316,22 @@ CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m # -# USB Multimedia devices -# -CONFIG_USB_DABUSB=m - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network Adapters -# -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_GL620A is not set -CONFIG_USB_NET_NET1080=m -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_ZD1201 is not set -CONFIG_USB_MON=y - -# # USB port drivers # - -# -# USB Serial Converter support -# CONFIG_USB_SERIAL=m +CONFIG_USB_EZUSB=y CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_AIRPRIME is not set -# CONFIG_USB_SERIAL_ANYDATA is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set CONFIG_USB_SERIAL_BELKIN=m +# CONFIG_USB_SERIAL_CH341 is not set # CONFIG_USB_SERIAL_WHITEHEAT is not set CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m # CONFIG_USB_SERIAL_CP2101 is not set CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_FUNSOFT is not set CONFIG_USB_SERIAL_VISOR=m CONFIG_USB_SERIAL_IPAQ=m CONFIG_USB_SERIAL_IR=m @@ -1128,6 +1339,7 @@ CONFIG_USB_SERIAL_EDGEPORT=m CONFIG_USB_SERIAL_EDGEPORT_TI=m CONFIG_USB_SERIAL_GARMIN=m CONFIG_USB_SERIAL_IPW=m +# CONFIG_USB_SERIAL_IUU is not set CONFIG_USB_SERIAL_KEYSPAN_PDA=m CONFIG_USB_SERIAL_KEYSPAN=m # CONFIG_USB_SERIAL_KEYSPAN_MPR is not set @@ -1145,49 +1357,66 @@ CONFIG_USB_SERIAL_KEYSPAN=m CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set # CONFIG_USB_SERIAL_HP4X is not set CONFIG_USB_SERIAL_SAFE=m # CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set CONFIG_USB_SERIAL_TI=m CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m # CONFIG_USB_SERIAL_OPTION is not set CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_EZUSB=y +# CONFIG_USB_SERIAL_DEBUG is not set # # USB Miscellaneous drivers # CONFIG_USB_EMI62=m CONFIG_USB_EMI26=m -CONFIG_USB_AUERSWALD=m +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set CONFIG_USB_RIO500=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m +# CONFIG_USB_BERRY_CHARGE is not set CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set CONFIG_USB_CYTHERM=m -CONFIG_USB_PHIDGETKIT=m -CONFIG_USB_PHIDGETSERVO=m +# CONFIG_USB_PHIDGET is not set CONFIG_USB_IDMOUSE=m +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set # CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_PXA2XX is not set -# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set # CONFIG_USB_GADGET_LH7A40X is not set # CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set CONFIG_USB_GADGET_DUMMY_HCD=y CONFIG_USB_DUMMY_HCD=m CONFIG_USB_GADGET_DUALSPEED=y @@ -1198,15 +1427,42 @@ CONFIG_USB_GADGETFS=m CONFIG_USB_FILE_STORAGE=m # CONFIG_USB_FILE_STORAGE_TEST is not set CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set # -# MMC/SD Card support +# MMC/SD/SDIO Card Drivers # -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# CONFIG_MMC_PXA=y -# CONFIG_MMC_WBSD is not set +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set # # File systems @@ -1218,18 +1474,19 @@ CONFIG_EXT2_FS_SECURITY=y # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -1254,11 +1511,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # Pseudo filesystems # CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set +# CONFIG_CONFIGFS_FS is not set # # Miscellaneous filesystems @@ -1270,39 +1529,42 @@ CONFIG_RAMFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y CONFIG_JFFS2_RUBIN=y # CONFIG_JFFS2_CMODE_NONE is not set CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set CONFIG_CRAMFS=m # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=m CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set CONFIG_NFS_V4=y -# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m +# CONFIG_SUNRPC_REGISTER_V4 is not set CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_RPCSEC_GSS_SPKM3 is not set CONFIG_SMB_FS=m @@ -1312,7 +1574,6 @@ CONFIG_SMB_NLS_REMOTE="cp437" # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types @@ -1332,11 +1593,9 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# +# CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y @@ -1377,35 +1636,71 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set CONFIG_NLS_UTF8=y - -# -# Profiling support -# -CONFIG_PROFILING=y -CONFIG_OPROFILE=m +# CONFIG_DLM is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y -CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set # CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set # CONFIG_DEBUG_USER is not set CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set @@ -1414,46 +1709,113 @@ CONFIG_DEBUG_LL=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y # -# Cryptographic options +# Crypto core or helper # -CONFIG_CRYPTO=y -CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=m CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m # CONFIG_CRYPTO_TGR192 is not set -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +# CONFIG_CRYPTO_CAMELLIA is not set CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -CONFIG_CRYPTO_TEST=m +# CONFIG_CRYPTO_LZO is not set # -# Hardware crypto devices +# Random Number Generation # +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y # # Library routines # +CONFIG_BITREVERSE=y CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h index 5001390be958..d3f0a9eee9f6 100644 --- a/arch/arm/include/asm/div64.h +++ b/arch/arm/include/asm/div64.h @@ -165,7 +165,7 @@ __res = __m; \ asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ "mov %Q0, #0" \ - : "+r" (__res) \ + : "+&r" (__res) \ : "r" (__m), "r" (__n) \ : "cc" ); \ } else { \ @@ -182,7 +182,7 @@ "umlal %R0, %Q0, %Q1, %R2\n\t" \ "mov %R0, #0\n\t" \ "umlal %Q0, %R0, %R1, %R2" \ - : "+r" (__res) \ + : "+&r" (__res) \ : "r" (__m), "r" (__n) \ : "cc" ); \ } else { \ @@ -192,7 +192,7 @@ "adds %Q0, %1, %Q0\n\t" \ "adc %R0, %R0, #0\n\t" \ "umlal %Q0, %R0, %R2, %R3" \ - : "+r" (__res), "+r" (__z) \ + : "+&r" (__res), "+&r" (__z) \ : "r" (__m), "r" (__n) \ : "cc" ); \ } \ diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 7e5ebb5bdd17..9b0447c3d59b 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -404,6 +404,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) } pin = bank->chipbase; + gpio = &irq_desc[pin]; while (isr) { if (isr & 1) { diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile index e14bf40bfb07..b96c55dad343 100644 --- a/arch/arm/mach-kirkwood/Makefile +++ b/arch/arm/mach-kirkwood/Makefile @@ -2,4 +2,4 @@ obj-y += common.o addr-map.o irq.o pcie.o obj-$(CONFIG_MACH_DB88F6281_BP) += db88f6281-bp-setup.o obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o -obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6281-setup.o +obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 3553babbbf05..d140abca690a 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -1,18 +1,13 @@ -if ARCH_MSM7X00A +if ARCH_MSM -comment "MSM7X00A Board Type" - depends on ARCH_MSM7X00A +comment "MSM Board Type" + depends on ARCH_MSM config MACH_HALIBUT - depends on ARCH_MSM7X00A + depends on ARCH_MSM default y - bool "Halibut Board (QCT SURF7200A)" + bool "Halibut Board (QCT SURF7201A)" help - Support for the Qualcomm SURF7200A eval board. - -config MSM7X00A_IDLE - depends on ARCH_MSM7X00A - default y - bool "Idle Support for MSM7X00A" + Support for the Qualcomm SURF7201A eval board. endif diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index d12f23655850..1aa47001aa3b 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -1,7 +1,8 @@ obj-y += io.o idle.o irq.o timer.o dma.o - -# Common code for board init -obj-y += common.o +obj-y += devices.o +obj-y += proc_comm.o +obj-y += vreg.o +obj-y += clock.o clock-7x01a.o obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index a24259133e07..c2a96e3965a6 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -33,6 +33,8 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include "devices.h" + static struct resource smc91x_resources[] = { [0] = { .start = 0x9C004300, @@ -53,31 +55,12 @@ static struct platform_device smc91x_device = { .resource = smc91x_resources, }; -static void mddi0_panel_power(int on) -{ -} - -static struct msm_mddi_platform_data msm_mddi0_pdata = { - .panel_power = mddi0_panel_power, - .has_vsync_irq = 0, -}; - -static struct platform_device msm_mddi0_device = { - .name = "msm_mddi", - .id = 0, - .dev = { - .platform_data = &msm_mddi0_pdata - }, -}; - -static struct platform_device msm_serial0_device = { - .name = "msm_serial", - .id = 0, -}; - static struct platform_device *devices[] __initdata = { - &msm_serial0_device, - &msm_mddi0_device, + &msm_device_uart3, + &msm_device_smd, + &msm_device_nand, + &msm_device_hsusb, + &msm_device_i2c, &smc91x_device, }; @@ -91,20 +74,15 @@ static void __init halibut_init_irq(void) static void __init halibut_init(void) { platform_add_devices(devices, ARRAY_SIZE(devices)); - msm_add_devices(); } static void __init halibut_map_io(void) { msm_map_common_io(); + msm_clock_init(); } MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") - -/* UART for LL DEBUG */ - .phys_io = MSM_UART1_PHYS, - .io_pg_offst = ((MSM_UART1_BASE) >> 18) & 0xfffc, - .boot_params = 0x10000100, .map_io = halibut_map_io, .init_irq = halibut_init_irq, diff --git a/arch/arm/mach-msm/clock-7x01a.c b/arch/arm/mach-msm/clock-7x01a.c new file mode 100644 index 000000000000..62230a3428ee --- /dev/null +++ b/arch/arm/mach-msm/clock-7x01a.c @@ -0,0 +1,126 @@ +/* arch/arm/mach-msm/clock-7x01a.c + * + * Clock tables for MSM7X01A + * + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2007 QUALCOMM Incorporated + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/platform_device.h> + +#include "clock.h" +#include "devices.h" + +/* clock IDs used by the modem processor */ + +#define ACPU_CLK 0 /* Applications processor clock */ +#define ADM_CLK 1 /* Applications data mover clock */ +#define ADSP_CLK 2 /* ADSP clock */ +#define EBI1_CLK 3 /* External bus interface 1 clock */ +#define EBI2_CLK 4 /* External bus interface 2 clock */ +#define ECODEC_CLK 5 /* External CODEC clock */ +#define EMDH_CLK 6 /* External MDDI host clock */ +#define GP_CLK 7 /* General purpose clock */ +#define GRP_CLK 8 /* Graphics clock */ +#define I2C_CLK 9 /* I2C clock */ +#define ICODEC_RX_CLK 10 /* Internal CODEX RX clock */ +#define ICODEC_TX_CLK 11 /* Internal CODEX TX clock */ +#define IMEM_CLK 12 /* Internal graphics memory clock */ +#define MDC_CLK 13 /* MDDI client clock */ +#define MDP_CLK 14 /* Mobile display processor clock */ +#define PBUS_CLK 15 /* Peripheral bus clock */ +#define PCM_CLK 16 /* PCM clock */ +#define PMDH_CLK 17 /* Primary MDDI host clock */ +#define SDAC_CLK 18 /* Stereo DAC clock */ +#define SDC1_CLK 19 /* Secure Digital Card clocks */ +#define SDC1_PCLK 20 +#define SDC2_CLK 21 +#define SDC2_PCLK 22 +#define SDC3_CLK 23 +#define SDC3_PCLK 24 +#define SDC4_CLK 25 +#define SDC4_PCLK 26 +#define TSIF_CLK 27 /* Transport Stream Interface clocks */ +#define TSIF_REF_CLK 28 +#define TV_DAC_CLK 29 /* TV clocks */ +#define TV_ENC_CLK 30 +#define UART1_CLK 31 /* UART clocks */ +#define UART2_CLK 32 +#define UART3_CLK 33 +#define UART1DM_CLK 34 +#define UART2DM_CLK 35 +#define USB_HS_CLK 36 /* High speed USB core clock */ +#define USB_HS_PCLK 37 /* High speed USB pbus clock */ +#define USB_OTG_CLK 38 /* Full speed USB clock */ +#define VDC_CLK 39 /* Video controller clock */ +#define VFE_CLK 40 /* Camera / Video Front End clock */ +#define VFE_MDC_CLK 41 /* VFE MDDI client clock */ + +#define NR_CLKS 42 + +#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \ + .name = clk_name, \ + .id = clk_id, \ + .flags = clk_flags, \ + .dev = clk_dev, \ + } + +#define OFF CLKFLAG_AUTO_OFF +#define MINMAX CLKFLAG_USE_MIN_MAX_TO_SET + +struct clk msm_clocks[] = { + CLOCK("adm_clk", ADM_CLK, NULL, 0), + CLOCK("adsp_clk", ADSP_CLK, NULL, 0), + CLOCK("ebi1_clk", EBI1_CLK, NULL, 0), + CLOCK("ebi2_clk", EBI2_CLK, NULL, 0), + CLOCK("ecodec_clk", ECODEC_CLK, NULL, 0), + CLOCK("emdh_clk", EMDH_CLK, NULL, OFF), + CLOCK("gp_clk", GP_CLK, NULL, 0), + CLOCK("grp_clk", GRP_CLK, NULL, OFF), + CLOCK("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0), + CLOCK("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), + CLOCK("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), + CLOCK("imem_clk", IMEM_CLK, NULL, OFF), + CLOCK("mdc_clk", MDC_CLK, NULL, 0), + CLOCK("mdp_clk", MDP_CLK, NULL, OFF), + CLOCK("pbus_clk", PBUS_CLK, NULL, 0), + CLOCK("pcm_clk", PCM_CLK, NULL, 0), + CLOCK("pmdh_clk", PMDH_CLK, NULL, OFF | MINMAX), + CLOCK("sdac_clk", SDAC_CLK, NULL, OFF), + CLOCK("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF), + CLOCK("sdc_pclk", SDC1_PCLK, &msm_device_sdc1.dev, OFF), + CLOCK("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF), + CLOCK("sdc_pclk", SDC2_PCLK, &msm_device_sdc2.dev, OFF), + CLOCK("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF), + CLOCK("sdc_pclk", SDC3_PCLK, &msm_device_sdc3.dev, OFF), + CLOCK("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF), + CLOCK("sdc_pclk", SDC4_PCLK, &msm_device_sdc4.dev, OFF), + CLOCK("tsif_clk", TSIF_CLK, NULL, 0), + CLOCK("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), + CLOCK("tv_dac_clk", TV_DAC_CLK, NULL, 0), + CLOCK("tv_enc_clk", TV_ENC_CLK, NULL, 0), + CLOCK("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF), + CLOCK("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0), + CLOCK("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF), + CLOCK("uart1dm_clk", UART1DM_CLK, NULL, OFF), + CLOCK("uart2dm_clk", UART2DM_CLK, NULL, 0), + CLOCK("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF), + CLOCK("usb_hs_pclk", USB_HS_PCLK, &msm_device_hsusb.dev, OFF), + CLOCK("usb_otg_clk", USB_OTG_CLK, NULL, 0), + CLOCK("vdc_clk", VDC_CLK, NULL, OFF | MINMAX), + CLOCK("vfe_clk", VFE_CLK, NULL, OFF), + CLOCK("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), +}; + +unsigned msm_num_clocks = ARRAY_SIZE(msm_clocks); diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c new file mode 100644 index 000000000000..3b1ce36f1032 --- /dev/null +++ b/arch/arm/mach-msm/clock.c @@ -0,0 +1,218 @@ +/* arch/arm/mach-msm/clock.c + * + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2007 QUALCOMM Incorporated + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/version.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/list.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/spinlock.h> + +#include "clock.h" +#include "proc_comm.h" + +static DEFINE_MUTEX(clocks_mutex); +static DEFINE_SPINLOCK(clocks_lock); +static LIST_HEAD(clocks); + +/* + * glue for the proc_comm interface + */ +static inline int pc_clk_enable(unsigned id) +{ + return msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL); +} + +static inline void pc_clk_disable(unsigned id) +{ + msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL); +} + +static inline int pc_clk_set_rate(unsigned id, unsigned rate) +{ + return msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); +} + +static inline int pc_clk_set_min_rate(unsigned id, unsigned rate) +{ + return msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate); +} + +static inline int pc_clk_set_max_rate(unsigned id, unsigned rate) +{ + return msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate); +} + +static inline int pc_clk_set_flags(unsigned id, unsigned flags) +{ + return msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags); +} + +static inline unsigned pc_clk_get_rate(unsigned id) +{ + if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL)) + return 0; + else + return id; +} + +static inline unsigned pc_clk_is_enabled(unsigned id) +{ + if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL)) + return 0; + else + return id; +} + +static inline int pc_pll_request(unsigned id, unsigned on) +{ + on = !!on; + return msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on); +} + +/* + * Standard clock functions defined in include/linux/clk.h + */ +struct clk *clk_get(struct device *dev, const char *id) +{ + struct clk *clk; + + mutex_lock(&clocks_mutex); + + list_for_each_entry(clk, &clocks, list) + if (!strcmp(id, clk->name) && clk->dev == dev) + goto found_it; + + list_for_each_entry(clk, &clocks, list) + if (!strcmp(id, clk->name) && clk->dev == NULL) + goto found_it; + + clk = ERR_PTR(-ENOENT); +found_it: + mutex_unlock(&clocks_mutex); + return clk; +} +EXPORT_SYMBOL(clk_get); + +void clk_put(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_put); + +int clk_enable(struct clk *clk) +{ + unsigned long flags; + spin_lock_irqsave(&clocks_lock, flags); + clk->count++; + if (clk->count == 1) + pc_clk_enable(clk->id); + spin_unlock_irqrestore(&clocks_lock, flags); + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + spin_lock_irqsave(&clocks_lock, flags); + BUG_ON(clk->count == 0); + clk->count--; + if (clk->count == 0) + pc_clk_disable(clk->id); + spin_unlock_irqrestore(&clocks_lock, flags); +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return pc_clk_get_rate(clk->id); +} +EXPORT_SYMBOL(clk_get_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + int ret; + if (clk->flags & CLKFLAG_USE_MIN_MAX_TO_SET) { + ret = pc_clk_set_max_rate(clk->id, rate); + if (ret) + return ret; + return pc_clk_set_min_rate(clk->id, rate); + } + return pc_clk_set_rate(clk->id, rate); +} +EXPORT_SYMBOL(clk_set_rate); + +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + return -ENOSYS; +} +EXPORT_SYMBOL(clk_set_parent); + +struct clk *clk_get_parent(struct clk *clk) +{ + return ERR_PTR(-ENOSYS); +} +EXPORT_SYMBOL(clk_get_parent); + +int clk_set_flags(struct clk *clk, unsigned long flags) +{ + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + return pc_clk_set_flags(clk->id, flags); +} +EXPORT_SYMBOL(clk_set_flags); + + +void __init msm_clock_init(void) +{ + unsigned n; + + spin_lock_init(&clocks_lock); + mutex_lock(&clocks_mutex); + for (n = 0; n < msm_num_clocks; n++) + list_add_tail(&msm_clocks[n].list, &clocks); + mutex_unlock(&clocks_mutex); +} + +/* The bootloader and/or AMSS may have left various clocks enabled. + * Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have + * not been explicitly enabled by a clk_enable() call. + */ +static int __init clock_late_init(void) +{ + unsigned long flags; + struct clk *clk; + unsigned count = 0; + + mutex_lock(&clocks_mutex); + list_for_each_entry(clk, &clocks, list) { + if (clk->flags & CLKFLAG_AUTO_OFF) { + spin_lock_irqsave(&clocks_lock, flags); + if (!clk->count) { + count++; + pc_clk_disable(clk->id); + } + spin_unlock_irqrestore(&clocks_lock, flags); + } + } + mutex_unlock(&clocks_mutex); + pr_info("clock_late_init() disabled %d unused clocks\n", count); + return 0; +} + +late_initcall(clock_late_init); diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h new file mode 100644 index 000000000000..f875e1544e5f --- /dev/null +++ b/arch/arm/mach-msm/clock.h @@ -0,0 +1,48 @@ +/* arch/arm/mach-msm/clock.h + * + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2007 QUALCOMM Incorporated + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H +#define __ARCH_ARM_MACH_MSM_CLOCK_H + +#include <linux/list.h> + +#define CLKFLAG_INVERT 0x00000001 +#define CLKFLAG_NOINVERT 0x00000002 +#define CLKFLAG_NONEST 0x00000004 +#define CLKFLAG_NORESET 0x00000008 + +#define CLK_FIRST_AVAILABLE_FLAG 0x00000100 +#define CLKFLAG_USE_MIN_MAX_TO_SET 0x00000200 +#define CLKFLAG_AUTO_OFF 0x00000400 + +struct clk { + uint32_t id; + uint32_t count; + uint32_t flags; + const char *name; + struct list_head list; + struct device *dev; +}; + +#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100) +#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104) +#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124) + +extern struct clk msm_clocks[]; +extern unsigned msm_num_clocks; + +#endif + diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c deleted file mode 100644 index 604f8ade9587..000000000000 --- a/arch/arm/mach-msm/common.c +++ /dev/null @@ -1,116 +0,0 @@ -/* linux/arch/arm/mach-msm/common.c - * - * Common setup code for MSM7K Boards - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <asm/mach/flash.h> - -#include <asm/setup.h> - -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> - -#include <mach/msm_iomap.h> - -#include <mach/board.h> - -struct flash_platform_data msm_nand_data = { - .parts = 0, - .nr_parts = 0, -}; - -static struct resource msm_nand_resources[] = { - [0] = { - .start = 7, - .end = 7, - .flags = IORESOURCE_DMA, - }, -}; - -static struct platform_device msm_nand_device = { - .name = "msm_nand", - .id = -1, - .num_resources = ARRAY_SIZE(msm_nand_resources), - .resource = msm_nand_resources, - .dev = { - .platform_data = &msm_nand_data, - }, -}; - -static struct platform_device msm_smd_device = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource msm_i2c_resources[] = { - { - .start = MSM_I2C_BASE, - .end = MSM_I2C_BASE + MSM_I2C_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_PWB_I2C, - .end = INT_PWB_I2C, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device msm_i2c_device = { - .name = "msm_i2c", - .id = 0, - .num_resources = ARRAY_SIZE(msm_i2c_resources), - .resource = msm_i2c_resources, -}; - -static struct resource usb_resources[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device msm_hsusb_device = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(usb_resources), - .resource = usb_resources, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct platform_device *devices[] __initdata = { - &msm_nand_device, - &msm_smd_device, - &msm_i2c_device, - &msm_hsusb_device, -}; - -void __init msm_add_devices(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); -} diff --git a/arch/arm/mach-msm/devices.c b/arch/arm/mach-msm/devices.c new file mode 100644 index 000000000000..f2a74b92a97f --- /dev/null +++ b/arch/arm/mach-msm/devices.c @@ -0,0 +1,267 @@ +/* linux/arch/arm/mach-msm/devices.c + * + * Copyright (C) 2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/platform_device.h> + +#include <mach/msm_iomap.h> +#include "devices.h" + +#include <asm/mach/flash.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +static struct resource resources_uart1[] = { + { + .start = INT_UART1, + .end = INT_UART1, + .flags = IORESOURCE_IRQ, + }, + { + .start = MSM_UART1_PHYS, + .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource resources_uart2[] = { + { + .start = INT_UART2, + .end = INT_UART2, + .flags = IORESOURCE_IRQ, + }, + { + .start = MSM_UART2_PHYS, + .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource resources_uart3[] = { + { + .start = INT_UART3, + .end = INT_UART3, + .flags = IORESOURCE_IRQ, + }, + { + .start = MSM_UART3_PHYS, + .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device msm_device_uart1 = { + .name = "msm_serial", + .id = 0, + .num_resources = ARRAY_SIZE(resources_uart1), + .resource = resources_uart1, +}; + +struct platform_device msm_device_uart2 = { + .name = "msm_serial", + .id = 1, + .num_resources = ARRAY_SIZE(resources_uart2), + .resource = resources_uart2, +}; + +struct platform_device msm_device_uart3 = { + .name = "msm_serial", + .id = 2, + .num_resources = ARRAY_SIZE(resources_uart3), + .resource = resources_uart3, +}; + +static struct resource resources_i2c[] = { + { + .start = MSM_I2C_PHYS, + .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_PWB_I2C, + .end = INT_PWB_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device msm_device_i2c = { + .name = "msm_i2c", + .id = 0, + .num_resources = ARRAY_SIZE(resources_i2c), + .resource = resources_i2c, +}; + +static struct resource resources_hsusb[] = { + { + .start = MSM_HSUSB_PHYS, + .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_HS, + .end = INT_USB_HS, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device msm_device_hsusb = { + .name = "msm_hsusb", + .id = -1, + .num_resources = ARRAY_SIZE(resources_hsusb), + .resource = resources_hsusb, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, +}; + +struct flash_platform_data msm_nand_data = { + .parts = NULL, + .nr_parts = 0, +}; + +static struct resource resources_nand[] = { + [0] = { + .start = 7, + .end = 7, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device msm_device_nand = { + .name = "msm_nand", + .id = -1, + .num_resources = ARRAY_SIZE(resources_nand), + .resource = resources_nand, + .dev = { + .platform_data = &msm_nand_data, + }, +}; + +struct platform_device msm_device_smd = { + .name = "msm_smd", + .id = -1, +}; + +static struct resource resources_sdc1[] = { + { + .start = MSM_SDC1_PHYS, + .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_SDC1_0, + .end = INT_SDC1_1, + .flags = IORESOURCE_IRQ, + }, + { + .start = 8, + .end = 8, + .flags = IORESOURCE_DMA, + }, +}; + +static struct resource resources_sdc2[] = { + { + .start = MSM_SDC2_PHYS, + .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_SDC2_0, + .end = INT_SDC2_1, + .flags = IORESOURCE_IRQ, + }, + { + .start = 8, + .end = 8, + .flags = IORESOURCE_DMA, + }, +}; + +static struct resource resources_sdc3[] = { + { + .start = MSM_SDC3_PHYS, + .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_SDC3_0, + .end = INT_SDC3_1, + .flags = IORESOURCE_IRQ, + }, + { + .start = 8, + .end = 8, + .flags = IORESOURCE_DMA, + }, +}; + +static struct resource resources_sdc4[] = { + { + .start = MSM_SDC4_PHYS, + .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_SDC4_0, + .end = INT_SDC4_1, + .flags = IORESOURCE_IRQ, + }, + { + .start = 8, + .end = 8, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device msm_device_sdc1 = { + .name = "msm_sdcc", + .id = 1, + .num_resources = ARRAY_SIZE(resources_sdc1), + .resource = resources_sdc1, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, +}; + +struct platform_device msm_device_sdc2 = { + .name = "msm_sdcc", + .id = 2, + .num_resources = ARRAY_SIZE(resources_sdc2), + .resource = resources_sdc2, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, +}; + +struct platform_device msm_device_sdc3 = { + .name = "msm_sdcc", + .id = 3, + .num_resources = ARRAY_SIZE(resources_sdc3), + .resource = resources_sdc3, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, +}; + +struct platform_device msm_device_sdc4 = { + .name = "msm_sdcc", + .id = 4, + .num_resources = ARRAY_SIZE(resources_sdc4), + .resource = resources_sdc4, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, +}; diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h new file mode 100644 index 000000000000..0744c4a27d6a --- /dev/null +++ b/arch/arm/mach-msm/devices.h @@ -0,0 +1,36 @@ +/* linux/arch/arm/mach-msm/devices.h + * + * Copyright (C) 2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ARCH_ARM_MACH_MSM_DEVICES_H +#define __ARCH_ARM_MACH_MSM_DEVICES_H + +extern struct platform_device msm_device_uart1; +extern struct platform_device msm_device_uart2; +extern struct platform_device msm_device_uart3; + +extern struct platform_device msm_device_sdc1; +extern struct platform_device msm_device_sdc2; +extern struct platform_device msm_device_sdc3; +extern struct platform_device msm_device_sdc4; + +extern struct platform_device msm_device_hsusb; + +extern struct platform_device msm_device_i2c; + +extern struct platform_device msm_device_smd; + +extern struct platform_device msm_device_nand; + +#endif diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c index 0c8f252637e1..f5420f9585c5 100644 --- a/arch/arm/mach-msm/dma.c +++ b/arch/arm/mach-msm/dma.c @@ -26,7 +26,7 @@ enum { }; static DEFINE_SPINLOCK(msm_dmov_lock); -static struct msm_dmov_cmd active_command; +static unsigned int channel_active; static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; @@ -43,6 +43,11 @@ unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; #define PRINT_FLOW(format, args...) \ MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); +void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) +{ + writel((graceful << 31), DMOV_FLUSH0(id)); +} + void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) { unsigned long irq_flags; @@ -60,6 +65,9 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) #endif PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); list_add_tail(&cmd->list, &active_commands[id]); + if (!channel_active) + enable_irq(INT_ADM_AARM); + channel_active |= 1U << id; writel(cmd->cmdptr, DMOV_CMD_PTR(id)); } else { if (list_empty(&active_commands[id])) @@ -76,21 +84,19 @@ struct msm_dmov_exec_cmdptr_cmd { struct completion complete; unsigned id; unsigned int result; - unsigned int flush[6]; + struct msm_dmov_errdata err; }; -static void dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, unsigned int result) +static void +dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, + unsigned int result, + struct msm_dmov_errdata *err) { struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); cmd->result = result; - if (result != 0x80000002) { - cmd->flush[0] = readl(DMOV_FLUSH0(cmd->id)); - cmd->flush[1] = readl(DMOV_FLUSH1(cmd->id)); - cmd->flush[2] = readl(DMOV_FLUSH2(cmd->id)); - cmd->flush[3] = readl(DMOV_FLUSH3(cmd->id)); - cmd->flush[4] = readl(DMOV_FLUSH4(cmd->id)); - cmd->flush[5] = readl(DMOV_FLUSH5(cmd->id)); - } + if (result != 0x80000002 && err) + memcpy(&cmd->err, err, sizeof(struct msm_dmov_errdata)); + complete(&cmd->complete); } @@ -111,7 +117,7 @@ int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) if (cmd.result != 0x80000002) { PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", - id, cmd.flush[0], cmd.flush[1], cmd.flush[2], cmd.flush[3]); + id, cmd.err.flush[0], cmd.err.flush[1], cmd.err.flush[2], cmd.err.flush[3]); return -EIO; } PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); @@ -159,25 +165,40 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) "for %p, result %x\n", id, cmd, ch_result); if (cmd) { list_del(&cmd->list); - cmd->complete_func(cmd, ch_result); + cmd->complete_func(cmd, ch_result, NULL); } } if (ch_result & DMOV_RSLT_FLUSH) { - unsigned int flush0 = readl(DMOV_FLUSH0(id)); + struct msm_dmov_errdata errdata; + + errdata.flush[0] = readl(DMOV_FLUSH0(id)); + errdata.flush[1] = readl(DMOV_FLUSH1(id)); + errdata.flush[2] = readl(DMOV_FLUSH2(id)); + errdata.flush[3] = readl(DMOV_FLUSH3(id)); + errdata.flush[4] = readl(DMOV_FLUSH4(id)); + errdata.flush[5] = readl(DMOV_FLUSH5(id)); PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, flush0); + PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); if (cmd) { list_del(&cmd->list); - cmd->complete_func(cmd, ch_result); + cmd->complete_func(cmd, ch_result, &errdata); } } if (ch_result & DMOV_RSLT_ERROR) { - unsigned int flush0 = readl(DMOV_FLUSH0(id)); + struct msm_dmov_errdata errdata; + + errdata.flush[0] = readl(DMOV_FLUSH0(id)); + errdata.flush[1] = readl(DMOV_FLUSH1(id)); + errdata.flush[2] = readl(DMOV_FLUSH2(id)); + errdata.flush[3] = readl(DMOV_FLUSH3(id)); + errdata.flush[4] = readl(DMOV_FLUSH4(id)); + errdata.flush[5] = readl(DMOV_FLUSH5(id)); + PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, flush0); + PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); if (cmd) { list_del(&cmd->list); - cmd->complete_func(cmd, ch_result); + cmd->complete_func(cmd, ch_result, &errdata); } /* this does not seem to work, once we get an error */ /* the datamover will no longer accept commands */ @@ -193,8 +214,14 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) writel(cmd->cmdptr, DMOV_CMD_PTR(id)); } } while (ch_status & DMOV_STATUS_RSLT_VALID); + if (list_empty(&active_commands[id]) && list_empty(&ready_commands[id])) + channel_active &= ~(1U << id); PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); } + + if (!channel_active) + disable_irq(INT_ADM_AARM); + spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); return IRQ_HANDLED; } @@ -202,12 +229,17 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) static int __init msm_init_datamover(void) { int i; + int ret; for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { INIT_LIST_HEAD(&ready_commands[i]); INIT_LIST_HEAD(&active_commands[i]); writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); } - return request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); + ret = request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); + if (ret) + return ret; + disable_irq(INT_ADM_AARM); + return 0; } arch_initcall(msm_init_datamover); diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h index a7639493c095..264d62e519f3 100644 --- a/arch/arm/mach-msm/include/mach/board.h +++ b/arch/arm/mach-msm/include/mach/board.h @@ -33,5 +33,6 @@ void __init msm_add_devices(void); void __init msm_map_common_io(void); void __init msm_init_irq(void); void __init msm_init_gpio(void); +void __init msm_clock_init(void); #endif diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 528eef4b605c..1db3c97dbc49 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -22,18 +22,22 @@ mrc p15, 0, \rx, c1, c0 tst \rx, #1 ldreq \rx, =MSM_UART1_PHYS - ldrne \rx, =MSM_UART1_BASE + movne \rx, #0 .endm .macro senduart,rd,rx - str \rd, [\rx, #0x0C] + teq \rx, #0 + strne \rd, [\rx, #0x0C] .endm .macro waituart,rd,rx @ wait for TX_READY + teq \rx, #0 + bne 2f 1: ldr \rd, [\rx, #0x08] tst \rd, #0x04 beq 1b +2: .endm .macro busyuart,rd,rx diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h index ad1c87f86d10..5ab5bdffab07 100644 --- a/arch/arm/mach-msm/include/mach/dma.h +++ b/arch/arm/mach-msm/include/mach/dma.h @@ -1,4 +1,4 @@ -/* arch/arm/mach-msm/include/mach/dma.h +/* linux/include/asm-arm/arch-msm/dma.h * * Copyright (C) 2007 Google, Inc. * @@ -18,17 +18,21 @@ #include <linux/list.h> #include <mach/msm_iomap.h> +struct msm_dmov_errdata { + uint32_t flush[6]; +}; + struct msm_dmov_cmd { struct list_head list; unsigned int cmdptr; - void (*complete_func)(struct msm_dmov_cmd *cmd, unsigned int result); -/* void (*user_result_func)(struct msm_dmov_cmd *cmd); */ + void (*complete_func)(struct msm_dmov_cmd *cmd, + unsigned int result, + struct msm_dmov_errdata *err); }; void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd); +void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful); int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr); -/* int msm_dmov_exec_cmd_etc(unsigned id, unsigned int cmdptr, int timeout, int interruptible); */ @@ -122,6 +126,16 @@ typedef struct { unsigned _reserved; } dmov_sg; +/* Box mode */ +typedef struct { + uint32_t cmd; + uint32_t src_row_addr; + uint32_t dst_row_addr; + uint32_t src_dst_len; + uint32_t num_rows; + uint32_t row_offset; +} dmov_box; + /* bits for the cmd field of the above structures */ #define CMD_LC (1 << 31) /* last command */ diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index e221f58ceea3..2f7b4c8620d9 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h @@ -37,11 +37,17 @@ * */ -#define MSM_VIC_BASE 0xE0000000 +#ifdef __ASSEMBLY__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __force __iomem *)(x)) +#endif + +#define MSM_VIC_BASE IOMEM(0xE0000000) #define MSM_VIC_PHYS 0xC0000000 #define MSM_VIC_SIZE SZ_4K -#define MSM_CSR_BASE 0xE0001000 +#define MSM_CSR_BASE IOMEM(0xE0001000) #define MSM_CSR_PHYS 0xC0100000 #define MSM_CSR_SIZE SZ_4K @@ -49,56 +55,67 @@ #define MSM_GPT_BASE MSM_CSR_BASE #define MSM_GPT_SIZE SZ_4K -#define MSM_DMOV_BASE 0xE0002000 +#define MSM_DMOV_BASE IOMEM(0xE0002000) #define MSM_DMOV_PHYS 0xA9700000 #define MSM_DMOV_SIZE SZ_4K -#define MSM_UART1_BASE 0xE0003000 +#define MSM_GPIO1_BASE IOMEM(0xE0003000) +#define MSM_GPIO1_PHYS 0xA9200000 +#define MSM_GPIO1_SIZE SZ_4K + +#define MSM_GPIO2_BASE IOMEM(0xE0004000) +#define MSM_GPIO2_PHYS 0xA9300000 +#define MSM_GPIO2_SIZE SZ_4K + +#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) +#define MSM_CLK_CTL_PHYS 0xA8600000 +#define MSM_CLK_CTL_SIZE SZ_4K + +#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) +#define MSM_SHARED_RAM_PHYS 0x01F00000 +#define MSM_SHARED_RAM_SIZE SZ_1M + #define MSM_UART1_PHYS 0xA9A00000 #define MSM_UART1_SIZE SZ_4K -#define MSM_UART2_BASE 0xE0004000 #define MSM_UART2_PHYS 0xA9B00000 #define MSM_UART2_SIZE SZ_4K -#define MSM_UART3_BASE 0xE0005000 #define MSM_UART3_PHYS 0xA9C00000 #define MSM_UART3_SIZE SZ_4K -#define MSM_I2C_BASE 0xE0006000 -#define MSM_I2C_PHYS 0xA9900000 -#define MSM_I2C_SIZE SZ_4K +#define MSM_SDC1_PHYS 0xA0400000 +#define MSM_SDC1_SIZE SZ_4K -#define MSM_GPIO1_BASE 0xE0007000 -#define MSM_GPIO1_PHYS 0xA9200000 -#define MSM_GPIO1_SIZE SZ_4K +#define MSM_SDC2_PHYS 0xA0500000 +#define MSM_SDC2_SIZE SZ_4K -#define MSM_GPIO2_BASE 0xE0008000 -#define MSM_GPIO2_PHYS 0xA9300000 -#define MSM_GPIO2_SIZE SZ_4K +#define MSM_SDC3_PHYS 0xA0600000 +#define MSM_SDC3_SIZE SZ_4K + +#define MSM_SDC4_PHYS 0xA0700000 +#define MSM_SDC4_SIZE SZ_4K + +#define MSM_I2C_PHYS 0xA9900000 +#define MSM_I2C_SIZE SZ_4K -#define MSM_HSUSB_BASE 0xE0009000 #define MSM_HSUSB_PHYS 0xA0800000 #define MSM_HSUSB_SIZE SZ_4K -#define MSM_CLK_CTL_BASE 0xE000A000 -#define MSM_CLK_CTL_PHYS 0xA8600000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_PMDH_BASE 0xE000B000 #define MSM_PMDH_PHYS 0xAA600000 #define MSM_PMDH_SIZE SZ_4K -#define MSM_EMDH_BASE 0xE000C000 #define MSM_EMDH_PHYS 0xAA700000 #define MSM_EMDH_SIZE SZ_4K -#define MSM_MDP_BASE 0xE0010000 #define MSM_MDP_PHYS 0xAA200000 #define MSM_MDP_SIZE 0x000F0000 -#define MSM_SHARED_RAM_BASE 0xE0100000 -#define MSM_SHARED_RAM_PHYS 0x01F00000 -#define MSM_SHARED_RAM_SIZE SZ_1M +#define MSM_MDC_PHYS 0xAA500000 +#define MSM_MDC_SIZE SZ_1M + +#define MSM_AD5_PHYS 0xAC000000 +#define MSM_AD5_SIZE (SZ_1M*13) + #endif diff --git a/arch/arm/mach-msm/include/mach/vreg.h b/arch/arm/mach-msm/include/mach/vreg.h new file mode 100644 index 000000000000..9f9e25cb718e --- /dev/null +++ b/arch/arm/mach-msm/include/mach/vreg.h @@ -0,0 +1,29 @@ +/* linux/include/asm-arm/arch-msm/vreg.h + * + * Copyright (C) 2008 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ARCH_ARM_MACH_MSM_VREG_H +#define __ARCH_ARM_MACH_MSM_VREG_H + +struct vreg; + +struct vreg *vreg_get(struct device *dev, const char *id); +void vreg_put(struct vreg *vreg); + +int vreg_enable(struct vreg *vreg); +void vreg_disable(struct vreg *vreg); +int vreg_set_level(struct vreg *vreg, unsigned mv); + +#endif diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 7999e4ba8e20..6e7692ff6f2c 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -28,7 +28,7 @@ #include <mach/board.h> #define MSM_DEVICE(name) { \ - .virtual = MSM_##name##_BASE, \ + .virtual = (unsigned long) MSM_##name##_BASE, \ .pfn = __phys_to_pfn(MSM_##name##_PHYS), \ .length = MSM_##name##_SIZE, \ .type = MT_DEVICE_NONSHARED, \ @@ -39,19 +39,11 @@ static struct map_desc msm_io_desc[] __initdata = { MSM_DEVICE(CSR), MSM_DEVICE(GPT), MSM_DEVICE(DMOV), - MSM_DEVICE(UART1), - MSM_DEVICE(UART2), - MSM_DEVICE(UART3), - MSM_DEVICE(I2C), MSM_DEVICE(GPIO1), MSM_DEVICE(GPIO2), - MSM_DEVICE(HSUSB), MSM_DEVICE(CLK_CTL), - MSM_DEVICE(PMDH), - MSM_DEVICE(EMDH), - MSM_DEVICE(MDP), { - .virtual = MSM_SHARED_RAM_BASE, + .virtual = (unsigned long) MSM_SHARED_RAM_BASE, .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), .length = MSM_SHARED_RAM_SIZE, .type = MT_DEVICE, diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c index 04b8d182ff8a..69ca0dd79bdf 100644 --- a/arch/arm/mach-msm/irq.c +++ b/arch/arm/mach-msm/irq.c @@ -66,20 +66,20 @@ static void msm_irq_ack(unsigned int irq) { - unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); + void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); irq = 1 << (irq & 31); writel(irq, reg); } static void msm_irq_mask(unsigned int irq) { - unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); + void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); writel(1 << (irq & 31), reg); } static void msm_irq_unmask(unsigned int irq) { - unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); + void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); writel(1 << (irq & 31), reg); } @@ -90,8 +90,8 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on) static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) { - unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); - unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); + void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); + void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); int b = 1 << (irq & 31); if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c new file mode 100644 index 000000000000..915ee704ed3c --- /dev/null +++ b/arch/arm/mach-msm/proc_comm.c @@ -0,0 +1,110 @@ +/* arch/arm/mach-msm/proc_comm.c + * + * Copyright (C) 2007-2008 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <mach/msm_iomap.h> +#include <mach/system.h> + +#include "proc_comm.h" + +#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4) + +static inline void notify_other_proc_comm(void) +{ + writel(1, MSM_A2M_INT(6)); +} + +#define APP_COMMAND 0x00 +#define APP_STATUS 0x04 +#define APP_DATA1 0x08 +#define APP_DATA2 0x0C + +#define MDM_COMMAND 0x10 +#define MDM_STATUS 0x14 +#define MDM_DATA1 0x18 +#define MDM_DATA2 0x1C + +static DEFINE_SPINLOCK(proc_comm_lock); + +/* The higher level SMD support will install this to + * provide a way to check for and handle modem restart. + */ +int (*msm_check_for_modem_crash)(void); + +/* Poll for a state change, checking for possible + * modem crashes along the way (so we don't wait + * forever while the ARM9 is blowing up). + * + * Return an error in the event of a modem crash and + * restart so the msm_proc_comm() routine can restart + * the operation from the beginning. + */ +static int proc_comm_wait_for(void __iomem *addr, unsigned value) +{ + for (;;) { + if (readl(addr) == value) + return 0; + + if (msm_check_for_modem_crash) + if (msm_check_for_modem_crash()) + return -EAGAIN; + } +} + +int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2) +{ + void __iomem *base = MSM_SHARED_RAM_BASE; + unsigned long flags; + int ret; + + spin_lock_irqsave(&proc_comm_lock, flags); + + for (;;) { + if (proc_comm_wait_for(base + MDM_STATUS, PCOM_READY)) + continue; + + writel(cmd, base + APP_COMMAND); + writel(data1 ? *data1 : 0, base + APP_DATA1); + writel(data2 ? *data2 : 0, base + APP_DATA2); + + notify_other_proc_comm(); + + if (proc_comm_wait_for(base + APP_COMMAND, PCOM_CMD_DONE)) + continue; + + if (readl(base + APP_STATUS) != PCOM_CMD_FAIL) { + if (data1) + *data1 = readl(base + APP_DATA1); + if (data2) + *data2 = readl(base + APP_DATA2); + ret = 0; + } else { + ret = -EIO; + } + break; + } + + writel(PCOM_CMD_IDLE, base + APP_COMMAND); + + spin_unlock_irqrestore(&proc_comm_lock, flags); + + return ret; +} + + diff --git a/arch/arm/mach-msm/proc_comm.h b/arch/arm/mach-msm/proc_comm.h new file mode 100644 index 000000000000..834760f25692 --- /dev/null +++ b/arch/arm/mach-msm/proc_comm.h @@ -0,0 +1,165 @@ +/* arch/arm/mach-msm/proc_comm.h + * + * Copyright (c) 2007 QUALCOMM Incorporated + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_ +#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_ + +enum { + PCOM_CMD_IDLE = 0x0, + PCOM_CMD_DONE, + PCOM_RESET_APPS, + PCOM_RESET_CHIP, + PCOM_CONFIG_NAND_MPU, + PCOM_CONFIG_USB_CLKS, + PCOM_GET_POWER_ON_STATUS, + PCOM_GET_WAKE_UP_STATUS, + PCOM_GET_BATT_LEVEL, + PCOM_CHG_IS_CHARGING, + PCOM_POWER_DOWN, + PCOM_USB_PIN_CONFIG, + PCOM_USB_PIN_SEL, + PCOM_SET_RTC_ALARM, + PCOM_NV_READ, + PCOM_NV_WRITE, + PCOM_GET_UUID_HIGH, + PCOM_GET_UUID_LOW, + PCOM_GET_HW_ENTROPY, + PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE, + PCOM_CLKCTL_RPC_ENABLE, + PCOM_CLKCTL_RPC_DISABLE, + PCOM_CLKCTL_RPC_RESET, + PCOM_CLKCTL_RPC_SET_FLAGS, + PCOM_CLKCTL_RPC_SET_RATE, + PCOM_CLKCTL_RPC_MIN_RATE, + PCOM_CLKCTL_RPC_MAX_RATE, + PCOM_CLKCTL_RPC_RATE, + PCOM_CLKCTL_RPC_PLL_REQUEST, + PCOM_CLKCTL_RPC_ENABLED, + PCOM_VREG_SWITCH, + PCOM_VREG_SET_LEVEL, + PCOM_GPIO_TLMM_CONFIG_GROUP, + PCOM_GPIO_TLMM_UNCONFIG_GROUP, + PCOM_NV_WRITE_BYTES_4_7, + PCOM_CONFIG_DISP, + PCOM_GET_FTM_BOOT_COUNT, + PCOM_RPC_GPIO_TLMM_CONFIG_EX, + PCOM_PM_MPP_CONFIG, + PCOM_GPIO_IN, + PCOM_GPIO_OUT, + PCOM_RESET_MODEM, + PCOM_RESET_CHIP_IMM, + PCOM_PM_VID_EN, + PCOM_VREG_PULLDOWN, + PCOM_NUM_CMDS, +}; + +enum { + PCOM_INVALID_STATUS = 0x0, + PCOM_READY, + PCOM_CMD_RUNNING, + PCOM_CMD_SUCCESS, + PCOM_CMD_FAIL, +}; + +/* List of VREGs that support the Pull Down Resistor setting. */ +enum { + PM_VREG_PDOWN_MSMA_ID, + PM_VREG_PDOWN_MSMP_ID, + PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */ + PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */ + PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */ + PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_TCXO_ID, + PM_VREG_PDOWN_PA_ID, + PM_VREG_PDOWN_RFTX_ID, + PM_VREG_PDOWN_RFRX1_ID, + PM_VREG_PDOWN_RFRX2_ID, + PM_VREG_PDOWN_SYNT_ID, + PM_VREG_PDOWN_WLAN_ID, + PM_VREG_PDOWN_USB_ID, + PM_VREG_PDOWN_MMC_ID, + PM_VREG_PDOWN_RUIM_ID, + PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */ + PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */ + PM_VREG_PDOWN_RF_ID, + PM_VREG_PDOWN_RF_VCO_ID, + PM_VREG_PDOWN_MPLL_ID, + PM_VREG_PDOWN_S2_ID, + PM_VREG_PDOWN_S3_ID, + PM_VREG_PDOWN_RFUBM_ID, + + /* new for HAN */ + PM_VREG_PDOWN_RF1_ID, + PM_VREG_PDOWN_RF2_ID, + PM_VREG_PDOWN_RFA_ID, + PM_VREG_PDOWN_CDC2_ID, + PM_VREG_PDOWN_RFTX2_ID, + PM_VREG_PDOWN_USIM_ID, + PM_VREG_PDOWN_USB2P6_ID, + PM_VREG_PDOWN_USB3P3_ID, + PM_VREG_PDOWN_INVALID_ID, + + /* backward compatible enums only */ + PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID, + PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID, + PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID, + PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID, + PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID, + PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID, + + PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID, + PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID, + PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID, + PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID, + PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID +}; + +/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */ + +#define GPIO_ENABLE 0 +#define GPIO_DISABLE 1 + +#define GPIO_INPUT 0 +#define GPIO_OUTPUT 1 + +#define GPIO_NO_PULL 0 +#define GPIO_PULL_DOWN 1 +#define GPIO_KEEPER 2 +#define GPIO_PULL_UP 3 + +#define GPIO_2MA 0 +#define GPIO_4MA 1 +#define GPIO_6MA 2 +#define GPIO_8MA 3 +#define GPIO_10MA 4 +#define GPIO_12MA 5 +#define GPIO_14MA 6 +#define GPIO_16MA 7 + +#define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \ + ((((gpio) & 0x3FF) << 4) | \ + ((func) & 0xf) | \ + (((dir) & 0x1) << 14) | \ + (((pull) & 0x3) << 15) | \ + (((drvstr) & 0xF) << 17)) + +int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2); + +#endif diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 2bffe9b7e9fe..345a14cb73c3 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -45,7 +45,7 @@ struct msm_clock { struct clock_event_device clockevent; struct clocksource clocksource; struct irqaction irq; - uint32_t regbase; + void __iomem *regbase; uint32_t freq; uint32_t shift; }; diff --git a/arch/arm/mach-msm/vreg.c b/arch/arm/mach-msm/vreg.c new file mode 100644 index 000000000000..fcb0b9f25684 --- /dev/null +++ b/arch/arm/mach-msm/vreg.c @@ -0,0 +1,143 @@ +/* arch/arm/mach-msm/vreg.c + * + * Copyright (C) 2008 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/init.h> +#include <linux/debugfs.h> +#include <mach/vreg.h> + +#include "proc_comm.h" + +struct vreg { + const char *name; + unsigned id; +}; + +#define VREG(_name, _id) { .name = _name, .id = _id, } + +static struct vreg vregs[] = { + VREG("msma", 0), + VREG("msmp", 1), + VREG("msme1", 2), + VREG("msmc1", 3), + VREG("msmc2", 4), + VREG("gp3", 5), + VREG("msme2", 6), + VREG("gp4", 7), + VREG("gp1", 8), + VREG("tcxo", 9), + VREG("pa", 10), + VREG("rftx", 11), + VREG("rfrx1", 12), + VREG("rfrx2", 13), + VREG("synt", 14), + VREG("wlan", 15), + VREG("usb", 16), + VREG("boost", 17), + VREG("mmc", 18), + VREG("ruim", 19), + VREG("msmc0", 20), + VREG("gp2", 21), + VREG("gp5", 22), + VREG("gp6", 23), + VREG("rf", 24), + VREG("rf_vco", 26), + VREG("mpll", 27), + VREG("s2", 28), + VREG("s3", 29), + VREG("rfubm", 30), + VREG("ncp", 31), +}; + +struct vreg *vreg_get(struct device *dev, const char *id) +{ + int n; + for (n = 0; n < ARRAY_SIZE(vregs); n++) { + if (!strcmp(vregs[n].name, id)) + return vregs + n; + } + return 0; +} + +void vreg_put(struct vreg *vreg) +{ +} + +int vreg_enable(struct vreg *vreg) +{ + unsigned id = vreg->id; + unsigned enable = 1; + return msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); +} + +void vreg_disable(struct vreg *vreg) +{ + unsigned id = vreg->id; + unsigned enable = 0; + msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); +} + +int vreg_set_level(struct vreg *vreg, unsigned mv) +{ + unsigned id = vreg->id; + return msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv); +} + +#if defined(CONFIG_DEBUG_FS) + +static int vreg_debug_set(void *data, u64 val) +{ + struct vreg *vreg = data; + switch (val) { + case 0: + vreg_disable(vreg); + break; + case 1: + vreg_enable(vreg); + break; + default: + vreg_set_level(vreg, val); + break; + } + return 0; +} + +static int vreg_debug_get(void *data, u64 *val) +{ + return -ENOSYS; +} + +DEFINE_SIMPLE_ATTRIBUTE(vreg_fops, vreg_debug_get, vreg_debug_set, "%llu\n"); + +static int __init vreg_debug_init(void) +{ + struct dentry *dent; + int n; + + dent = debugfs_create_dir("vreg", 0); + if (IS_ERR(dent)) + return 0; + + for (n = 0; n < ARRAY_SIZE(vregs); n++) + (void) debugfs_create_file(vregs[n].name, 0644, + dent, vregs + n, &vreg_fops); + + return 0; +} + +device_initcall(vreg_debug_init); +#endif diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index f781873431f3..a062235e83a8 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -71,6 +71,14 @@ config PXA_SHARPSL SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) handheld computer. +config CORGI_SSP_DEPRECATED + bool + select PXA_SSP + help + This option will include corgi_ssp.c and corgi_lcd.c + that corgi_ts.c and other legacy drivers (corgi_bl.c + and sharpsl_pm.c) may depend on. + config MACH_POODLE bool "Enable Sharp SL-5600 (Poodle) Support" depends on PXA_SHARPSL diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index d31c9979cfa3..d64c68b232e3 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o obj-$(CONFIG_MACH_COLIBRI) += colibri.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o +obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o obj-$(CONFIG_MACH_POODLE) += poodle.o obj-$(CONFIG_MACH_PCM027) += pcm027.o obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c new file mode 100644 index 000000000000..411607bc1fc2 --- /dev/null +++ b/arch/arm/mach-pxa/corgi_lcd.c @@ -0,0 +1,289 @@ +/* + * linux/arch/arm/mach-pxa/corgi_lcd.c + * + * Corgi/Spitz LCD Specific Code + * + * Copyright (C) 2005 Richard Purdie + * + * Connectivity: + * Corgi - LCD to ATI Imageon w100 (Wallaby) + * Spitz - LCD to PXA Framebuffer + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/delay.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/module.h> +#include <linux/string.h> +#include <mach/corgi.h> +#include <mach/hardware.h> +#include <mach/pxa-regs.h> +#include <mach/sharpsl.h> +#include <mach/spitz.h> +#include <asm/hardware/scoop.h> +#include <asm/mach/sharpsl_param.h> +#include "generic.h" + +/* Register Addresses */ +#define RESCTL_ADRS 0x00 +#define PHACTRL_ADRS 0x01 +#define DUTYCTRL_ADRS 0x02 +#define POWERREG0_ADRS 0x03 +#define POWERREG1_ADRS 0x04 +#define GPOR3_ADRS 0x05 +#define PICTRL_ADRS 0x06 +#define POLCTRL_ADRS 0x07 + +/* Register Bit Definitions */ +#define RESCTL_QVGA 0x01 +#define RESCTL_VGA 0x00 + +#define POWER1_VW_ON 0x01 /* VW Supply FET ON */ +#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */ +#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */ + +#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */ +#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */ +#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */ + +#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ +#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */ +#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */ +#define POWER0_COM_ON 0x08 /* COM Power Supply ON */ +#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */ + +#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */ +#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */ +#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */ + +#define PICTRL_INIT_STATE 0x01 +#define PICTRL_INIOFF 0x02 +#define PICTRL_POWER_DOWN 0x04 +#define PICTRL_COM_SIGNAL_OFF 0x08 +#define PICTRL_DAC_SIGNAL_OFF 0x10 + +#define POLCTRL_SYNC_POL_FALL 0x01 +#define POLCTRL_EN_POL_FALL 0x02 +#define POLCTRL_DATA_POL_FALL 0x04 +#define POLCTRL_SYNC_ACT_H 0x08 +#define POLCTRL_EN_ACT_L 0x10 + +#define POLCTRL_SYNC_POL_RISE 0x00 +#define POLCTRL_EN_POL_RISE 0x00 +#define POLCTRL_DATA_POL_RISE 0x00 +#define POLCTRL_SYNC_ACT_L 0x00 +#define POLCTRL_EN_ACT_H 0x00 + +#define PHACTRL_PHASE_MANUAL 0x01 +#define DEFAULT_PHAD_QVGA (9) +#define DEFAULT_COMADJ (125) + +/* + * This is only a psuedo I2C interface. We can't use the standard kernel + * routines as the interface is write only. We just assume the data is acked... + */ +static void lcdtg_ssp_i2c_send(u8 data) +{ + corgi_ssp_lcdtg_send(POWERREG0_ADRS, data); + udelay(10); +} + +static void lcdtg_i2c_send_bit(u8 data) +{ + lcdtg_ssp_i2c_send(data); + lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK); + lcdtg_ssp_i2c_send(data); +} + +static void lcdtg_i2c_send_start(u8 base) +{ + lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT); + lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK); + lcdtg_ssp_i2c_send(base); +} + +static void lcdtg_i2c_send_stop(u8 base) +{ + lcdtg_ssp_i2c_send(base); + lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK); + lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT); +} + +static void lcdtg_i2c_send_byte(u8 base, u8 data) +{ + int i; + for (i = 0; i < 8; i++) { + if (data & 0x80) + lcdtg_i2c_send_bit(base | POWER0_COM_DOUT); + else + lcdtg_i2c_send_bit(base); + data <<= 1; + } +} + +static void lcdtg_i2c_wait_ack(u8 base) +{ + lcdtg_i2c_send_bit(base); +} + +static void lcdtg_set_common_voltage(u8 base_data, u8 data) +{ + /* Set Common Voltage to M62332FP via I2C */ + lcdtg_i2c_send_start(base_data); + lcdtg_i2c_send_byte(base_data, 0x9c); + lcdtg_i2c_wait_ack(base_data); + lcdtg_i2c_send_byte(base_data, 0x00); + lcdtg_i2c_wait_ack(base_data); + lcdtg_i2c_send_byte(base_data, data); + lcdtg_i2c_wait_ack(base_data); + lcdtg_i2c_send_stop(base_data); +} + +/* Set Phase Adjust */ +static void lcdtg_set_phadadj(int mode) +{ + int adj; + switch(mode) { + case 480: + case 640: + /* Setting for VGA */ + adj = sharpsl_param.phadadj; + if (adj < 0) { + adj = PHACTRL_PHASE_MANUAL; + } else { + adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL; + } + break; + case 240: + case 320: + default: + /* Setting for QVGA */ + adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL; + break; + } + + corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj); +} + +static int lcd_inited; + +void corgi_lcdtg_hw_init(int mode) +{ + if (!lcd_inited) { + int comadj; + + /* Initialize Internal Logic & Port */ + corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE + | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF); + + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF + | POWER0_COM_OFF | POWER0_VCC5_OFF); + + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF); + + /* VDD(+8V), SVSS(-4V) ON */ + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON); + mdelay(3); + + /* DAC ON */ + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON + | POWER0_COM_OFF | POWER0_VCC5_OFF); + + /* INIB = H, INI = L */ + /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */ + corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF); + + /* Set Common Voltage */ + comadj = sharpsl_param.comadj; + if (comadj < 0) + comadj = DEFAULT_COMADJ; + lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj); + + /* VCC5 ON, DAC ON */ + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | + POWER0_COM_OFF | POWER0_VCC5_ON); + + /* GVSS(-8V) ON, VDD ON */ + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON); + mdelay(2); + + /* COM SIGNAL ON (PICTL[3] = L) */ + corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE); + + /* COM ON, DAC ON, VCC5_ON */ + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON + | POWER0_COM_ON | POWER0_VCC5_ON); + + /* VW ON, GVSS ON, VDD ON */ + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON); + + /* Signals output enable */ + corgi_ssp_lcdtg_send(PICTRL_ADRS, 0); + + /* Set Phase Adjust */ + lcdtg_set_phadadj(mode); + + /* Initialize for Input Signals from ATI */ + corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE + | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H); + udelay(1000); + + lcd_inited=1; + } else { + lcdtg_set_phadadj(mode); + } + + switch(mode) { + case 480: + case 640: + /* Set Lcd Resolution (VGA) */ + corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA); + break; + case 240: + case 320: + default: + /* Set Lcd Resolution (QVGA) */ + corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA); + break; + } +} + +void corgi_lcdtg_suspend(void) +{ + /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */ + mdelay(34); + + /* (1)VW OFF */ + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON); + + /* (2)COM OFF */ + corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF); + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON); + + /* (3)Set Common Voltage Bias 0V */ + lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0); + + /* (4)GVSS OFF */ + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON); + + /* (5)VCC5 OFF */ + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF); + + /* (6)Set PDWN, INIOFF, DACOFF */ + corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF | + PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF); + + /* (7)DAC OFF */ + corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF); + + /* (8)VDD OFF */ + corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF); + + lcd_inited = 0; +} + diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c new file mode 100644 index 000000000000..8e2f2215c4ba --- /dev/null +++ b/arch/arm/mach-pxa/corgi_ssp.c @@ -0,0 +1,276 @@ +/* + * SSP control code for Sharp Corgi devices + * + * Copyright (c) 2004-2005 Richard Purdie + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/platform_device.h> +#include <mach/hardware.h> +#include <asm/mach-types.h> + +#include <mach/ssp.h> +#include <mach/pxa-regs.h> +#include <mach/pxa2xx-gpio.h> +#include <mach/regs-ssp.h> +#include "sharpsl.h" + +static DEFINE_SPINLOCK(corgi_ssp_lock); +static struct ssp_dev corgi_ssp_dev; +static struct ssp_state corgi_ssp_state; +static struct corgissp_machinfo *ssp_machinfo; + +/* + * There are three devices connected to the SSP interface: + * 1. A touchscreen controller (TI ADS7846 compatible) + * 2. An LCD controller (with some Backlight functionality) + * 3. A battery monitoring IC (Maxim MAX1111) + * + * Each device uses a different speed/mode of communication. + * + * The touchscreen is very sensitive and the most frequently used + * so the port is left configured for this. + * + * Devices are selected using Chip Selects on GPIOs. + */ + +/* + * ADS7846 Routines + */ +unsigned long corgi_ssp_ads7846_putget(ulong data) +{ + unsigned long flag; + u32 ret = 0; + + spin_lock_irqsave(&corgi_ssp_lock, flag); + if (ssp_machinfo->cs_ads7846 >= 0) + GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + + ssp_write_word(&corgi_ssp_dev,data); + ssp_read_word(&corgi_ssp_dev, &ret); + + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + spin_unlock_irqrestore(&corgi_ssp_lock, flag); + + return ret; +} + +/* + * NOTE: These functions should always be called in interrupt context + * and use the _lock and _unlock functions. They are very time sensitive. + */ +void corgi_ssp_ads7846_lock(void) +{ + spin_lock(&corgi_ssp_lock); + if (ssp_machinfo->cs_ads7846 >= 0) + GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); +} + +void corgi_ssp_ads7846_unlock(void) +{ + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + spin_unlock(&corgi_ssp_lock); +} + +void corgi_ssp_ads7846_put(ulong data) +{ + ssp_write_word(&corgi_ssp_dev,data); +} + +unsigned long corgi_ssp_ads7846_get(void) +{ + u32 ret = 0; + ssp_read_word(&corgi_ssp_dev, &ret); + return ret; +} + +EXPORT_SYMBOL(corgi_ssp_ads7846_putget); +EXPORT_SYMBOL(corgi_ssp_ads7846_lock); +EXPORT_SYMBOL(corgi_ssp_ads7846_unlock); +EXPORT_SYMBOL(corgi_ssp_ads7846_put); +EXPORT_SYMBOL(corgi_ssp_ads7846_get); + + +/* + * LCD/Backlight Routines + */ +unsigned long corgi_ssp_dac_put(ulong data) +{ + unsigned long flag, sscr1 = SSCR1_SPH; + u32 tmp; + + spin_lock_irqsave(&corgi_ssp_lock, flag); + + if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi()) + sscr1 = 0; + + ssp_disable(&corgi_ssp_dev); + ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon)); + ssp_enable(&corgi_ssp_dev); + + if (ssp_machinfo->cs_lcdcon >= 0) + GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); + ssp_write_word(&corgi_ssp_dev,data); + /* Read null data back from device to prevent SSP overflow */ + ssp_read_word(&corgi_ssp_dev, &tmp); + if (ssp_machinfo->cs_lcdcon >= 0) + GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); + + ssp_disable(&corgi_ssp_dev); + ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); + ssp_enable(&corgi_ssp_dev); + + spin_unlock_irqrestore(&corgi_ssp_lock, flag); + + return 0; +} + +void corgi_ssp_lcdtg_send(u8 adrs, u8 data) +{ + corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f)); +} + +void corgi_ssp_blduty_set(int duty) +{ + corgi_ssp_lcdtg_send(0x02,duty); +} + +EXPORT_SYMBOL(corgi_ssp_lcdtg_send); +EXPORT_SYMBOL(corgi_ssp_blduty_set); + +/* + * Max1111 Routines + */ +int corgi_ssp_max1111_get(ulong data) +{ + unsigned long flag; + long voltage = 0, voltage1 = 0, voltage2 = 0; + + spin_lock_irqsave(&corgi_ssp_lock, flag); + if (ssp_machinfo->cs_max1111 >= 0) + GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); + ssp_disable(&corgi_ssp_dev); + ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111)); + ssp_enable(&corgi_ssp_dev); + + udelay(1); + + /* TB1/RB1 */ + ssp_write_word(&corgi_ssp_dev,data); + ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */ + + /* TB12/RB2 */ + ssp_write_word(&corgi_ssp_dev,0); + ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); + + /* TB13/RB3*/ + ssp_write_word(&corgi_ssp_dev,0); + ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2); + + ssp_disable(&corgi_ssp_dev); + ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); + ssp_enable(&corgi_ssp_dev); + if (ssp_machinfo->cs_max1111 >= 0) + GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); + spin_unlock_irqrestore(&corgi_ssp_lock, flag); + + if (voltage1 & 0xc0 || voltage2 & 0x3f) + voltage = -1; + else + voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03); + + return voltage; +} + +EXPORT_SYMBOL(corgi_ssp_max1111_get); + +/* + * Support Routines + */ + +void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo) +{ + ssp_machinfo = machinfo; +} + +static int __init corgi_ssp_probe(struct platform_device *dev) +{ + int ret; + + /* Chip Select - Disable All */ + if (ssp_machinfo->cs_lcdcon >= 0) + pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_max1111 >= 0) + pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_ads7846 >= 0) + pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); + + ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0); + + if (ret) + printk(KERN_ERR "Unable to register SSP handler!\n"); + else { + ssp_disable(&corgi_ssp_dev); + ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); + ssp_enable(&corgi_ssp_dev); + } + + return ret; +} + +static int corgi_ssp_remove(struct platform_device *dev) +{ + ssp_exit(&corgi_ssp_dev); + return 0; +} + +static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state) +{ + ssp_flush(&corgi_ssp_dev); + ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state); + + return 0; +} + +static int corgi_ssp_resume(struct platform_device *dev) +{ + if (ssp_machinfo->cs_lcdcon >= 0) + GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ + if (ssp_machinfo->cs_max1111 >= 0) + GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ + ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state); + ssp_enable(&corgi_ssp_dev); + + return 0; +} + +static struct platform_driver corgissp_driver = { + .probe = corgi_ssp_probe, + .remove = corgi_ssp_remove, + .suspend = corgi_ssp_suspend, + .resume = corgi_ssp_resume, + .driver = { + .name = "corgi-ssp", + }, +}; + +int __init corgi_ssp_init(void) +{ + return platform_driver_register(&corgissp_driver); +} + +arch_initcall(corgi_ssp_init); diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h index 585970ef08ce..7239281788de 100644 --- a/arch/arm/mach-pxa/include/mach/corgi.h +++ b/arch/arm/mach-pxa/include/mach/corgi.h @@ -113,6 +113,7 @@ * Shared data structures */ extern struct platform_device corgiscoop_device; +extern struct platform_device corgissp_device; #endif /* __ASM_ARCH_CORGI_H */ diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h index e8488dfb7e91..fa1998caa78e 100644 --- a/arch/arm/mach-pxa/include/mach/spitz.h +++ b/arch/arm/mach-pxa/include/mach/spitz.h @@ -187,4 +187,5 @@ */ extern struct platform_device spitzscoop_device; extern struct platform_device spitzscoop2_device; +extern struct platform_device spitzssp_device; extern struct sharpsl_charger_machinfo spitz_pm_machinfo; diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h index 8bce6d8615b9..4df2d38507dc 100644 --- a/arch/arm/mach-pxa/include/mach/tosa.h +++ b/arch/arm/mach-pxa/include/mach/tosa.h @@ -193,4 +193,7 @@ #define TOSA_KEY_MAIL KEY_MAIL #endif +struct spi_device; +extern int tosa_bl_enable(struct spi_device *spi, int enable); + #endif /* _ASM_ARCH_TOSA_H_ */ diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index 15c2f1a8623b..f0845c1b001c 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -116,20 +116,33 @@ struct battery_thresh spitz_battery_levels_noac[] = { { 0, 0}, }; +/* MAX1111 Commands */ +#define MAXCTRL_PD0 1u << 0 +#define MAXCTRL_PD1 1u << 1 +#define MAXCTRL_SGL 1u << 2 +#define MAXCTRL_UNI 1u << 3 +#define MAXCTRL_SEL_SH 4 +#define MAXCTRL_STR 1u << 7 + /* * Read MAX1111 ADC */ -extern int max1111_read_channel(int); - int sharpsl_pm_pxa_read_max1111(int channel) { if (machine_is_tosa()) // Ugly, better move this function into another module return 0; +#ifdef CONFIG_CORGI_SSP_DEPRECATED + return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 + | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); +#else + extern int max1111_read_channel(int); + /* max1111 accepts channels from 0-3, however, * it is encoded from 0-7 here in the code. */ return max1111_read_channel(channel >> 1); +#endif } void sharpsl_pm_pxa_init(void) diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index a6c4694359ca..224897a67d15 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -31,6 +31,7 @@ #include <linux/gpio.h> #include <linux/pda_power.h> #include <linux/rfkill.h> +#include <linux/spi/spi.h> #include <asm/setup.h> #include <asm/mach-types.h> @@ -42,6 +43,7 @@ #include <mach/mmc.h> #include <mach/udc.h> #include <mach/tosa_bt.h> +#include <mach/pxa2xx_spi.h> #include <asm/mach/arch.h> #include <mach/tosa.h> @@ -612,7 +614,7 @@ static int tosa_tc6393xb_enable(struct platform_device *dev) rc = gpio_request(TOSA_GPIO_TC6393XB_SUSPEND, "tc6393xb #suspend"); if (rc) goto err_req_suspend; - rc = gpio_request(TOSA_GPIO_TC6393XB_L3V_ON, "l3v"); + rc = gpio_request(TOSA_GPIO_TC6393XB_L3V_ON, "tc6393xb l3v"); if (rc) goto err_req_l3v; rc = gpio_direction_output(TOSA_GPIO_TC6393XB_L3V_ON, 0); @@ -772,6 +774,20 @@ static struct platform_device tosa_bt_device = { .dev.platform_data = &tosa_bt_data, }; +static struct pxa2xx_spi_master pxa_ssp_master_info = { + .num_chipselect = 1, +}; + +static struct spi_board_info spi_board_info[] __initdata = { + { + .modalias = "tosa-lcd", + // .platform_data + .max_speed_hz = 28750, + .bus_num = 2, + .chip_select = 0, + .mode = SPI_MODE_0, + }, +}; static struct platform_device *devices[] __initdata = { &tosascoop_device, @@ -826,6 +842,9 @@ static void __init tosa_init(void) pxa_set_i2c_info(NULL); platform_scoop_config = &tosa_pcmcia_config; + pxa2xx_set_spi_info(2, &pxa_ssp_master_info); + spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); + clk_add_alias("CLK_CK3P6MI", &tc6393xb_device.dev, "GPIO11_CLK", NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index d1193884d76d..ab5f7a21350b 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -400,9 +400,9 @@ config CPU_FEROCEON_OLD_ID # ARMv6 config CPU_V6 bool "Support ARM V6 processor" - depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM7X00A || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 default y if ARCH_MX3 - default y if ARCH_MSM7X00A + default y if ARCH_MSM select CPU_32v6 select CPU_ABRT_EV6 select CPU_PABRT_NOIFAR diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 34e424041927..07f82db70945 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -180,8 +180,8 @@ __v7_setup: mov r10, #0x1f @ domains 0, 1 = manager mcr p15, 0, r10, c3, c0, 0 @ load domain access register #endif - ldr r5, =0x40e040e0 - ldr r6, =0xff0aa1a8 + ldr r5, =0xff0aa1a8 + ldr r6, =0x40e040e0 mcr p15, 0, r5, c10, c2, 0 @ write PRRR mcr p15, 0, r6, c10, c2, 1 @ write NMRR adr r5, v7_crval diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5f149b030c0f..653574bc19cf 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -238,21 +238,8 @@ config MIPS_SIM This option enables support for MIPS Technologies MIPSsim software emulator. -config MARKEINS - bool "NEC EMMA2RH Mark-eins" - select CEVT_R4K - select CSRC_R4K - select DMA_NONCOHERENT - select HW_HAS_PCI - select IRQ_CPU - select SWAP_IO_SPACE - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_HAS_CPU_R5000 - help - This enables support for the R5432-based NEC Mark-eins - boards with R5500 CPU. +config MACH_EMMA + bool "NEC EMMA series based machines" config MACH_VR41XX bool "NEC VR4100 series based machines" @@ -261,6 +248,19 @@ config MACH_VR41XX select SYS_HAS_CPU_VR41XX select GENERIC_HARDIRQS_NO__DO_IRQ +config NXP_STB220 + bool "NXP STB220 board" + select SOC_PNX833X + help + Support for NXP Semiconductors STB220 Development Board. + +config NXP_STB225 + bool "NXP 225 board" + select SOC_PNX833X + select SOC_PNX8335 + help + Support for NXP Semiconductors STB225 Development Board. + config PNX8550_JBS bool "NXP PNX8550 based JBS board" select PNX8550 @@ -601,6 +601,7 @@ endchoice source "arch/mips/alchemy/Kconfig" source "arch/mips/basler/excite/Kconfig" +source "arch/mips/emma/Kconfig" source "arch/mips/jazz/Kconfig" source "arch/mips/lasat/Kconfig" source "arch/mips/pmc-sierra/Kconfig" @@ -849,6 +850,24 @@ config MIPS_RM9122 bool select SERIAL_RM9000 +config SOC_PNX833X + bool + select CEVT_R4K + select CSRC_R4K + select IRQ_CPU + select DMA_NONCOHERENT + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_BIG_ENDIAN + select GENERIC_HARDIRQS_NO__DO_IRQ + select GENERIC_GPIO + select CPU_MIPSR2_IRQ_VI + +config SOC_PNX8335 + bool + select SOC_PNX833X + config PNX8550 bool select SOC_PNX8550 @@ -1092,6 +1111,16 @@ config CPU_R5432 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL +config CPU_R5500 + bool "R5500" + depends on SYS_HAS_CPU_R5500 + select CPU_HAS_LLSC + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + help + NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV + instruction set. + config CPU_R6000 bool "R6000" depends on EXPERIMENTAL @@ -1202,6 +1231,9 @@ config SYS_HAS_CPU_R5000 config SYS_HAS_CPU_R5432 bool +config SYS_HAS_CPU_R5500 + bool + config SYS_HAS_CPU_R6000 bool diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 7f39fd8a91fe..28c55f608913 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -131,6 +131,8 @@ cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_ cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \ -Wa,--trap +cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \ + -Wa,--trap cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \ -Wa,--trap cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \ @@ -381,6 +383,14 @@ load-$(CONFIG_CASIO_E55) += 0xffffffff80004000 # load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 +# NXP STB225 +core-$(CONFIG_SOC_PNX833X) += arch/mips/nxp/pnx833x/common/ +cflags-$(CONFIG_SOC_PNX833X) += -Iarch/mips/include/asm/mach-pnx833x +libs-$(CONFIG_NXP_STB220) += arch/mips/nxp/pnx833x/stb22x/ +load-$(CONFIG_NXP_STB220) += 0xffffffff80001000 +libs-$(CONFIG_NXP_STB225) += arch/mips/nxp/pnx833x/stb22x/ +load-$(CONFIG_NXP_STB225) += 0xffffffff80001000 + # # Common NXP PNX8550 # @@ -399,14 +409,17 @@ load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000 libs-$(CONFIG_PNX8550_STB810) += arch/mips/nxp/pnx8550/stb810/ load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000 -# NEC EMMA2RH boards # -core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/ -cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh +# Common NEC EMMAXXX +# +core-$(CONFIG_SOC_EMMA) += arch/mips/emma/common/ +cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh +# # NEC EMMA2RH Mark-eins -core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/ -load-$(CONFIG_MARKEINS) += 0xffffffff88100000 +# +core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/ +load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000 # # SGI IP22 (Indy/Indigo2) diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index dc8a67efac28..5c76c6448e04 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c @@ -17,6 +17,8 @@ #include <linux/init.h> #include <asm/mach-au1x00/au1xxx.h> +#include <asm/mach-au1x00/au1xxx_dbdma.h> +#include <asm/mach-au1x00/au1100_mmc.h> #define PORT(_base, _irq) \ { \ @@ -163,24 +165,6 @@ static struct resource au1xxx_usb_gdt_resources[] = { }, }; -static struct resource au1xxx_mmc_resources[] = { - [0] = { - .start = SD0_PHYS_ADDR, - .end = SD0_PHYS_ADDR + 0x7ffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = SD1_PHYS_ADDR, - .end = SD1_PHYS_ADDR + 0x7ffff, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = AU1200_SD_INT, - .end = AU1200_SD_INT, - .flags = IORESOURCE_IRQ, - } -}; - static u64 udc_dmamask = DMA_32BIT_MASK; static struct platform_device au1xxx_usb_gdt_device = { @@ -249,16 +233,79 @@ static struct platform_device au1200_lcd_device = { static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK; -static struct platform_device au1xxx_mmc_device = { +extern struct au1xmmc_platform_data au1xmmc_platdata[2]; + +static struct resource au1200_mmc0_resources[] = { + [0] = { + .start = SD0_PHYS_ADDR, + .end = SD0_PHYS_ADDR + 0x7ffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = DSCR_CMD0_SDMS_TX0, + .end = DSCR_CMD0_SDMS_TX0, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = DSCR_CMD0_SDMS_RX0, + .end = DSCR_CMD0_SDMS_RX0, + .flags = IORESOURCE_DMA, + } +}; + +static struct platform_device au1200_mmc0_device = { .name = "au1xxx-mmc", .id = 0, .dev = { - .dma_mask = &au1xxx_mmc_dmamask, - .coherent_dma_mask = DMA_32BIT_MASK, + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_32BIT_MASK, + .platform_data = &au1xmmc_platdata[0], }, - .num_resources = ARRAY_SIZE(au1xxx_mmc_resources), - .resource = au1xxx_mmc_resources, + .num_resources = ARRAY_SIZE(au1200_mmc0_resources), + .resource = au1200_mmc0_resources, }; + +#ifndef CONFIG_MIPS_DB1200 +static struct resource au1200_mmc1_resources[] = { + [0] = { + .start = SD1_PHYS_ADDR, + .end = SD1_PHYS_ADDR + 0x7ffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = DSCR_CMD0_SDMS_TX1, + .end = DSCR_CMD0_SDMS_TX1, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = DSCR_CMD0_SDMS_RX1, + .end = DSCR_CMD0_SDMS_RX1, + .flags = IORESOURCE_DMA, + } +}; + +static struct platform_device au1200_mmc1_device = { + .name = "au1xxx-mmc", + .id = 1, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_32BIT_MASK, + .platform_data = &au1xmmc_platdata[1], + }, + .num_resources = ARRAY_SIZE(au1200_mmc1_resources), + .resource = au1200_mmc1_resources, +}; +#endif /* #ifndef CONFIG_MIPS_DB1200 */ #endif /* #ifdef CONFIG_SOC_AU1200 */ static struct platform_device au1x00_pcmcia_device = { @@ -296,7 +343,10 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { &au1xxx_usb_gdt_device, &au1xxx_usb_otg_device, &au1200_lcd_device, - &au1xxx_mmc_device, + &au1200_mmc0_device, +#ifndef CONFIG_MIPS_DB1200 + &au1200_mmc1_device, +#endif #endif #ifdef SMBUS_PSC_BASE &pbdb_smbus_device, diff --git a/arch/mips/alchemy/pb1200/platform.c b/arch/mips/alchemy/pb1200/platform.c index f8fb0aeac571..95303297c534 100644 --- a/arch/mips/alchemy/pb1200/platform.c +++ b/arch/mips/alchemy/pb1200/platform.c @@ -20,9 +20,90 @@ #include <linux/dma-mapping.h> #include <linux/init.h> +#include <linux/leds.h> #include <linux/platform_device.h> #include <asm/mach-au1x00/au1xxx.h> +#include <asm/mach-au1x00/au1100_mmc.h> + +static int mmc_activity; + +static void pb1200mmc0_set_power(void *mmc_host, int state) +{ + if (state) + bcsr->board |= BCSR_BOARD_SD0PWR; + else + bcsr->board &= ~BCSR_BOARD_SD0PWR; + + au_sync_delay(1); +} + +static int pb1200mmc0_card_readonly(void *mmc_host) +{ + return (bcsr->status & BCSR_STATUS_SD0WP) ? 1 : 0; +} + +static int pb1200mmc0_card_inserted(void *mmc_host) +{ + return (bcsr->sig_status & BCSR_INT_SD0INSERT) ? 1 : 0; +} + +static void pb1200_mmcled_set(struct led_classdev *led, + enum led_brightness brightness) +{ + if (brightness != LED_OFF) { + if (++mmc_activity == 1) + bcsr->disk_leds &= ~(1 << 8); + } else { + if (--mmc_activity == 0) + bcsr->disk_leds |= (1 << 8); + } +} + +static struct led_classdev pb1200mmc_led = { + .brightness_set = pb1200_mmcled_set, +}; + +#ifndef CONFIG_MIPS_DB1200 +static void pb1200mmc1_set_power(void *mmc_host, int state) +{ + if (state) + bcsr->board |= BCSR_BOARD_SD1PWR; + else + bcsr->board &= ~BCSR_BOARD_SD1PWR; + + au_sync_delay(1); +} + +static int pb1200mmc1_card_readonly(void *mmc_host) +{ + return (bcsr->status & BCSR_STATUS_SD1WP) ? 1 : 0; +} + +static int pb1200mmc1_card_inserted(void *mmc_host) +{ + return (bcsr->sig_status & BCSR_INT_SD1INSERT) ? 1 : 0; +} +#endif + +const struct au1xmmc_platform_data au1xmmc_platdata[2] = { + [0] = { + .set_power = pb1200mmc0_set_power, + .card_inserted = pb1200mmc0_card_inserted, + .card_readonly = pb1200mmc0_card_readonly, + .cd_setup = NULL, /* use poll-timer in driver */ + .led = &pb1200mmc_led, + }, +#ifndef CONFIG_MIPS_DB1200 + [1] = { + .set_power = pb1200mmc1_set_power, + .card_inserted = pb1200mmc1_card_inserted, + .card_readonly = pb1200mmc1_card_readonly, + .cd_setup = NULL, /* use poll-timer in driver */ + .led = &pb1200mmc_led, + }, +#endif +}; static struct resource ide_resources[] = { [0] = { diff --git a/arch/mips/configs/pnx8335-stb225_defconfig b/arch/mips/configs/pnx8335-stb225_defconfig new file mode 100644 index 000000000000..d9536522cff5 --- /dev/null +++ b/arch/mips/configs/pnx8335-stb225_defconfig @@ -0,0 +1,1149 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26 +# Sat Jul 26 09:02:59 2008 +# +CONFIG_MIPS=y + +# +# Machine selection +# +# CONFIG_MACH_ALCHEMY is not set +# CONFIG_BASLER_EXCITE is not set +# CONFIG_BCM47XX is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_LEMOTE_FULONG is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MARKEINS is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +CONFIG_NXP_STB225=y +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_PMC_MSP is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SNI_RM is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_WR_PPMC is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_CEVT_R4K=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +# CONFIG_HOTPLUG_CPU is not set +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_GPIO=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_IRQ_CPU=y +CONFIG_SOC_PNX833X=y +CONFIG_SOC_PNX8335=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +# CONFIG_CPU_LOONGSON2 is not set +# CONFIG_CPU_MIPS32_R1 is not set +CONFIG_CPU_MIPS32_R2=y +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPSR2=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y + +# +# Kernel type +# +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_48 is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_128=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=128 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +# CONFIG_KEXEC is not set +# CONFIG_SECCOMP is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_CLASSIC_RCU=y + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_MMU=y +# CONFIG_PCCARD is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# Power management options +# +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_INET_AH=y +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +CONFIG_MTD_CFI_LE_BYTE_SWAP=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x18000000 +CONFIG_MTD_PHYSMAP_LEN=0x04000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=m +CONFIG_INPUT_EVBUG=m + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +# CONFIG_VT_CONSOLE is not set +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PNX8XXX=y +CONFIG_SERIAL_PNX8XXX_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +CONFIG_DVB_CORE=y +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_DVB_CAPTURE_DRIVERS=y +# CONFIG_TTPCI_EEPROM is not set +# CONFIG_DVB_B2C2_FLEXCOP is not set + +# +# Supported DVB Frontends +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_FE_CUSTOMISE is not set + +# +# DVB-S (satellite) frontends +# +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set + +# +# DVB-T (terrestrial) frontends +# +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_DRX397XD is not set +# CONFIG_DVB_L64781 is not set +CONFIG_DVB_TDA1004X=y +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_TDA10048 is not set + +# +# DVB-C (cable) frontends +# +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522 is not set +# CONFIG_DVB_S5H1411 is not set + +# +# Digital terrestrial only tuners/PLL +# +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set + +# +# SEC control devices for DVB-S +# +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +# CONFIG_SND_DEBUG_VERBOSE is not set +# CONFIG_SND_PCM_XRUN_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_MIPS=y +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set +CONFIG_USB_SUPPORT=y +# CONFIG_USB_ARCH_HAS_HCD is not set +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=m +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=m +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SAMPLES is not set +# CONFIG_KERNEL_TESTS is not set +CONFIG_CMDLINE="" + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_PRNG is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/mips/emma/Kconfig b/arch/mips/emma/Kconfig new file mode 100644 index 000000000000..9669c72123c9 --- /dev/null +++ b/arch/mips/emma/Kconfig @@ -0,0 +1,29 @@ +choice + prompt "Machine type" + depends on MACH_EMMA + default NEC_MARKEINS + +config NEC_MARKEINS + bool "NEC EMMA2RH Mark-eins board" + select SOC_EMMA2RH + select HW_HAS_PCI + help + This enables support for the NEC Electronics Mark-eins boards. + +endchoice + +config SOC_EMMA2RH + bool + select SOC_EMMA + select SYS_HAS_CPU_R5500 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + +config SOC_EMMA + bool + select CEVT_R4K + select CSRC_R4K + select DMA_NONCOHERENT + select IRQ_CPU + select SWAP_IO_SPACE + select SYS_SUPPORTS_BIG_ENDIAN diff --git a/arch/mips/emma2rh/common/Makefile b/arch/mips/emma/common/Makefile index 859121b3867d..c392d28c1ef1 100644 --- a/arch/mips/emma2rh/common/Makefile +++ b/arch/mips/emma/common/Makefile @@ -10,4 +10,4 @@ # (at your option) any later version. # -obj-$(CONFIG_MARKEINS) += irq.o irq_emma2rh.o prom.o +obj-$(CONFIG_NEC_MARKEINS) += prom.o diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma/common/prom.c index e14a2e3d8842..120f53fbdb45 100644 --- a/arch/mips/emma2rh/common/prom.c +++ b/arch/mips/emma/common/prom.c @@ -29,11 +29,11 @@ #include <asm/addrspace.h> #include <asm/bootinfo.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> const char *get_system_type(void) { -#if defined(CONFIG_MARKEINS) +#ifdef CONFIG_NEC_MARKEINS return "NEC EMMA2RH Mark-eins"; #else #error Unknown NEC board @@ -60,7 +60,7 @@ void __init prom_init(void) strcat(arcs_cmdline, " "); } -#if defined(CONFIG_MARKEINS) +#ifdef CONFIG_NEC_MARKEINS add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM); #else #error Unknown NEC board diff --git a/arch/mips/emma2rh/markeins/Makefile b/arch/mips/emma/markeins/Makefile index 14fc268b175c..16e0017ba919 100644 --- a/arch/mips/emma2rh/markeins/Makefile +++ b/arch/mips/emma/markeins/Makefile @@ -10,4 +10,4 @@ # (at your option) any later version. # -obj-$(CONFIG_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o +obj-$(CONFIG_NEC_MARKEINS) += irq.o setup.o led.o platform.o diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c new file mode 100644 index 000000000000..c2583ecc93cf --- /dev/null +++ b/arch/mips/emma/markeins/irq.c @@ -0,0 +1,331 @@ +/* + * arch/mips/emma2rh/markeins/irq.c + * This file defines the irq handler for EMMA2RH. + * + * Copyright (C) NEC Electronics Corporation 2004-2006 + * + * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/types.h> +#include <linux/ptrace.h> +#include <linux/delay.h> + +#include <asm/irq_cpu.h> +#include <asm/system.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/bootinfo.h> + +#include <asm/emma/emma2rh.h> + +static void emma2rh_irq_enable(unsigned int irq) +{ + u32 reg_value; + u32 reg_bitmask; + u32 reg_index; + + irq -= EMMA2RH_IRQ_BASE; + + reg_index = EMMA2RH_BHIF_INT_EN_0 + + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); + reg_value = emma2rh_in32(reg_index); + reg_bitmask = 0x1 << (irq % 32); + emma2rh_out32(reg_index, reg_value | reg_bitmask); +} + +static void emma2rh_irq_disable(unsigned int irq) +{ + u32 reg_value; + u32 reg_bitmask; + u32 reg_index; + + irq -= EMMA2RH_IRQ_BASE; + + reg_index = EMMA2RH_BHIF_INT_EN_0 + + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); + reg_value = emma2rh_in32(reg_index); + reg_bitmask = 0x1 << (irq % 32); + emma2rh_out32(reg_index, reg_value & ~reg_bitmask); +} + +struct irq_chip emma2rh_irq_controller = { + .name = "emma2rh_irq", + .ack = emma2rh_irq_disable, + .mask = emma2rh_irq_disable, + .mask_ack = emma2rh_irq_disable, + .unmask = emma2rh_irq_enable, +}; + +void emma2rh_irq_init(void) +{ + u32 i; + + for (i = 0; i < NUM_EMMA2RH_IRQ; i++) + set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i, + &emma2rh_irq_controller, + handle_level_irq); +} + +static void emma2rh_sw_irq_enable(unsigned int irq) +{ + u32 reg; + + irq -= EMMA2RH_SW_IRQ_BASE; + + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); +} + +static void emma2rh_sw_irq_disable(unsigned int irq) +{ + u32 reg; + + irq -= EMMA2RH_SW_IRQ_BASE; + + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); +} + +struct irq_chip emma2rh_sw_irq_controller = { + .name = "emma2rh_sw_irq", + .ack = emma2rh_sw_irq_disable, + .mask = emma2rh_sw_irq_disable, + .mask_ack = emma2rh_sw_irq_disable, + .unmask = emma2rh_sw_irq_enable, +}; + +void emma2rh_sw_irq_init(void) +{ + u32 i; + + for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++) + set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i, + &emma2rh_sw_irq_controller, + handle_level_irq); +} + +static void emma2rh_gpio_irq_enable(unsigned int irq) +{ + u32 reg; + + irq -= EMMA2RH_GPIO_IRQ_BASE; + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} + +static void emma2rh_gpio_irq_disable(unsigned int irq) +{ + u32 reg; + + irq -= EMMA2RH_GPIO_IRQ_BASE; + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} + +static void emma2rh_gpio_irq_ack(unsigned int irq) +{ + u32 reg; + + irq -= EMMA2RH_GPIO_IRQ_BASE; + emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} + +static void emma2rh_gpio_irq_end(unsigned int irq) +{ + u32 reg; + + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { + + irq -= EMMA2RH_GPIO_IRQ_BASE; + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); + } +} + +struct irq_chip emma2rh_gpio_irq_controller = { + .name = "emma2rh_gpio_irq", + .ack = emma2rh_gpio_irq_ack, + .mask = emma2rh_gpio_irq_disable, + .mask_ack = emma2rh_gpio_irq_ack, + .unmask = emma2rh_gpio_irq_enable, + .end = emma2rh_gpio_irq_end, +}; + +void emma2rh_gpio_irq_init(void) +{ + u32 i; + + for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) + set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i, + &emma2rh_gpio_irq_controller); +} + +static struct irqaction irq_cascade = { + .handler = no_action, + .flags = 0, + .mask = CPU_MASK_NONE, + .name = "cascade", + .dev_id = NULL, + .next = NULL, +}; + +/* + * the first level int-handler will jump here if it is a emma2rh irq + */ +void emma2rh_irq_dispatch(void) +{ + u32 intStatus; + u32 bitmask; + u32 i; + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) & + emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); + +#ifdef EMMA2RH_SW_CASCADE + if (intStatus & + (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { + u32 swIntStatus; + swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) + & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (swIntStatus & bitmask) { + do_IRQ(EMMA2RH_SW_IRQ_BASE + i); + return; + } + } + } +#endif + + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) & + emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); + +#ifdef EMMA2RH_GPIO_CASCADE + if (intStatus & + (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { + u32 gpioIntStatus; + gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) + & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (gpioIntStatus & bitmask) { + do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i); + return; + } + } + } +#endif + + for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) & + emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); + + for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } +} + +void __init arch_init_irq(void) +{ + u32 reg; + + /* by default, interrupts are disabled. */ + emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0); + emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0); + emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0); + emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0); + emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0); + emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0); + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0); + + clear_c0_status(0xff00); + set_c0_status(0x0400); + +#define GPIO_PCI (0xf<<15) + /* setup GPIO interrupt for PCI interface */ + /* direction input */ + reg = emma2rh_in32(EMMA2RH_GPIO_DIR); + emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI); + /* disable interrupt */ + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI); + /* level triggerd */ + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE); + emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI); + reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A); + emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI)); + /* interrupt clear */ + emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI); + + /* init all controllers */ + emma2rh_irq_init(); + emma2rh_sw_irq_init(); + emma2rh_gpio_irq_init(); + mips_cpu_irq_init(); + + /* setup cascade interrupts */ + setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); + setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade); + setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade); +} + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; + + if (pending & STATUSF_IP7) + do_IRQ(CPU_IRQ_BASE + 7); + else if (pending & STATUSF_IP2) + emma2rh_irq_dispatch(); + else if (pending & STATUSF_IP1) + do_IRQ(CPU_IRQ_BASE + 1); + else if (pending & STATUSF_IP0) + do_IRQ(CPU_IRQ_BASE + 0); + else + spurious_interrupt(); +} diff --git a/arch/mips/emma2rh/markeins/led.c b/arch/mips/emma/markeins/led.c index b65254c1bfe9..377a181b6561 100644 --- a/arch/mips/emma2rh/markeins/led.c +++ b/arch/mips/emma/markeins/led.c @@ -21,7 +21,7 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/string.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> const unsigned long clear = 0x20202020; diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma/markeins/platform.c index fb9cda253ab0..88e87f6b3442 100644 --- a/arch/mips/emma2rh/markeins/platform.c +++ b/arch/mips/emma/markeins/platform.c @@ -36,7 +36,7 @@ #include <asm/reboot.h> #include <asm/traps.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> #define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */ diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma/markeins/setup.c index b6a23ad539f8..67f456500084 100644 --- a/arch/mips/emma2rh/markeins/setup.c +++ b/arch/mips/emma/markeins/setup.c @@ -29,7 +29,7 @@ #include <asm/time.h> #include <asm/reboot.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> #define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */ diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c deleted file mode 100644 index 91cbd959ab67..000000000000 --- a/arch/mips/emma2rh/common/irq.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * arch/mips/emma2rh/common/irq.c - * This file is common irq dispatcher. - * - * Copyright (C) NEC Electronics Corporation 2005-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/types.h> - -#include <asm/system.h> -#include <asm/mipsregs.h> -#include <asm/addrspace.h> -#include <asm/bootinfo.h> - -#include <asm/emma2rh/emma2rh.h> - -/* - * the first level int-handler will jump here if it is a emma2rh irq - */ -void emma2rh_irq_dispatch(void) -{ - u32 intStatus; - u32 bitmask; - u32 i; - - intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) - & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); - -#ifdef EMMA2RH_SW_CASCADE - if (intStatus & - (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { - u32 swIntStatus; - swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) - & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); - for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { - if (swIntStatus & bitmask) { - do_IRQ(EMMA2RH_SW_IRQ_BASE + i); - return; - } - } - } -#endif - - for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { - if (intStatus & bitmask) { - do_IRQ(EMMA2RH_IRQ_BASE + i); - return; - } - } - - intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) - & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); - -#ifdef EMMA2RH_GPIO_CASCADE - if (intStatus & - (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { - u32 gpioIntStatus; - gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) - & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { - if (gpioIntStatus & bitmask) { - do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i); - return; - } - } - } -#endif - - for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { - if (intStatus & bitmask) { - do_IRQ(EMMA2RH_IRQ_BASE + i); - return; - } - } - - intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) - & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); - - for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { - if (intStatus & bitmask) { - do_IRQ(EMMA2RH_IRQ_BASE + i); - return; - } - } -} diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c deleted file mode 100644 index 96df37b77759..000000000000 --- a/arch/mips/emma2rh/common/irq_emma2rh.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * arch/mips/emma2rh/common/irq_emma2rh.c - * This file defines the irq handler for EMMA2RH. - * - * Copyright (C) NEC Electronics Corporation 2005-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * EMMA2RH defines 64 IRQs. - * - * This file exports one function: - * emma2rh_irq_init(u32 irq_base); - */ - -#include <linux/interrupt.h> -#include <linux/types.h> -#include <linux/ptrace.h> - -#include <asm/debug.h> - -#include <asm/emma2rh/emma2rh.h> - -/* number of total irqs supported by EMMA2RH */ -#define NUM_EMMA2RH_IRQ 96 - -static int emma2rh_irq_base = -1; - -void ll_emma2rh_irq_enable(int); -void ll_emma2rh_irq_disable(int); - -static void emma2rh_irq_enable(unsigned int irq) -{ - ll_emma2rh_irq_enable(irq - emma2rh_irq_base); -} - -static void emma2rh_irq_disable(unsigned int irq) -{ - ll_emma2rh_irq_disable(irq - emma2rh_irq_base); -} - -struct irq_chip emma2rh_irq_controller = { - .name = "emma2rh_irq", - .ack = emma2rh_irq_disable, - .mask = emma2rh_irq_disable, - .mask_ack = emma2rh_irq_disable, - .unmask = emma2rh_irq_enable, -}; - -void emma2rh_irq_init(u32 irq_base) -{ - u32 i; - - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) - set_irq_chip_and_handler(i, &emma2rh_irq_controller, - handle_level_irq); - - emma2rh_irq_base = irq_base; -} - -void ll_emma2rh_irq_enable(int emma2rh_irq) -{ - u32 reg_value; - u32 reg_bitmask; - u32 reg_index; - - reg_index = EMMA2RH_BHIF_INT_EN_0 - + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) - * (emma2rh_irq / 32); - reg_value = emma2rh_in32(reg_index); - reg_bitmask = 0x1 << (emma2rh_irq % 32); - db_assert((reg_value & reg_bitmask) == 0); - emma2rh_out32(reg_index, reg_value | reg_bitmask); -} - -void ll_emma2rh_irq_disable(int emma2rh_irq) -{ - u32 reg_value; - u32 reg_bitmask; - u32 reg_index; - - reg_index = EMMA2RH_BHIF_INT_EN_0 - + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) - * (emma2rh_irq / 32); - reg_value = emma2rh_in32(reg_index); - reg_bitmask = 0x1 << (emma2rh_irq % 32); - db_assert((reg_value & reg_bitmask) != 0); - emma2rh_out32(reg_index, reg_value & ~reg_bitmask); -} diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c deleted file mode 100644 index 6bcf6a06367a..000000000000 --- a/arch/mips/emma2rh/markeins/irq.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * arch/mips/emma2rh/markeins/irq.c - * This file defines the irq handler for EMMA2RH. - * - * Copyright (C) NEC Electronics Corporation 2004-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/types.h> -#include <linux/ptrace.h> -#include <linux/delay.h> - -#include <asm/irq_cpu.h> -#include <asm/system.h> -#include <asm/mipsregs.h> -#include <asm/debug.h> -#include <asm/addrspace.h> -#include <asm/bootinfo.h> - -#include <asm/emma2rh/emma2rh.h> - -/* - * IRQ mapping - * - * 0-7: 8 CPU interrupts - * 0 - software interrupt 0 - * 1 - software interrupt 1 - * 2 - most Vrc5477 interrupts are routed to this pin - * 3 - (optional) some other interrupts routed to this pin for debugg - * 4 - not used - * 5 - not used - * 6 - not used - * 7 - cpu timer (used by default) - * - */ - -extern void emma2rh_sw_irq_init(u32 base); -extern void emma2rh_gpio_irq_init(u32 base); -extern void emma2rh_irq_init(u32 base); -extern void emma2rh_irq_dispatch(void); - -static struct irqaction irq_cascade = { - .handler = no_action, - .flags = 0, - .mask = CPU_MASK_NONE, - .name = "cascade", - .dev_id = NULL, - .next = NULL, -}; - -void __init arch_init_irq(void) -{ - u32 reg; - - db_run(printk("markeins_irq_setup invoked.\n")); - - /* by default, interrupts are disabled. */ - emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0); - emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0); - emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0); - emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0); - emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0); - emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0); - emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0); - - clear_c0_status(0xff00); - set_c0_status(0x0400); - -#define GPIO_PCI (0xf<<15) - /* setup GPIO interrupt for PCI interface */ - /* direction input */ - reg = emma2rh_in32(EMMA2RH_GPIO_DIR); - emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI); - /* disable interrupt */ - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI); - /* level triggerd */ - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE); - emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI); - reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A); - emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI)); - /* interrupt clear */ - emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI); - - /* init all controllers */ - emma2rh_irq_init(EMMA2RH_IRQ_BASE); - emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); - emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); - mips_cpu_irq_init(); - - /* setup cascade interrupts */ - setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); - setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade); - setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade); -} - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; - - if (pending & STATUSF_IP7) - do_IRQ(CPU_IRQ_BASE + 7); - else if (pending & STATUSF_IP2) - emma2rh_irq_dispatch(); - else if (pending & STATUSF_IP1) - do_IRQ(CPU_IRQ_BASE + 1); - else if (pending & STATUSF_IP0) - do_IRQ(CPU_IRQ_BASE + 0); - else - spurious_interrupt(); -} - - diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c deleted file mode 100644 index fba5c156f472..000000000000 --- a/arch/mips/emma2rh/markeins/irq_markeins.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * arch/mips/emma2rh/markeins/irq_markeins.c - * This file defines the irq handler for Mark-eins. - * - * Copyright (C) NEC Electronics Corporation 2004-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/types.h> -#include <linux/ptrace.h> - -#include <asm/debug.h> -#include <asm/emma2rh/emma2rh.h> - -static int emma2rh_sw_irq_base = -1; -static int emma2rh_gpio_irq_base = -1; - -void ll_emma2rh_sw_irq_enable(int reg); -void ll_emma2rh_sw_irq_disable(int reg); -void ll_emma2rh_gpio_irq_enable(int reg); -void ll_emma2rh_gpio_irq_disable(int reg); - -static void emma2rh_sw_irq_enable(unsigned int irq) -{ - ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base); -} - -static void emma2rh_sw_irq_disable(unsigned int irq) -{ - ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); -} - -struct irq_chip emma2rh_sw_irq_controller = { - .name = "emma2rh_sw_irq", - .ack = emma2rh_sw_irq_disable, - .mask = emma2rh_sw_irq_disable, - .mask_ack = emma2rh_sw_irq_disable, - .unmask = emma2rh_sw_irq_enable, -}; - -void emma2rh_sw_irq_init(u32 irq_base) -{ - u32 i; - - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) - set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller, - handle_level_irq); - - emma2rh_sw_irq_base = irq_base; -} - -void ll_emma2rh_sw_irq_enable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_SW); - - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); - reg |= 1 << irq; - emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); -} - -void ll_emma2rh_sw_irq_disable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < 32); - - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); - reg &= ~(1 << irq); - emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); -} - -static void emma2rh_gpio_irq_enable(unsigned int irq) -{ - ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); -} - -static void emma2rh_gpio_irq_disable(unsigned int irq) -{ - ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); -} - -static void emma2rh_gpio_irq_ack(unsigned int irq) -{ - irq -= emma2rh_gpio_irq_base; - emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); - ll_emma2rh_gpio_irq_disable(irq); -} - -static void emma2rh_gpio_irq_end(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); -} - -struct irq_chip emma2rh_gpio_irq_controller = { - .name = "emma2rh_gpio_irq", - .ack = emma2rh_gpio_irq_ack, - .mask = emma2rh_gpio_irq_disable, - .mask_ack = emma2rh_gpio_irq_ack, - .unmask = emma2rh_gpio_irq_enable, - .end = emma2rh_gpio_irq_end, -}; - -void emma2rh_gpio_irq_init(u32 irq_base) -{ - u32 i; - - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) - set_irq_chip(i, &emma2rh_gpio_irq_controller); - - emma2rh_gpio_irq_base = irq_base; -} - -void ll_emma2rh_gpio_irq_enable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); - - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - reg |= 1 << irq; - emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); -} - -void ll_emma2rh_gpio_irq_disable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); - - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - reg &= ~(1 << irq); - emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); -} diff --git a/arch/mips/include/asm/emma2rh/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h index 6a1af0af51e3..30aea91de626 100644 --- a/arch/mips/include/asm/emma2rh/emma2rh.h +++ b/arch/mips/include/asm/emma/emma2rh.h @@ -1,5 +1,5 @@ /* - * include/asm-mips/emma2rh/emma2rh.h + * arch/mips/include/asm/emma/emma2rh.h * This file is EMMA2RH common header. * * Copyright (C) NEC Electronics Corporation 2005-2006 @@ -21,8 +21,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef __ASM_EMMA2RH_EMMA2RH_H -#define __ASM_EMMA2RH_EMMA2RH_H +#ifndef __ASM_EMMA_EMMA2RH_H +#define __ASM_EMMA_EMMA2RH_H #include <irq.h> @@ -206,7 +206,6 @@ static inline void emma2rh_out32(u32 offset, u32 val) static inline u32 emma2rh_in32(u32 offset) { u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset); - emma2rh_sync(); return val; } @@ -219,7 +218,6 @@ static inline void emma2rh_out16(u32 offset, u16 val) static inline u16 emma2rh_in16(u32 offset) { u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset); - emma2rh_sync(); return val; } @@ -232,7 +230,6 @@ static inline void emma2rh_out8(u32 offset, u8 val) static inline u8 emma2rh_in8(u32 offset) { u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset); - emma2rh_sync(); return val; } @@ -324,10 +321,10 @@ static inline u8 emma2rh_in8(u32 offset) /* * include the board dependent part */ -#if defined(CONFIG_MARKEINS) -#include <asm/emma2rh/markeins.h> +#ifdef CONFIG_NEC_MARKEINS +#include <asm/emma/markeins.h> #else #error "Unknown EMMA2RH board!" #endif -#endif /* __ASM_EMMA2RH_EMMA2RH_H */ +#endif /* __ASM_EMMA_EMMA2RH_H */ diff --git a/arch/mips/include/asm/emma2rh/markeins.h b/arch/mips/include/asm/emma/markeins.h index 973b0628490d..973b0628490d 100644 --- a/arch/mips/include/asm/emma2rh/markeins.h +++ b/arch/mips/include/asm/emma/markeins.h diff --git a/arch/mips/include/asm/mach-lemote/pci.h b/arch/mips/include/asm/mach-lemote/pci.h new file mode 100644 index 000000000000..ea6aa143b78e --- /dev/null +++ b/arch/mips/include/asm/mach-lemote/pci.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> + * + * This program is free software; you can redistribute it + * and/or modify it under the terms of the GNU General + * Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more + * details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA + * 02139, USA. + */ + +#ifndef _LEMOTE_PCI_H_ +#define _LEMOTE_PCI_H_ + +#define LOONGSON2E_PCI_MEM_START 0x14000000UL +#define LOONGSON2E_PCI_MEM_END 0x1fffffffUL +#define LOONGSON2E_PCI_IO_START 0x00004000UL +#define LOONGSON2E_IO_PORT_BASE 0x1fd00000UL + +#endif /* !_LEMOTE_PCI_H_ */ diff --git a/arch/mips/include/asm/mach-pnx833x/gpio.h b/arch/mips/include/asm/mach-pnx833x/gpio.h new file mode 100644 index 000000000000..8de0eb9c98a3 --- /dev/null +++ b/arch/mips/include/asm/mach-pnx833x/gpio.h @@ -0,0 +1,172 @@ +/* + * gpio.h: GPIO Support for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef __ASM_MIPS_MACH_PNX833X_GPIO_H +#define __ASM_MIPS_MACH_PNX833X_GPIO_H + +/* BIG FAT WARNING: races danger! + No protections exist here. Current users are only early init code, + when locking is not needed because no cuncurency yet exists there, + and GPIO IRQ dispatcher, which does locking. + However, if many uses will ever happen, proper locking will be needed + - including locking between different uses +*/ + +#include "pnx833x.h" + +#define SET_REG_BIT(reg, bit) do { (reg |= (1 << (bit))); } while (0) +#define CLEAR_REG_BIT(reg, bit) do { (reg &= ~(1 << (bit))); } while (0) + +/* Initialize GPIO to a known state */ +static inline void pnx833x_gpio_init(void) +{ + PNX833X_PIO_DIR = 0; + PNX833X_PIO_DIR2 = 0; + PNX833X_PIO_SEL = 0; + PNX833X_PIO_SEL2 = 0; + PNX833X_PIO_INT_EDGE = 0; + PNX833X_PIO_INT_HI = 0; + PNX833X_PIO_INT_LO = 0; + + /* clear any GPIO interrupt requests */ + PNX833X_PIO_INT_CLEAR = 0xffff; + PNX833X_PIO_INT_CLEAR = 0; + PNX833X_PIO_INT_ENABLE = 0; +} + +/* Select GPIO direction for a pin */ +static inline void pnx833x_gpio_select_input(unsigned int pin) +{ + if (pin < 32) + CLEAR_REG_BIT(PNX833X_PIO_DIR, pin); + else + CLEAR_REG_BIT(PNX833X_PIO_DIR2, pin & 31); +} +static inline void pnx833x_gpio_select_output(unsigned int pin) +{ + if (pin < 32) + SET_REG_BIT(PNX833X_PIO_DIR, pin); + else + SET_REG_BIT(PNX833X_PIO_DIR2, pin & 31); +} + +/* Select GPIO or alternate function for a pin */ +static inline void pnx833x_gpio_select_function_io(unsigned int pin) +{ + if (pin < 32) + CLEAR_REG_BIT(PNX833X_PIO_SEL, pin); + else + CLEAR_REG_BIT(PNX833X_PIO_SEL2, pin & 31); +} +static inline void pnx833x_gpio_select_function_alt(unsigned int pin) +{ + if (pin < 32) + SET_REG_BIT(PNX833X_PIO_SEL, pin); + else + SET_REG_BIT(PNX833X_PIO_SEL2, pin & 31); +} + +/* Read GPIO pin */ +static inline int pnx833x_gpio_read(unsigned int pin) +{ + if (pin < 32) + return (PNX833X_PIO_IN >> pin) & 1; + else + return (PNX833X_PIO_IN2 >> (pin & 31)) & 1; +} + +/* Write GPIO pin */ +static inline void pnx833x_gpio_write(unsigned int val, unsigned int pin) +{ + if (pin < 32) { + if (val) + SET_REG_BIT(PNX833X_PIO_OUT, pin); + else + CLEAR_REG_BIT(PNX833X_PIO_OUT, pin); + } else { + if (val) + SET_REG_BIT(PNX833X_PIO_OUT2, pin & 31); + else + CLEAR_REG_BIT(PNX833X_PIO_OUT2, pin & 31); + } +} + +/* Configure GPIO interrupt */ +#define GPIO_INT_NONE 0 +#define GPIO_INT_LEVEL_LOW 1 +#define GPIO_INT_LEVEL_HIGH 2 +#define GPIO_INT_EDGE_RISING 3 +#define GPIO_INT_EDGE_FALLING 4 +#define GPIO_INT_EDGE_BOTH 5 +static inline void pnx833x_gpio_setup_irq(int when, unsigned int pin) +{ + switch (when) { + case GPIO_INT_LEVEL_LOW: + CLEAR_REG_BIT(PNX833X_PIO_INT_EDGE, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_HI, pin); + SET_REG_BIT(PNX833X_PIO_INT_LO, pin); + break; + case GPIO_INT_LEVEL_HIGH: + CLEAR_REG_BIT(PNX833X_PIO_INT_EDGE, pin); + SET_REG_BIT(PNX833X_PIO_INT_HI, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_LO, pin); + break; + case GPIO_INT_EDGE_RISING: + SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin); + SET_REG_BIT(PNX833X_PIO_INT_HI, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_LO, pin); + break; + case GPIO_INT_EDGE_FALLING: + SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_HI, pin); + SET_REG_BIT(PNX833X_PIO_INT_LO, pin); + break; + case GPIO_INT_EDGE_BOTH: + SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin); + SET_REG_BIT(PNX833X_PIO_INT_HI, pin); + SET_REG_BIT(PNX833X_PIO_INT_LO, pin); + break; + default: + CLEAR_REG_BIT(PNX833X_PIO_INT_EDGE, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_HI, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_LO, pin); + break; + } +} + +/* Enable/disable GPIO interrupt */ +static inline void pnx833x_gpio_enable_irq(unsigned int pin) +{ + SET_REG_BIT(PNX833X_PIO_INT_ENABLE, pin); +} +static inline void pnx833x_gpio_disable_irq(unsigned int pin) +{ + CLEAR_REG_BIT(PNX833X_PIO_INT_ENABLE, pin); +} + +/* Clear GPIO interrupt request */ +static inline void pnx833x_gpio_clear_irq(unsigned int pin) +{ + SET_REG_BIT(PNX833X_PIO_INT_CLEAR, pin); + CLEAR_REG_BIT(PNX833X_PIO_INT_CLEAR, pin); +} + +#endif diff --git a/arch/mips/include/asm/mach-pnx833x/irq-mapping.h b/arch/mips/include/asm/mach-pnx833x/irq-mapping.h new file mode 100644 index 000000000000..657f089b1724 --- /dev/null +++ b/arch/mips/include/asm/mach-pnx833x/irq-mapping.h @@ -0,0 +1,126 @@ + +/* + * irq.h: IRQ mappings for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_MIPS_MACH_PNX833X_IRQ_MAPPING_H +#define __ASM_MIPS_MACH_PNX833X_IRQ_MAPPING_H +/* + * The "IRQ numbers" are completely virtual. + * + * In PNX8330/1, we have 48 interrupt lines, numbered from 1 to 48. + * Let's use numbers 1..48 for PIC interrupts, number 0 for timer interrupt, + * numbers 49..64 for (virtual) GPIO interrupts. + * + * In PNX8335, we have 57 interrupt lines, numbered from 1 to 57, + * connected to PIC, which uses core hardware interrupt 2, and also + * a timer interrupt through hardware interrupt 5. + * Let's use numbers 1..64 for PIC interrupts, number 0 for timer interrupt, + * numbers 65..80 for (virtual) GPIO interrupts. + * + */ +#include <irq.h> + +#define PNX833X_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) + +/* Interrupts supported by PIC */ +#define PNX833X_PIC_I2C0_INT (PNX833X_PIC_IRQ_BASE + 1) +#define PNX833X_PIC_I2C1_INT (PNX833X_PIC_IRQ_BASE + 2) +#define PNX833X_PIC_UART0_INT (PNX833X_PIC_IRQ_BASE + 3) +#define PNX833X_PIC_UART1_INT (PNX833X_PIC_IRQ_BASE + 4) +#define PNX833X_PIC_TS_IN0_DV_INT (PNX833X_PIC_IRQ_BASE + 5) +#define PNX833X_PIC_TS_IN0_DMA_INT (PNX833X_PIC_IRQ_BASE + 6) +#define PNX833X_PIC_GPIO_INT (PNX833X_PIC_IRQ_BASE + 7) +#define PNX833X_PIC_AUDIO_DEC_INT (PNX833X_PIC_IRQ_BASE + 8) +#define PNX833X_PIC_VIDEO_DEC_INT (PNX833X_PIC_IRQ_BASE + 9) +#define PNX833X_PIC_CONFIG_INT (PNX833X_PIC_IRQ_BASE + 10) +#define PNX833X_PIC_AOI_INT (PNX833X_PIC_IRQ_BASE + 11) +#define PNX833X_PIC_SYNC_INT (PNX833X_PIC_IRQ_BASE + 12) +#define PNX8330_PIC_SPU_INT (PNX833X_PIC_IRQ_BASE + 13) +#define PNX8335_PIC_SATA_INT (PNX833X_PIC_IRQ_BASE + 13) +#define PNX833X_PIC_OSD_INT (PNX833X_PIC_IRQ_BASE + 14) +#define PNX833X_PIC_DISP1_INT (PNX833X_PIC_IRQ_BASE + 15) +#define PNX833X_PIC_DEINTERLACER_INT (PNX833X_PIC_IRQ_BASE + 16) +#define PNX833X_PIC_DISPLAY2_INT (PNX833X_PIC_IRQ_BASE + 17) +#define PNX833X_PIC_VC_INT (PNX833X_PIC_IRQ_BASE + 18) +#define PNX833X_PIC_SC_INT (PNX833X_PIC_IRQ_BASE + 19) +#define PNX833X_PIC_IDE_INT (PNX833X_PIC_IRQ_BASE + 20) +#define PNX833X_PIC_IDE_DMA_INT (PNX833X_PIC_IRQ_BASE + 21) +#define PNX833X_PIC_TS_IN1_DV_INT (PNX833X_PIC_IRQ_BASE + 22) +#define PNX833X_PIC_TS_IN1_DMA_INT (PNX833X_PIC_IRQ_BASE + 23) +#define PNX833X_PIC_SGDX_DMA_INT (PNX833X_PIC_IRQ_BASE + 24) +#define PNX833X_PIC_TS_OUT_INT (PNX833X_PIC_IRQ_BASE + 25) +#define PNX833X_PIC_IR_INT (PNX833X_PIC_IRQ_BASE + 26) +#define PNX833X_PIC_VMSP1_INT (PNX833X_PIC_IRQ_BASE + 27) +#define PNX833X_PIC_VMSP2_INT (PNX833X_PIC_IRQ_BASE + 28) +#define PNX833X_PIC_PIBC_INT (PNX833X_PIC_IRQ_BASE + 29) +#define PNX833X_PIC_TS_IN0_TRD_INT (PNX833X_PIC_IRQ_BASE + 30) +#define PNX833X_PIC_SGDX_TPD_INT (PNX833X_PIC_IRQ_BASE + 31) +#define PNX833X_PIC_USB_INT (PNX833X_PIC_IRQ_BASE + 32) +#define PNX833X_PIC_TS_IN1_TRD_INT (PNX833X_PIC_IRQ_BASE + 33) +#define PNX833X_PIC_CLOCK_INT (PNX833X_PIC_IRQ_BASE + 34) +#define PNX833X_PIC_SGDX_PARSER_INT (PNX833X_PIC_IRQ_BASE + 35) +#define PNX833X_PIC_VMSP_DMA_INT (PNX833X_PIC_IRQ_BASE + 36) + +#if defined(CONFIG_SOC_PNX8335) +#define PNX8335_PIC_MIU_INT (PNX833X_PIC_IRQ_BASE + 37) +#define PNX8335_PIC_AVCHIP_IRQ_INT (PNX833X_PIC_IRQ_BASE + 38) +#define PNX8335_PIC_SYNC_HD_INT (PNX833X_PIC_IRQ_BASE + 39) +#define PNX8335_PIC_DISP_HD_INT (PNX833X_PIC_IRQ_BASE + 40) +#define PNX8335_PIC_DISP_SCALER_INT (PNX833X_PIC_IRQ_BASE + 41) +#define PNX8335_PIC_OSD_HD1_INT (PNX833X_PIC_IRQ_BASE + 42) +#define PNX8335_PIC_DTL_WRITER_Y_INT (PNX833X_PIC_IRQ_BASE + 43) +#define PNX8335_PIC_DTL_WRITER_C_INT (PNX833X_PIC_IRQ_BASE + 44) +#define PNX8335_PIC_DTL_EMULATOR_Y_IR_INT (PNX833X_PIC_IRQ_BASE + 45) +#define PNX8335_PIC_DTL_EMULATOR_C_IR_INT (PNX833X_PIC_IRQ_BASE + 46) +#define PNX8335_PIC_DENC_TTX_INT (PNX833X_PIC_IRQ_BASE + 47) +#define PNX8335_PIC_MMI_SIF0_INT (PNX833X_PIC_IRQ_BASE + 48) +#define PNX8335_PIC_MMI_SIF1_INT (PNX833X_PIC_IRQ_BASE + 49) +#define PNX8335_PIC_MMI_CDMMU_INT (PNX833X_PIC_IRQ_BASE + 50) +#define PNX8335_PIC_PIBCS_INT (PNX833X_PIC_IRQ_BASE + 51) +#define PNX8335_PIC_ETHERNET_INT (PNX833X_PIC_IRQ_BASE + 52) +#define PNX8335_PIC_VMSP1_0_INT (PNX833X_PIC_IRQ_BASE + 53) +#define PNX8335_PIC_VMSP1_1_INT (PNX833X_PIC_IRQ_BASE + 54) +#define PNX8335_PIC_VMSP1_DMA_INT (PNX833X_PIC_IRQ_BASE + 55) +#define PNX8335_PIC_TDGR_DE_INT (PNX833X_PIC_IRQ_BASE + 56) +#define PNX8335_PIC_IR1_IRQ_INT (PNX833X_PIC_IRQ_BASE + 57) +#endif + +/* GPIO interrupts */ +#define PNX833X_GPIO_0_INT (PNX833X_GPIO_IRQ_BASE + 0) +#define PNX833X_GPIO_1_INT (PNX833X_GPIO_IRQ_BASE + 1) +#define PNX833X_GPIO_2_INT (PNX833X_GPIO_IRQ_BASE + 2) +#define PNX833X_GPIO_3_INT (PNX833X_GPIO_IRQ_BASE + 3) +#define PNX833X_GPIO_4_INT (PNX833X_GPIO_IRQ_BASE + 4) +#define PNX833X_GPIO_5_INT (PNX833X_GPIO_IRQ_BASE + 5) +#define PNX833X_GPIO_6_INT (PNX833X_GPIO_IRQ_BASE + 6) +#define PNX833X_GPIO_7_INT (PNX833X_GPIO_IRQ_BASE + 7) +#define PNX833X_GPIO_8_INT (PNX833X_GPIO_IRQ_BASE + 8) +#define PNX833X_GPIO_9_INT (PNX833X_GPIO_IRQ_BASE + 9) +#define PNX833X_GPIO_10_INT (PNX833X_GPIO_IRQ_BASE + 10) +#define PNX833X_GPIO_11_INT (PNX833X_GPIO_IRQ_BASE + 11) +#define PNX833X_GPIO_12_INT (PNX833X_GPIO_IRQ_BASE + 12) +#define PNX833X_GPIO_13_INT (PNX833X_GPIO_IRQ_BASE + 13) +#define PNX833X_GPIO_14_INT (PNX833X_GPIO_IRQ_BASE + 14) +#define PNX833X_GPIO_15_INT (PNX833X_GPIO_IRQ_BASE + 15) + +#endif + diff --git a/arch/mips/include/asm/mach-pnx833x/irq.h b/arch/mips/include/asm/mach-pnx833x/irq.h new file mode 100644 index 000000000000..745114b1d8d5 --- /dev/null +++ b/arch/mips/include/asm/mach-pnx833x/irq.h @@ -0,0 +1,53 @@ +/* + * irq.h: IRQ mappings for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_MIPS_MACH_PNX833X_IRQ_H +#define __ASM_MIPS_MACH_PNX833X_IRQ_H +/* + * The "IRQ numbers" are completely virtual. + * + * In PNX8330/1, we have 48 interrupt lines, numbered from 1 to 48. + * Let's use numbers 1..48 for PIC interrupts, number 0 for timer interrupt, + * numbers 49..64 for (virtual) GPIO interrupts. + * + * In PNX8335, we have 57 interrupt lines, numbered from 1 to 57, + * connected to PIC, which uses core hardware interrupt 2, and also + * a timer interrupt through hardware interrupt 5. + * Let's use numbers 1..64 for PIC interrupts, number 0 for timer interrupt, + * numbers 65..80 for (virtual) GPIO interrupts. + * + */ +#if defined(CONFIG_SOC_PNX8335) + #define PNX833X_PIC_NUM_IRQ 58 +#else + #define PNX833X_PIC_NUM_IRQ 37 +#endif + +#define MIPS_CPU_NUM_IRQ 8 +#define PNX833X_GPIO_NUM_IRQ 16 + +#define MIPS_CPU_IRQ_BASE 0 +#define PNX833X_PIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + MIPS_CPU_NUM_IRQ) +#define PNX833X_GPIO_IRQ_BASE (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ) +#define NR_IRQS (MIPS_CPU_NUM_IRQ + PNX833X_PIC_NUM_IRQ + PNX833X_GPIO_NUM_IRQ) + +#endif diff --git a/arch/mips/include/asm/mach-pnx833x/pnx833x.h b/arch/mips/include/asm/mach-pnx833x/pnx833x.h new file mode 100644 index 000000000000..100f52870e3c --- /dev/null +++ b/arch/mips/include/asm/mach-pnx833x/pnx833x.h @@ -0,0 +1,202 @@ +/* + * pnx833x.h: Register mappings for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef __ASM_MIPS_MACH_PNX833X_PNX833X_H +#define __ASM_MIPS_MACH_PNX833X_PNX833X_H + +/* All regs are accessed in KSEG1 */ +#define PNX833X_BASE (0xa0000000ul + 0x17E00000ul) + +#define PNX833X_REG(offs) (*((volatile unsigned long *)(PNX833X_BASE + offs))) + +/* Registers are named exactly as in PNX833X docs, just with PNX833X_ prefix */ + +/* Read access to multibit fields */ +#define PNX833X_BIT(val, reg, field) ((val) & PNX833X_##reg##_##field) +#define PNX833X_REGBIT(reg, field) PNX833X_BIT(PNX833X_##reg, reg, field) + +/* Use PNX833X_FIELD to extract a field from val */ +#define PNX_FIELD(cpu, val, reg, field) \ + (((val) & PNX##cpu##_##reg##_##field##_MASK) >> \ + PNX##cpu##_##reg##_##field##_SHIFT) +#define PNX833X_FIELD(val, reg, field) PNX_FIELD(833X, val, reg, field) +#define PNX8330_FIELD(val, reg, field) PNX_FIELD(8330, val, reg, field) +#define PNX8335_FIELD(val, reg, field) PNX_FIELD(8335, val, reg, field) + +/* Use PNX833X_REGFIELD to extract a field from a register */ +#define PNX833X_REGFIELD(reg, field) PNX833X_FIELD(PNX833X_##reg, reg, field) +#define PNX8330_REGFIELD(reg, field) PNX8330_FIELD(PNX8330_##reg, reg, field) +#define PNX8335_REGFIELD(reg, field) PNX8335_FIELD(PNX8335_##reg, reg, field) + + +#define PNX_WRITEFIELD(cpu, val, reg, field) \ + (PNX##cpu##_##reg = (PNX##cpu##_##reg & ~(PNX##cpu##_##reg##_##field##_MASK)) | \ + ((val) << PNX##cpu##_##reg##_##field##_SHIFT)) +#define PNX833X_WRITEFIELD(val, reg, field) \ + PNX_WRITEFIELD(833X, val, reg, field) +#define PNX8330_WRITEFIELD(val, reg, field) \ + PNX_WRITEFIELD(8330, val, reg, field) +#define PNX8335_WRITEFIELD(val, reg, field) \ + PNX_WRITEFIELD(8335, val, reg, field) + + +/* Macros to detect CPU type */ + +#define PNX833X_CONFIG_MODULE_ID PNX833X_REG(0x7FFC) +#define PNX833X_CONFIG_MODULE_ID_MAJREV_MASK 0x0000f000 +#define PNX833X_CONFIG_MODULE_ID_MAJREV_SHIFT 12 +#define PNX8330_CONFIG_MODULE_MAJREV 4 +#define PNX8335_CONFIG_MODULE_MAJREV 5 +#define CPU_IS_PNX8330 (PNX833X_REGFIELD(CONFIG_MODULE_ID, MAJREV) == \ + PNX8330_CONFIG_MODULE_MAJREV) +#define CPU_IS_PNX8335 (PNX833X_REGFIELD(CONFIG_MODULE_ID, MAJREV) == \ + PNX8335_CONFIG_MODULE_MAJREV) + + + +#define PNX833X_RESET_CONTROL PNX833X_REG(0x8004) +#define PNX833X_RESET_CONTROL_2 PNX833X_REG(0x8014) + +#define PNX833X_PIC_REG(offs) PNX833X_REG(0x01000 + (offs)) +#define PNX833X_PIC_INT_PRIORITY PNX833X_PIC_REG(0x0) +#define PNX833X_PIC_INT_SRC PNX833X_PIC_REG(0x4) +#define PNX833X_PIC_INT_SRC_INT_SRC_MASK 0x00000FF8ul /* bits 11:3 */ +#define PNX833X_PIC_INT_SRC_INT_SRC_SHIFT 3 +#define PNX833X_PIC_INT_REG(irq) PNX833X_PIC_REG(0x10 + 4*(irq)) + +#define PNX833X_CLOCK_CPUCP_CTL PNX833X_REG(0x9228) +#define PNX833X_CLOCK_CPUCP_CTL_EXIT_RESET 0x00000002ul /* bit 1 */ +#define PNX833X_CLOCK_CPUCP_CTL_DIV_CLOCK_MASK 0x00000018ul /* bits 4:3 */ +#define PNX833X_CLOCK_CPUCP_CTL_DIV_CLOCK_SHIFT 3 + +#define PNX8335_CLOCK_PLL_CPU_CTL PNX833X_REG(0x9020) +#define PNX8335_CLOCK_PLL_CPU_CTL_FREQ_MASK 0x1f +#define PNX8335_CLOCK_PLL_CPU_CTL_FREQ_SHIFT 0 + +#define PNX833X_CONFIG_MUX PNX833X_REG(0x7004) +#define PNX833X_CONFIG_MUX_IDE_MUX 0x00000080 /* bit 7 */ + +#define PNX8330_CONFIG_POLYFUSE_7 PNX833X_REG(0x7040) +#define PNX8330_CONFIG_POLYFUSE_7_BOOT_MODE_MASK 0x00180000 +#define PNX8330_CONFIG_POLYFUSE_7_BOOT_MODE_SHIFT 19 + +#define PNX833X_PIO_IN PNX833X_REG(0xF000) +#define PNX833X_PIO_OUT PNX833X_REG(0xF004) +#define PNX833X_PIO_DIR PNX833X_REG(0xF008) +#define PNX833X_PIO_SEL PNX833X_REG(0xF014) +#define PNX833X_PIO_INT_EDGE PNX833X_REG(0xF020) +#define PNX833X_PIO_INT_HI PNX833X_REG(0xF024) +#define PNX833X_PIO_INT_LO PNX833X_REG(0xF028) +#define PNX833X_PIO_INT_STATUS PNX833X_REG(0xFFE0) +#define PNX833X_PIO_INT_ENABLE PNX833X_REG(0xFFE4) +#define PNX833X_PIO_INT_CLEAR PNX833X_REG(0xFFE8) +#define PNX833X_PIO_IN2 PNX833X_REG(0xF05C) +#define PNX833X_PIO_OUT2 PNX833X_REG(0xF060) +#define PNX833X_PIO_DIR2 PNX833X_REG(0xF064) +#define PNX833X_PIO_SEL2 PNX833X_REG(0xF068) + +#define PNX833X_UART0_PORTS_START (PNX833X_BASE + 0xB000) +#define PNX833X_UART0_PORTS_END (PNX833X_BASE + 0xBFFF) +#define PNX833X_UART1_PORTS_START (PNX833X_BASE + 0xC000) +#define PNX833X_UART1_PORTS_END (PNX833X_BASE + 0xCFFF) + +#define PNX833X_USB_PORTS_START (PNX833X_BASE + 0x19000) +#define PNX833X_USB_PORTS_END (PNX833X_BASE + 0x19FFF) + +#define PNX833X_CONFIG_USB PNX833X_REG(0x7008) + +#define PNX833X_I2C0_PORTS_START (PNX833X_BASE + 0xD000) +#define PNX833X_I2C0_PORTS_END (PNX833X_BASE + 0xDFFF) +#define PNX833X_I2C1_PORTS_START (PNX833X_BASE + 0xE000) +#define PNX833X_I2C1_PORTS_END (PNX833X_BASE + 0xEFFF) + +#define PNX833X_IDE_PORTS_START (PNX833X_BASE + 0x1A000) +#define PNX833X_IDE_PORTS_END (PNX833X_BASE + 0x1AFFF) +#define PNX833X_IDE_MODULE_ID PNX833X_REG(0x1AFFC) + +#define PNX833X_IDE_MODULE_ID_MODULE_ID_MASK 0xFFFF0000 +#define PNX833X_IDE_MODULE_ID_MODULE_ID_SHIFT 16 +#define PNX833X_IDE_MODULE_ID_VALUE 0xA009 + + +#define PNX833X_MIU_SEL0 PNX833X_REG(0x2004) +#define PNX833X_MIU_SEL0_TIMING PNX833X_REG(0x2008) +#define PNX833X_MIU_SEL1 PNX833X_REG(0x200C) +#define PNX833X_MIU_SEL1_TIMING PNX833X_REG(0x2010) +#define PNX833X_MIU_SEL2 PNX833X_REG(0x2014) +#define PNX833X_MIU_SEL2_TIMING PNX833X_REG(0x2018) +#define PNX833X_MIU_SEL3 PNX833X_REG(0x201C) +#define PNX833X_MIU_SEL3_TIMING PNX833X_REG(0x2020) + +#define PNX833X_MIU_SEL0_SPI_MODE_ENABLE_MASK (1 << 14) +#define PNX833X_MIU_SEL0_SPI_MODE_ENABLE_SHIFT 14 + +#define PNX833X_MIU_SEL0_BURST_MODE_ENABLE_MASK (1 << 7) +#define PNX833X_MIU_SEL0_BURST_MODE_ENABLE_SHIFT 7 + +#define PNX833X_MIU_SEL0_BURST_PAGE_LEN_MASK (0xF << 9) +#define PNX833X_MIU_SEL0_BURST_PAGE_LEN_SHIFT 9 + +#define PNX833X_MIU_CONFIG_SPI PNX833X_REG(0x2000) + +#define PNX833X_MIU_CONFIG_SPI_OPCODE_MASK (0xFF << 3) +#define PNX833X_MIU_CONFIG_SPI_OPCODE_SHIFT 3 + +#define PNX833X_MIU_CONFIG_SPI_DATA_ENABLE_MASK (1 << 2) +#define PNX833X_MIU_CONFIG_SPI_DATA_ENABLE_SHIFT 2 + +#define PNX833X_MIU_CONFIG_SPI_ADDR_ENABLE_MASK (1 << 1) +#define PNX833X_MIU_CONFIG_SPI_ADDR_ENABLE_SHIFT 1 + +#define PNX833X_MIU_CONFIG_SPI_SYNC_MASK (1 << 0) +#define PNX833X_MIU_CONFIG_SPI_SYNC_SHIFT 0 + +#define PNX833X_WRITE_CONFIG_SPI(opcode, data_enable, addr_enable, sync) \ + (PNX833X_MIU_CONFIG_SPI = \ + ((opcode) << PNX833X_MIU_CONFIG_SPI_OPCODE_SHIFT) | \ + ((data_enable) << PNX833X_MIU_CONFIG_SPI_DATA_ENABLE_SHIFT) | \ + ((addr_enable) << PNX833X_MIU_CONFIG_SPI_ADDR_ENABLE_SHIFT) | \ + ((sync) << PNX833X_MIU_CONFIG_SPI_SYNC_SHIFT)) + +#define PNX8335_IP3902_PORTS_START (PNX833X_BASE + 0x2F000) +#define PNX8335_IP3902_PORTS_END (PNX833X_BASE + 0x2FFFF) +#define PNX8335_IP3902_MODULE_ID PNX833X_REG(0x2FFFC) + +#define PNX8335_IP3902_MODULE_ID_MODULE_ID_MASK 0xFFFF0000 +#define PNX8335_IP3902_MODULE_ID_MODULE_ID_SHIFT 16 +#define PNX8335_IP3902_MODULE_ID_VALUE 0x3902 + + /* I/O location(gets remapped)*/ +#define PNX8335_NAND_BASE 0x18000000 +/* I/O location with CLE high */ +#define PNX8335_NAND_CLE_MASK 0x00100000 +/* I/O location with ALE high */ +#define PNX8335_NAND_ALE_MASK 0x00010000 + +#define PNX8335_SATA_PORTS_START (PNX833X_BASE + 0x2E000) +#define PNX8335_SATA_PORTS_END (PNX833X_BASE + 0x2EFFF) +#define PNX8335_SATA_MODULE_ID PNX833X_REG(0x2EFFC) + +#define PNX8335_SATA_MODULE_ID_MODULE_ID_MASK 0xFFFF0000 +#define PNX8335_SATA_MODULE_ID_MODULE_ID_SHIFT 16 +#define PNX8335_SATA_MODULE_ID_VALUE 0xA099 + +#endif diff --git a/arch/mips/include/asm/mach-pnx833x/war.h b/arch/mips/include/asm/mach-pnx833x/war.h new file mode 100644 index 000000000000..82cd1e97bc2e --- /dev/null +++ b/arch/mips/include/asm/mach-pnx833x/war.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MIPS_MACH_PNX833X_WAR_H +#define __ASM_MIPS_MACH_PNX833X_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MIPS_MACH_PNX8550_WAR_H */ diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/include/asm/mach-tx49xx/mangle-port.h new file mode 100644 index 000000000000..5e6912fdd0ed --- /dev/null +++ b/arch/mips/include/asm/mach-tx49xx/mangle-port.h @@ -0,0 +1,26 @@ +#ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H +#define __ASM_MACH_TX49XX_MANGLE_PORT_H + +#define __swizzle_addr_b(port) (port) +#define __swizzle_addr_w(port) (port) +#define __swizzle_addr_l(port) (port) +#define __swizzle_addr_q(port) (port) + +#define ioswabb(a, x) (x) +#define __mem_ioswabb(a, x) (x) +#if defined(CONFIG_TOSHIBA_RBTX4939) && \ + (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)) && \ + defined(__BIG_ENDIAN) +#define NEEDS_TXX9_IOSWABW +extern u16 (*ioswabw)(volatile u16 *a, u16 x); +extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); +#else +#define ioswabw(a, x) le16_to_cpu(x) +#define __mem_ioswabw(a, x) (x) +#endif +#define ioswabl(a, x) le32_to_cpu(x) +#define __mem_ioswabl(a, x) (x) +#define ioswabq(a, x) le64_to_cpu(x) +#define __mem_ioswabq(a, x) (x) + +#endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 979866000da4..9316324d070d 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -192,6 +192,7 @@ #define PM_16M 0x01ffe000 #define PM_64M 0x07ffe000 #define PM_256M 0x1fffe000 +#define PM_1G 0x7fffe000 #endif diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h index de6d09ebbd80..e2e09b2cd265 100644 --- a/arch/mips/include/asm/module.h +++ b/arch/mips/include/asm/module.h @@ -98,6 +98,8 @@ search_module_dbetables(unsigned long addr) #define MODULE_PROC_FAMILY "R5000 " #elif defined CONFIG_CPU_R5432 #define MODULE_PROC_FAMILY "R5432 " +#elif defined CONFIG_CPU_R5500 +#define MODULE_PROC_FAMILY "R5500 " #elif defined CONFIG_CPU_R6000 #define MODULE_PROC_FAMILY "R6000 " #elif defined CONFIG_CPU_NEVADA diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index 9c22571b160d..813abd16255d 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -80,25 +80,25 @@ enum pt_watch_style { pt_watch_style_mips64 }; struct mips32_watch_regs { - uint32_t watchlo[8]; + unsigned int watchlo[8]; /* Lower 16 bits of watchhi. */ - uint16_t watchhi[8]; + unsigned short watchhi[8]; /* Valid mask and I R W bits. * bit 0 -- 1 if W bit is usable. * bit 1 -- 1 if R bit is usable. * bit 2 -- 1 if I bit is usable. * bits 3 - 11 -- Valid watchhi mask bits. */ - uint16_t watch_masks[8]; + unsigned short watch_masks[8]; /* The number of valid watch register pairs. */ - uint32_t num_valid; + unsigned int num_valid; } __attribute__((aligned(8))); struct mips64_watch_regs { - uint64_t watchlo[8]; - uint16_t watchhi[8]; - uint16_t watch_masks[8]; - uint32_t num_valid; + unsigned long long watchlo[8]; + unsigned short watchhi[8]; + unsigned short watch_masks[8]; + unsigned int num_valid; } __attribute__((aligned(8))); struct pt_watch_regs { @@ -116,6 +116,7 @@ struct pt_watch_regs { #include <linux/compiler.h> #include <linux/linkage.h> +#include <linux/types.h> #include <asm/isadep.h> struct task_struct; diff --git a/arch/mips/include/asm/txx9/generic.h b/arch/mips/include/asm/txx9/generic.h index 4316a3e57678..9cde0090cbf6 100644 --- a/arch/mips/include/asm/txx9/generic.h +++ b/arch/mips/include/asm/txx9/generic.h @@ -86,4 +86,9 @@ void txx9_iocled_init(unsigned long baseaddr, int basenum, unsigned int num, int lowactive, const char *color, char **deftriggers); +/* 7SEG LED */ +void txx9_7segled_init(unsigned int num, + void (*putc)(unsigned int pos, unsigned char val)); +int txx9_7segled_putc(unsigned int pos, char c); + #endif /* __ASM_TXX9_GENERIC_H */ diff --git a/arch/mips/include/asm/txx9/tx4938.h b/arch/mips/include/asm/txx9/tx4938.h index 989e7751135a..0b068154054c 100644 --- a/arch/mips/include/asm/txx9/tx4938.h +++ b/arch/mips/include/asm/txx9/tx4938.h @@ -292,4 +292,17 @@ void tx4938_setup_pcierr_irq(void); void tx4938_irq_init(void); void tx4938_mtd_init(int ch); +struct tx4938ide_platform_info { + /* + * I/O port shift, for platforms with ports that are + * constantly spaced and need larger than the 1-byte + * spacing used by ata_std_ports(). + */ + unsigned int ioport_shift; + unsigned int gbus_clock; /* 0 means no PIO mode tuning. */ + unsigned int ebus_ch; +}; + +void tx4938_ata_init(unsigned int irq, unsigned int shift, int tune); + #endif diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index d9da7112aaf8..b1372c27f136 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R5432) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_R5500) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R8000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_RM7000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 5e75a316f6b1..759f68066b5d 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -180,7 +180,7 @@ bad_stack: * The system call does not exist in this kernel */ illegal_syscall: - li v0, -ENOSYS # error + li v0, ENOSYS # error sw v0, PT_R2(sp) li t0, 1 # set error flag sw t0, PT_R7(sp) @@ -293,7 +293,7 @@ bad_alignment: jr t2 /* Unreached */ -einval: li v0, -EINVAL +einval: li v0, -ENOSYS jr ra END(sys_syscall) diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 3d58204c9d44..a9e171618994 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -117,7 +117,7 @@ syscall_trace_entry: illegal_syscall: /* This also isn't a 64-bit syscall, throw an error. */ - li v0, -ENOSYS # error + li v0, ENOSYS # error sd v0, PT_R2(sp) li t0, 1 # set error flag sd t0, PT_R7(sp) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 16f8edfe5cdc..4430a1f8fdf1 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -601,8 +601,8 @@ static int __init debugfs_mips(void) struct dentry *d; d = debugfs_create_dir("mips", NULL); - if (IS_ERR(d)) - return PTR_ERR(d); + if (!d) + return -ENOMEM; mips_debugfs_dir = d; return 0; } diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 7b59cfb7e602..b79ea7055ec3 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -163,8 +163,10 @@ static void stop_this_cpu(void *dummy) * Remove this CPU: */ cpu_clear(smp_processor_id(), cpu_online_map); - local_irq_enable(); /* May need to service _machine_restart IPI */ - for (;;); /* Wait if available. */ + for (;;) { + if (cpu_wait) + (*cpu_wait)(); /* Wait if available. */ + } } void smp_send_stop(void) diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index c327b21bca81..20709669e592 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -560,12 +560,12 @@ static int __init debugfs_unaligned(void) return -ENODEV; d = debugfs_create_u32("unaligned_instructions", S_IRUGO, mips_debugfs_dir, &unaligned_instructions); - if (IS_ERR(d)) - return PTR_ERR(d); + if (!d) + return -ENOMEM; d = debugfs_create_u32("unaligned_action", S_IRUGO | S_IWUSR, mips_debugfs_dir, &unaligned_action); - if (IS_ERR(d)) - return PTR_ERR(d); + if (!d) + return -ENOMEM; return 0; } __initcall(debugfs_unaligned); diff --git a/arch/mips/lemote/lm2e/pci.c b/arch/mips/lemote/lm2e/pci.c index c1e41f15cc7e..8be03a8e1ad4 100644 --- a/arch/mips/lemote/lm2e/pci.c +++ b/arch/mips/lemote/lm2e/pci.c @@ -30,19 +30,20 @@ #include <linux/kernel.h> #include <linux/init.h> #include <asm/mips-boards/bonito64.h> +#include <asm/mach-lemote/pci.h> extern struct pci_ops bonito64_pci_ops; static struct resource loongson2e_pci_mem_resource = { .name = "LOONGSON2E PCI MEM", - .start = 0x14000000UL, - .end = 0x1fffffffUL, + .start = LOONGSON2E_PCI_MEM_START, + .end = LOONGSON2E_PCI_MEM_END, .flags = IORESOURCE_MEM, }; static struct resource loongson2e_pci_io_resource = { .name = "LOONGSON2E PCI IO MEM", - .start = 0x00004000UL, + .start = LOONGSON2E_PCI_IO_START, .end = IO_SPACE_LIMIT, .flags = IORESOURCE_IO, }; @@ -82,6 +83,12 @@ static void __init ict_pcimap(void) static int __init pcibios_init(void) { ict_pcimap(); + + loongson2e_pci_controller.io_map_base = + (unsigned long) ioremap(LOONGSON2E_IO_PORT_BASE, + loongson2e_pci_io_resource.end - + loongson2e_pci_io_resource.start + 1); + register_pci_controller(&loongson2e_pci_controller); return 0; diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c index 2cc6745991ab..ebd6ceaef2fd 100644 --- a/arch/mips/lemote/lm2e/setup.c +++ b/arch/mips/lemote/lm2e/setup.c @@ -34,6 +34,7 @@ #include <asm/mc146818-time.h> #include <asm/time.h> #include <asm/wbflush.h> +#include <asm/mach-lemote/pci.h> #ifdef CONFIG_VT #include <linux/console.h> @@ -42,12 +43,6 @@ extern void mips_reboot_setup(void); -#ifdef CONFIG_64BIT -#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p))) -#else -#define PTR_PAD(p) (p) -#endif - unsigned long cpu_clock_freq; unsigned long bus_clock; unsigned int memsize; @@ -80,8 +75,8 @@ static void wbflush_loongson2e(void) void __init plat_mem_setup(void) { - set_io_port_base(PTR_PAD(0xbfd00000)); - + set_io_port_base((unsigned long)ioremap(LOONGSON2E_IO_PORT_BASE, + IO_SPACE_LIMIT - LOONGSON2E_PCI_IO_START + 1)); mips_reboot_setup(); __wbflush = wbflush_loongson2e; diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 8810dfb915dd..dbcf6511b74e 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_CPU_R4300) += dump_tlb.o obj-$(CONFIG_CPU_R4X00) += dump_tlb.o obj-$(CONFIG_CPU_R5000) += dump_tlb.o obj-$(CONFIG_CPU_R5432) += dump_tlb.o +obj-$(CONFIG_CPU_R5500) += dump_tlb.o obj-$(CONFIG_CPU_R6000) += obj-$(CONFIG_CPU_R8000) += obj-$(CONFIG_CPU_RM7000) += dump_tlb.o diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 465ff0ec85b9..779821cd54ab 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -25,6 +25,7 @@ static inline const char *msk2str(unsigned int mask) case PM_16M: return "16Mb"; case PM_64M: return "64Mb"; case PM_256M: return "256Mb"; + case PM_1G: return "1Gb"; #endif } return ""; diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index b08fc65c13a6..7ec0b217dfd3 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -1299,12 +1299,12 @@ static int __init debugfs_fpuemu(void) if (!mips_debugfs_dir) return -ENODEV; dir = debugfs_create_dir("fpuemustats", mips_debugfs_dir); - if (IS_ERR(dir)) - return PTR_ERR(dir); + if (!dir) + return -ENOMEM; for (i = 0; i < ARRAY_SIZE(vars); i++) { d = debugfs_create_u32(vars[i].name, S_IRUGO, dir, vars[i].v); - if (IS_ERR(d)) - return PTR_ERR(d); + if (!d) + return -ENOMEM; } return 0; } diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 44e8dd8106bf..95ba32b5b720 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o tlb-r4k.o obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o tlb-r4k.o obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o tlb-r4k.o obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o tlb-r4k.o +obj-$(CONFIG_CPU_R5500) += c-r4k.o cex-gen.o tlb-r4k.o obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o tlb-r8k.o obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o tlb-r4k.o obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o tlb-r4k.o diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 891312f8e5a6..5b98d0e731c2 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -324,7 +324,6 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, if (cpu_is_noncoherent_r10000(dev)) __dma_sync((unsigned long)page_address(sg_page(sg)), sg->length, direction); - plat_unmap_dma_mem(sg->dma_address); } } @@ -342,7 +341,6 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele if (!plat_device_is_coherent(dev)) __dma_sync((unsigned long)page_address(sg_page(sg)), sg->length, direction); - plat_unmap_dma_mem(sg->dma_address); } } diff --git a/arch/mips/nxp/pnx833x/common/Makefile b/arch/mips/nxp/pnx833x/common/Makefile new file mode 100644 index 000000000000..4a16f3b503b5 --- /dev/null +++ b/arch/mips/nxp/pnx833x/common/Makefile @@ -0,0 +1,3 @@ +obj-y := interrupts.o platform.o prom.o setup.o reset.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/mips/nxp/pnx833x/common/interrupts.c b/arch/mips/nxp/pnx833x/common/interrupts.c new file mode 100644 index 000000000000..30533ba200e2 --- /dev/null +++ b/arch/mips/nxp/pnx833x/common/interrupts.c @@ -0,0 +1,380 @@ +/* + * interrupts.c: Interrupt mappings for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/kernel.h> +#include <linux/irq.h> +#include <linux/hardirq.h> +#include <linux/interrupt.h> +#include <asm/mipsregs.h> +#include <asm/irq_cpu.h> +#include <irq.h> +#include <irq-mapping.h> +#include <gpio.h> + +static int mips_cpu_timer_irq; + +static const unsigned int irq_prio[PNX833X_PIC_NUM_IRQ] = +{ + 0, /* unused */ + 4, /* PNX833X_PIC_I2C0_INT 1 */ + 4, /* PNX833X_PIC_I2C1_INT 2 */ + 1, /* PNX833X_PIC_UART0_INT 3 */ + 1, /* PNX833X_PIC_UART1_INT 4 */ + 6, /* PNX833X_PIC_TS_IN0_DV_INT 5 */ + 6, /* PNX833X_PIC_TS_IN0_DMA_INT 6 */ + 7, /* PNX833X_PIC_GPIO_INT 7 */ + 4, /* PNX833X_PIC_AUDIO_DEC_INT 8 */ + 5, /* PNX833X_PIC_VIDEO_DEC_INT 9 */ + 4, /* PNX833X_PIC_CONFIG_INT 10 */ + 4, /* PNX833X_PIC_AOI_INT 11 */ + 9, /* PNX833X_PIC_SYNC_INT 12 */ + 9, /* PNX8335_PIC_SATA_INT 13 */ + 4, /* PNX833X_PIC_OSD_INT 14 */ + 9, /* PNX833X_PIC_DISP1_INT 15 */ + 4, /* PNX833X_PIC_DEINTERLACER_INT 16 */ + 9, /* PNX833X_PIC_DISPLAY2_INT 17 */ + 4, /* PNX833X_PIC_VC_INT 18 */ + 4, /* PNX833X_PIC_SC_INT 19 */ + 9, /* PNX833X_PIC_IDE_INT 20 */ + 9, /* PNX833X_PIC_IDE_DMA_INT 21 */ + 6, /* PNX833X_PIC_TS_IN1_DV_INT 22 */ + 6, /* PNX833X_PIC_TS_IN1_DMA_INT 23 */ + 4, /* PNX833X_PIC_SGDX_DMA_INT 24 */ + 4, /* PNX833X_PIC_TS_OUT_INT 25 */ + 4, /* PNX833X_PIC_IR_INT 26 */ + 3, /* PNX833X_PIC_VMSP1_INT 27 */ + 3, /* PNX833X_PIC_VMSP2_INT 28 */ + 4, /* PNX833X_PIC_PIBC_INT 29 */ + 4, /* PNX833X_PIC_TS_IN0_TRD_INT 30 */ + 4, /* PNX833X_PIC_SGDX_TPD_INT 31 */ + 5, /* PNX833X_PIC_USB_INT 32 */ + 4, /* PNX833X_PIC_TS_IN1_TRD_INT 33 */ + 4, /* PNX833X_PIC_CLOCK_INT 34 */ + 4, /* PNX833X_PIC_SGDX_PARSER_INT 35 */ + 4, /* PNX833X_PIC_VMSP_DMA_INT 36 */ +#if defined(CONFIG_SOC_PNX8335) + 4, /* PNX8335_PIC_MIU_INT 37 */ + 4, /* PNX8335_PIC_AVCHIP_IRQ_INT 38 */ + 9, /* PNX8335_PIC_SYNC_HD_INT 39 */ + 9, /* PNX8335_PIC_DISP_HD_INT 40 */ + 9, /* PNX8335_PIC_DISP_SCALER_INT 41 */ + 4, /* PNX8335_PIC_OSD_HD1_INT 42 */ + 4, /* PNX8335_PIC_DTL_WRITER_Y_INT 43 */ + 4, /* PNX8335_PIC_DTL_WRITER_C_INT 44 */ + 4, /* PNX8335_PIC_DTL_EMULATOR_Y_IR_INT 45 */ + 4, /* PNX8335_PIC_DTL_EMULATOR_C_IR_INT 46 */ + 4, /* PNX8335_PIC_DENC_TTX_INT 47 */ + 4, /* PNX8335_PIC_MMI_SIF0_INT 48 */ + 4, /* PNX8335_PIC_MMI_SIF1_INT 49 */ + 4, /* PNX8335_PIC_MMI_CDMMU_INT 50 */ + 4, /* PNX8335_PIC_PIBCS_INT 51 */ + 12, /* PNX8335_PIC_ETHERNET_INT 52 */ + 3, /* PNX8335_PIC_VMSP1_0_INT 53 */ + 3, /* PNX8335_PIC_VMSP1_1_INT 54 */ + 4, /* PNX8335_PIC_VMSP1_DMA_INT 55 */ + 4, /* PNX8335_PIC_TDGR_DE_INT 56 */ + 4, /* PNX8335_PIC_IR1_IRQ_INT 57 */ +#endif +}; + +static void pnx833x_timer_dispatch(void) +{ + do_IRQ(mips_cpu_timer_irq); +} + +static void pic_dispatch(void) +{ + unsigned int irq = PNX833X_REGFIELD(PIC_INT_SRC, INT_SRC); + + if ((irq >= 1) && (irq < (PNX833X_PIC_NUM_IRQ))) { + unsigned long priority = PNX833X_PIC_INT_PRIORITY; + PNX833X_PIC_INT_PRIORITY = irq_prio[irq]; + + if (irq == PNX833X_PIC_GPIO_INT) { + unsigned long mask = PNX833X_PIO_INT_STATUS & PNX833X_PIO_INT_ENABLE; + int pin; + while ((pin = ffs(mask & 0xffff))) { + pin -= 1; + do_IRQ(PNX833X_GPIO_IRQ_BASE + pin); + mask &= ~(1 << pin); + } + } else { + do_IRQ(irq + PNX833X_PIC_IRQ_BASE); + } + + PNX833X_PIC_INT_PRIORITY = priority; + } else { + printk(KERN_ERR "plat_irq_dispatch: unexpected irq %u\n", irq); + } +} + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned int pending = read_c0_status() & read_c0_cause(); + + if (pending & STATUSF_IP4) + pic_dispatch(); + else if (pending & STATUSF_IP7) + do_IRQ(PNX833X_TIMER_IRQ); + else + spurious_interrupt(); +} + +static inline void pnx833x_hard_enable_pic_irq(unsigned int irq) +{ + /* Currently we do this by setting IRQ priority to 1. + If priority support is being implemented, 1 should be repalced + by a better value. */ + PNX833X_PIC_INT_REG(irq) = irq_prio[irq]; +} + +static inline void pnx833x_hard_disable_pic_irq(unsigned int irq) +{ + /* Disable IRQ by writing setting it's priority to 0 */ + PNX833X_PIC_INT_REG(irq) = 0; +} + +static int irqflags[PNX833X_PIC_NUM_IRQ]; /* initialized by zeroes */ +#define IRQFLAG_STARTED 1 +#define IRQFLAG_DISABLED 2 + +static DEFINE_SPINLOCK(pnx833x_irq_lock); + +static unsigned int pnx833x_startup_pic_irq(unsigned int irq) +{ + unsigned long flags; + unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; + + spin_lock_irqsave(&pnx833x_irq_lock, flags); + + irqflags[pic_irq] = IRQFLAG_STARTED; /* started, not disabled */ + pnx833x_hard_enable_pic_irq(pic_irq); + + spin_unlock_irqrestore(&pnx833x_irq_lock, flags); + return 0; +} + +static void pnx833x_shutdown_pic_irq(unsigned int irq) +{ + unsigned long flags; + unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; + + spin_lock_irqsave(&pnx833x_irq_lock, flags); + + irqflags[pic_irq] = 0; /* not started */ + pnx833x_hard_disable_pic_irq(pic_irq); + + spin_unlock_irqrestore(&pnx833x_irq_lock, flags); +} + +static void pnx833x_enable_pic_irq(unsigned int irq) +{ + unsigned long flags; + unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; + + spin_lock_irqsave(&pnx833x_irq_lock, flags); + + irqflags[pic_irq] &= ~IRQFLAG_DISABLED; + if (irqflags[pic_irq] == IRQFLAG_STARTED) + pnx833x_hard_enable_pic_irq(pic_irq); + + spin_unlock_irqrestore(&pnx833x_irq_lock, flags); +} + +static void pnx833x_disable_pic_irq(unsigned int irq) +{ + unsigned long flags; + unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; + + spin_lock_irqsave(&pnx833x_irq_lock, flags); + + irqflags[pic_irq] |= IRQFLAG_DISABLED; + pnx833x_hard_disable_pic_irq(pic_irq); + + spin_unlock_irqrestore(&pnx833x_irq_lock, flags); +} + +static void pnx833x_ack_pic_irq(unsigned int irq) +{ +} + +static void pnx833x_end_pic_irq(unsigned int irq) +{ +} + +static DEFINE_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock); + +static unsigned int pnx833x_startup_gpio_irq(unsigned int irq) +{ + int pin = irq - PNX833X_GPIO_IRQ_BASE; + unsigned long flags; + spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); + pnx833x_gpio_enable_irq(pin); + spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); + return 0; +} + +static void pnx833x_enable_gpio_irq(unsigned int irq) +{ + int pin = irq - PNX833X_GPIO_IRQ_BASE; + unsigned long flags; + spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); + pnx833x_gpio_enable_irq(pin); + spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); +} + +static void pnx833x_disable_gpio_irq(unsigned int irq) +{ + int pin = irq - PNX833X_GPIO_IRQ_BASE; + unsigned long flags; + spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); + pnx833x_gpio_disable_irq(pin); + spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); +} + +static void pnx833x_ack_gpio_irq(unsigned int irq) +{ +} + +static void pnx833x_end_gpio_irq(unsigned int irq) +{ + int pin = irq - PNX833X_GPIO_IRQ_BASE; + unsigned long flags; + spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); + pnx833x_gpio_clear_irq(pin); + spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); +} + +static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type) +{ + int pin = irq - PNX833X_GPIO_IRQ_BASE; + int gpio_mode; + + switch (flow_type) { + case IRQ_TYPE_EDGE_RISING: + gpio_mode = GPIO_INT_EDGE_RISING; + break; + case IRQ_TYPE_EDGE_FALLING: + gpio_mode = GPIO_INT_EDGE_FALLING; + break; + case IRQ_TYPE_EDGE_BOTH: + gpio_mode = GPIO_INT_EDGE_BOTH; + break; + case IRQ_TYPE_LEVEL_HIGH: + gpio_mode = GPIO_INT_LEVEL_HIGH; + break; + case IRQ_TYPE_LEVEL_LOW: + gpio_mode = GPIO_INT_LEVEL_LOW; + break; + default: + gpio_mode = GPIO_INT_NONE; + break; + } + + pnx833x_gpio_setup_irq(gpio_mode, pin); + + return 0; +} + +static struct irq_chip pnx833x_pic_irq_type = { + .typename = "PNX-PIC", + .startup = pnx833x_startup_pic_irq, + .shutdown = pnx833x_shutdown_pic_irq, + .enable = pnx833x_enable_pic_irq, + .disable = pnx833x_disable_pic_irq, + .ack = pnx833x_ack_pic_irq, + .end = pnx833x_end_pic_irq +}; + +static struct irq_chip pnx833x_gpio_irq_type = { + .typename = "PNX-GPIO", + .startup = pnx833x_startup_gpio_irq, + .shutdown = pnx833x_disable_gpio_irq, + .enable = pnx833x_enable_gpio_irq, + .disable = pnx833x_disable_gpio_irq, + .ack = pnx833x_ack_gpio_irq, + .end = pnx833x_end_gpio_irq, + .set_type = pnx833x_set_type_gpio_irq +}; + +void __init arch_init_irq(void) +{ + unsigned int irq; + + /* setup standard internal cpu irqs */ + mips_cpu_irq_init(); + + /* Set IRQ information in irq_desc */ + for (irq = PNX833X_PIC_IRQ_BASE; irq < (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ); irq++) { + pnx833x_hard_disable_pic_irq(irq); + set_irq_chip_and_handler(irq, &pnx833x_pic_irq_type, handle_simple_irq); + } + + for (irq = PNX833X_GPIO_IRQ_BASE; irq < (PNX833X_GPIO_IRQ_BASE + PNX833X_GPIO_NUM_IRQ); irq++) + set_irq_chip_and_handler(irq, &pnx833x_gpio_irq_type, handle_simple_irq); + + /* Set PIC priority limiter register to 0 */ + PNX833X_PIC_INT_PRIORITY = 0; + + /* Setup GPIO IRQ dispatching */ + pnx833x_startup_pic_irq(PNX833X_PIC_GPIO_INT); + + /* Enable PIC IRQs (HWIRQ2) */ + if (cpu_has_vint) + set_vi_handler(4, pic_dispatch); + + write_c0_status(read_c0_status() | IE_IRQ2); +} + +unsigned int __cpuinit get_c0_compare_int(void) +{ + if (cpu_has_vint) + set_vi_handler(cp0_compare_irq, pnx833x_timer_dispatch); + + mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; + return mips_cpu_timer_irq; +} + +void __init plat_time_init(void) +{ + /* calculate mips_hpt_frequency based on PNX833X_CLOCK_CPUCP_CTL reg */ + + extern unsigned long mips_hpt_frequency; + unsigned long reg = PNX833X_CLOCK_CPUCP_CTL; + + if (!(PNX833X_BIT(reg, CLOCK_CPUCP_CTL, EXIT_RESET))) { + /* Functional clock is disabled so use crystal frequency */ + mips_hpt_frequency = 25; + } else { +#if defined(CONFIG_SOC_PNX8335) + /* Functional clock is enabled, so get clock multiplier */ + mips_hpt_frequency = 90 + (10 * PNX8335_REGFIELD(CLOCK_PLL_CPU_CTL, FREQ)); +#else + static const unsigned long int freq[4] = {240, 160, 120, 80}; + mips_hpt_frequency = freq[PNX833X_FIELD(reg, CLOCK_CPUCP_CTL, DIV_CLOCK)]; +#endif + } + + printk(KERN_INFO "CPU clock is %ld MHz\n", mips_hpt_frequency); + + mips_hpt_frequency *= 500000; +} + diff --git a/arch/mips/nxp/pnx833x/common/platform.c b/arch/mips/nxp/pnx833x/common/platform.c new file mode 100644 index 000000000000..b1ccbcc18f78 --- /dev/null +++ b/arch/mips/nxp/pnx833x/common/platform.c @@ -0,0 +1,319 @@ +/* + * platform.c: platform support for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * Based on software written by: + * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/device.h> +#include <linux/dma-mapping.h> +#include <linux/platform_device.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/resource.h> +#include <linux/serial.h> +#include <linux/serial_pnx8xxx.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +#ifdef CONFIG_I2C_PNX0105 +/* Until i2c driver available in kernel.*/ +#include <linux/i2c-pnx0105.h> +#endif + +#include <irq.h> +#include <irq-mapping.h> +#include <pnx833x.h> + +static u64 uart_dmamask = DMA_32BIT_MASK; + +static struct resource pnx833x_uart_resources[] = { + [0] = { + .start = PNX833X_UART0_PORTS_START, + .end = PNX833X_UART0_PORTS_END, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PNX833X_PIC_UART0_INT, + .end = PNX833X_PIC_UART0_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = PNX833X_UART1_PORTS_START, + .end = PNX833X_UART1_PORTS_END, + .flags = IORESOURCE_MEM, + }, + [3] = { + .start = PNX833X_PIC_UART1_INT, + .end = PNX833X_PIC_UART1_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +struct pnx8xxx_port pnx8xxx_ports[] = { + [0] = { + .port = { + .type = PORT_PNX8XXX, + .iotype = UPIO_MEM, + .membase = (void __iomem *)PNX833X_UART0_PORTS_START, + .mapbase = PNX833X_UART0_PORTS_START, + .irq = PNX833X_PIC_UART0_INT, + .uartclk = 3692300, + .fifosize = 16, + .flags = UPF_BOOT_AUTOCONF, + .line = 0, + }, + }, + [1] = { + .port = { + .type = PORT_PNX8XXX, + .iotype = UPIO_MEM, + .membase = (void __iomem *)PNX833X_UART1_PORTS_START, + .mapbase = PNX833X_UART1_PORTS_START, + .irq = PNX833X_PIC_UART1_INT, + .uartclk = 3692300, + .fifosize = 16, + .flags = UPF_BOOT_AUTOCONF, + .line = 1, + }, + }, +}; + +static struct platform_device pnx833x_uart_device = { + .name = "pnx8xxx-uart", + .id = -1, + .dev = { + .dma_mask = &uart_dmamask, + .coherent_dma_mask = DMA_32BIT_MASK, + .platform_data = pnx8xxx_ports, + }, + .num_resources = ARRAY_SIZE(pnx833x_uart_resources), + .resource = pnx833x_uart_resources, +}; + +static u64 ehci_dmamask = DMA_32BIT_MASK; + +static struct resource pnx833x_usb_ehci_resources[] = { + [0] = { + .start = PNX833X_USB_PORTS_START, + .end = PNX833X_USB_PORTS_END, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PNX833X_PIC_USB_INT, + .end = PNX833X_PIC_USB_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pnx833x_usb_ehci_device = { + .name = "pnx833x-ehci", + .id = -1, + .dev = { + .dma_mask = &ehci_dmamask, + .coherent_dma_mask = DMA_32BIT_MASK, + }, + .num_resources = ARRAY_SIZE(pnx833x_usb_ehci_resources), + .resource = pnx833x_usb_ehci_resources, +}; + +#ifdef CONFIG_I2C_PNX0105 +static struct resource pnx833x_i2c0_resources[] = { + { + .start = PNX833X_I2C0_PORTS_START, + .end = PNX833X_I2C0_PORTS_END, + .flags = IORESOURCE_MEM, + }, + { + .start = PNX833X_PIC_I2C0_INT, + .end = PNX833X_PIC_I2C0_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource pnx833x_i2c1_resources[] = { + { + .start = PNX833X_I2C1_PORTS_START, + .end = PNX833X_I2C1_PORTS_END, + .flags = IORESOURCE_MEM, + }, + { + .start = PNX833X_PIC_I2C1_INT, + .end = PNX833X_PIC_I2C1_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct i2c_pnx0105_dev pnx833x_i2c_dev[] = { + { + .base = PNX833X_I2C0_PORTS_START, + .irq = -1, /* should be PNX833X_PIC_I2C0_INT but polling is faster */ + .clock = 6, /* 0 == 400 kHz, 4 == 100 kHz(Maximum HDMI), 6 = 50kHz(Prefered HDCP) */ + .bus_addr = 0, /* no slave support */ + }, + { + .base = PNX833X_I2C1_PORTS_START, + .irq = -1, /* on high freq, polling is faster */ + /*.irq = PNX833X_PIC_I2C1_INT,*/ + .clock = 4, /* 0 == 400 kHz, 4 == 100 kHz. 100 kHz seems a safe default for now */ + .bus_addr = 0, /* no slave support */ + }, +}; + +static struct platform_device pnx833x_i2c0_device = { + .name = "i2c-pnx0105", + .id = 0, + .dev = { + .platform_data = &pnx833x_i2c_dev[0], + }, + .num_resources = ARRAY_SIZE(pnx833x_i2c0_resources), + .resource = pnx833x_i2c0_resources, +}; + +static struct platform_device pnx833x_i2c1_device = { + .name = "i2c-pnx0105", + .id = 1, + .dev = { + .platform_data = &pnx833x_i2c_dev[1], + }, + .num_resources = ARRAY_SIZE(pnx833x_i2c1_resources), + .resource = pnx833x_i2c1_resources, +}; +#endif + +static u64 ethernet_dmamask = DMA_32BIT_MASK; + +static struct resource pnx833x_ethernet_resources[] = { + [0] = { + .start = PNX8335_IP3902_PORTS_START, + .end = PNX8335_IP3902_PORTS_END, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PNX8335_PIC_ETHERNET_INT, + .end = PNX8335_PIC_ETHERNET_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pnx833x_ethernet_device = { + .name = "ip3902-eth", + .id = -1, + .dev = { + .dma_mask = ðernet_dmamask, + .coherent_dma_mask = DMA_32BIT_MASK, + }, + .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources), + .resource = pnx833x_ethernet_resources, +}; + +static struct resource pnx833x_sata_resources[] = { + [0] = { + .start = PNX8335_SATA_PORTS_START, + .end = PNX8335_SATA_PORTS_END, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PNX8335_PIC_SATA_INT, + .end = PNX8335_PIC_SATA_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pnx833x_sata_device = { + .name = "pnx833x-sata", + .id = -1, + .num_resources = ARRAY_SIZE(pnx833x_sata_resources), + .resource = pnx833x_sata_resources, +}; + +static const char *part_probes[] = { + "cmdlinepart", + NULL +}; + +static void +pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long nandaddr = (unsigned long)this->IO_ADDR_W; + + if (cmd == NAND_CMD_NONE) + return; + + if (ctrl & NAND_CLE) + writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_CLE_MASK)); + else + writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_ALE_MASK)); +} + +static struct platform_nand_data pnx833x_flash_nand_data = { + .chip = { + .chip_delay = 25, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = pnx833x_flash_nand_cmd_ctrl + } +}; + +/* + * Set start to be the correct address (PNX8335_NAND_BASE with no 0xb!!), + * 12 bytes more seems to be the standard that allows for NAND access. + */ +static struct resource pnx833x_flash_nand_resource = { + .start = PNX8335_NAND_BASE, + .end = PNX8335_NAND_BASE + 12, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device pnx833x_flash_nand = { + .name = "gen_nand", + .id = -1, + .num_resources = 1, + .resource = &pnx833x_flash_nand_resource, + .dev = { + .platform_data = &pnx833x_flash_nand_data, + }, +}; + +static struct platform_device *pnx833x_platform_devices[] __initdata = { + &pnx833x_uart_device, + &pnx833x_usb_ehci_device, +#ifdef CONFIG_I2C_PNX0105 + &pnx833x_i2c0_device, + &pnx833x_i2c1_device, +#endif + &pnx833x_ethernet_device, + &pnx833x_sata_device, + &pnx833x_flash_nand, +}; + +static int __init pnx833x_platform_init(void) +{ + int res; + + res = platform_add_devices(pnx833x_platform_devices, + ARRAY_SIZE(pnx833x_platform_devices)); + + return res; +} + +arch_initcall(pnx833x_platform_init); diff --git a/arch/mips/nxp/pnx833x/common/prom.c b/arch/mips/nxp/pnx833x/common/prom.c new file mode 100644 index 000000000000..2a41e8fec210 --- /dev/null +++ b/arch/mips/nxp/pnx833x/common/prom.c @@ -0,0 +1,70 @@ +/* + * prom.c: + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * Based on software written by: + * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/init.h> +#include <asm/bootinfo.h> +#include <linux/string.h> + +void __init prom_init_cmdline(void) +{ + int argc = fw_arg0; + char **argv = (char **)fw_arg1; + char *c = &(arcs_cmdline[0]); + int i; + + for (i = 1; i < argc; i++) { + strcpy(c, argv[i]); + c += strlen(argv[i]); + if (i < argc-1) + *c++ = ' '; + } + *c = 0; +} + +char __init *prom_getenv(char *envname) +{ + extern char **prom_envp; + char **env = prom_envp; + int i; + + i = strlen(envname); + + while (*env) { + if (strncmp(envname, *env, i) == 0 && *(*env+i) == '=') + return *env + i + 1; + env++; + } + + return 0; +} + +void __init prom_free_prom_memory(void) +{ +} + +char * __init prom_getcmdline(void) +{ + return arcs_cmdline; +} + diff --git a/arch/mips/nxp/pnx833x/common/reset.c b/arch/mips/nxp/pnx833x/common/reset.c new file mode 100644 index 000000000000..a9bc9bacad2b --- /dev/null +++ b/arch/mips/nxp/pnx833x/common/reset.c @@ -0,0 +1,45 @@ +/* + * reset.c: reset support for PNX833X. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * Based on software written by: + * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/slab.h> +#include <linux/reboot.h> +#include <pnx833x.h> + +void pnx833x_machine_restart(char *command) +{ + PNX833X_RESET_CONTROL_2 = 0; + PNX833X_RESET_CONTROL = 0; +} + +void pnx833x_machine_halt(void) +{ + while (1) + __asm__ __volatile__ ("wait"); + +} + +void pnx833x_machine_power_off(void) +{ + pnx833x_machine_halt(); +} diff --git a/arch/mips/nxp/pnx833x/common/setup.c b/arch/mips/nxp/pnx833x/common/setup.c new file mode 100644 index 000000000000..e51fbc4b644d --- /dev/null +++ b/arch/mips/nxp/pnx833x/common/setup.c @@ -0,0 +1,64 @@ +/* + * setup.c: Setup PNX833X Soc. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * Based on software written by: + * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/io.h> +#include <linux/pci.h> +#include <asm/reboot.h> +#include <pnx833x.h> +#include <gpio.h> + +extern void pnx833x_board_setup(void); +extern void pnx833x_machine_restart(char *); +extern void pnx833x_machine_halt(void); +extern void pnx833x_machine_power_off(void); + +int __init plat_mem_setup(void) +{ + /* fake pci bus to avoid bounce buffers */ + PCI_DMA_BUS_IS_PHYS = 1; + + /* set mips clock to 320MHz */ +#if defined(CONFIG_SOC_PNX8335) + PNX8335_WRITEFIELD(0x17, CLOCK_PLL_CPU_CTL, FREQ); +#endif + pnx833x_gpio_init(); /* so it will be ready in board_setup() */ + + pnx833x_board_setup(); + + _machine_restart = pnx833x_machine_restart; + _machine_halt = pnx833x_machine_halt; + pm_power_off = pnx833x_machine_power_off; + + /* IO/MEM resources. */ + set_io_port_base(KSEG1); + ioport_resource.start = 0; + ioport_resource.end = ~0; + iomem_resource.start = 0; + iomem_resource.end = ~0; + + return 0; +} diff --git a/arch/mips/nxp/pnx833x/stb22x/Makefile b/arch/mips/nxp/pnx833x/stb22x/Makefile new file mode 100644 index 000000000000..f81c5801f455 --- /dev/null +++ b/arch/mips/nxp/pnx833x/stb22x/Makefile @@ -0,0 +1,3 @@ +lib-y := board.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/mips/nxp/pnx833x/stb22x/board.c b/arch/mips/nxp/pnx833x/stb22x/board.c new file mode 100644 index 000000000000..90cc604bdadf --- /dev/null +++ b/arch/mips/nxp/pnx833x/stb22x/board.c @@ -0,0 +1,133 @@ +/* + * board.c: STB225 board support. + * + * Copyright 2008 NXP Semiconductors + * Chris Steel <chris.steel@nxp.com> + * Daniel Laird <daniel.j.laird@nxp.com> + * + * Based on software written by: + * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/init.h> +#include <asm/bootinfo.h> +#include <linux/mm.h> +#include <pnx833x.h> +#include <gpio.h> + +/* endianess twiddlers */ +#define PNX8335_DEBUG0 0x4400 +#define PNX8335_DEBUG1 0x4404 +#define PNX8335_DEBUG2 0x4408 +#define PNX8335_DEBUG3 0x440c +#define PNX8335_DEBUG4 0x4410 +#define PNX8335_DEBUG5 0x4414 +#define PNX8335_DEBUG6 0x4418 +#define PNX8335_DEBUG7 0x441c + +int prom_argc; +char **prom_argv = 0, **prom_envp = 0; + +extern void prom_init_cmdline(void); +extern char *prom_getenv(char *envname); + +const char *get_system_type(void) +{ + return "NXP STB22x"; +} + +static inline unsigned long env_or_default(char *env, unsigned long dfl) +{ + char *str = prom_getenv(env); + return str ? simple_strtol(str, 0, 0) : dfl; +} + +void __init prom_init(void) +{ + unsigned long memsize; + + prom_argc = fw_arg0; + prom_argv = (char **)fw_arg1; + prom_envp = (char **)fw_arg2; + + prom_init_cmdline(); + + memsize = env_or_default("memsize", 0x02000000); + add_memory_region(0, memsize, BOOT_MEM_RAM); +} + +void __init pnx833x_board_setup(void) +{ + pnx833x_gpio_select_function_alt(4); + pnx833x_gpio_select_output(4); + pnx833x_gpio_select_function_alt(5); + pnx833x_gpio_select_input(5); + pnx833x_gpio_select_function_alt(6); + pnx833x_gpio_select_input(6); + pnx833x_gpio_select_function_alt(7); + pnx833x_gpio_select_output(7); + + pnx833x_gpio_select_function_alt(25); + pnx833x_gpio_select_function_alt(26); + + pnx833x_gpio_select_function_alt(27); + pnx833x_gpio_select_function_alt(28); + pnx833x_gpio_select_function_alt(29); + pnx833x_gpio_select_function_alt(30); + pnx833x_gpio_select_function_alt(31); + pnx833x_gpio_select_function_alt(32); + pnx833x_gpio_select_function_alt(33); + +#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) + /* Setup MIU for NAND access on CS0... + * + * (it seems that we must also configure CS1 for reliable operation, + * otherwise the first read ID command will fail if it's read as 4 bytes + * but pass if it's read as 1 word.) + */ + + /* Setup MIU CS0 & CS1 timing */ + PNX833X_MIU_SEL0 = 0; + PNX833X_MIU_SEL1 = 0; + PNX833X_MIU_SEL0_TIMING = 0x50003081; + PNX833X_MIU_SEL1_TIMING = 0x50003081; + + /* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */ + pnx833x_gpio_select_function_alt(0); + + /* Setup GPIO 04 to input NAND read/busy signal */ + pnx833x_gpio_select_function_io(4); + pnx833x_gpio_select_input(4); + + /* Setup GPIO 05 to disable NAND write protect */ + pnx833x_gpio_select_function_io(5); + pnx833x_gpio_select_output(5); + pnx833x_gpio_write(1, 5); + +#elif defined(CONFIG_MTD_CFI) || defined(CONFIG_MTD_CFI_MODULE) + + /* Set up MIU for 16-bit NOR access on CS0 and CS1... */ + + /* Setup MIU CS0 & CS1 timing */ + PNX833X_MIU_SEL0 = 1; + PNX833X_MIU_SEL1 = 1; + PNX833X_MIU_SEL0_TIMING = 0x6A08D082; + PNX833X_MIU_SEL1_TIMING = 0x6A08D082; + + /* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */ + pnx833x_gpio_select_function_alt(0); +#endif +} diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index b1886244cedf..e8a97f59e066 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -13,7 +13,7 @@ obj-$(CONFIG_MIPS_MSC) += ops-msc.o obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o -obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o +obj-$(CONFIG_NEC_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c index 846eae9cdd05..fba5aad00d51 100644 --- a/arch/mips/pci/fixup-emma2rh.c +++ b/arch/mips/pci/fixup-emma2rh.c @@ -30,7 +30,7 @@ #include <asm/bootinfo.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> #define EMMA2RH_PCI_HOST_SLOT 0x09 #define EMMA2RH_USB_SLOT 0x03 diff --git a/arch/mips/pci/fixup-rc32434.c b/arch/mips/pci/fixup-rc32434.c index 75b90dcb7a09..3d86823d03a0 100644 --- a/arch/mips/pci/fixup-rc32434.c +++ b/arch/mips/pci/fixup-rc32434.c @@ -30,6 +30,7 @@ #include <linux/init.h> #include <asm/mach-rc32434/rc32434.h> +#include <asm/mach-rc32434/irq.h> static int __devinitdata irq_map[2][12] = { {0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1}, diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c index d31bfc6d4150..5947a70b0b7f 100644 --- a/arch/mips/pci/ops-emma2rh.c +++ b/arch/mips/pci/ops-emma2rh.c @@ -30,7 +30,7 @@ #include <asm/addrspace.h> #include <asm/debug.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> #define RTABORT (0x1<<9) #define RMABORT (0x1<<10) diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c index 772e283daa63..2df4190232cd 100644 --- a/arch/mips/pci/pci-emma2rh.c +++ b/arch/mips/pci/pci-emma2rh.c @@ -30,7 +30,7 @@ #include <asm/bootinfo.h> -#include <asm/emma2rh/emma2rh.h> +#include <asm/emma/emma2rh.h> static struct resource pci_io_resource = { .name = "pci IO space", diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c index 31619c601b11..2f22d714d5b0 100644 --- a/arch/mips/rb532/devices.c +++ b/arch/mips/rb532/devices.c @@ -280,7 +280,7 @@ static int __init plat_setup_devices(void) { /* Look for the CF card reader */ if (!readl(IDT434_REG_BASE + DEV1MASK)) - rb532_devs[1] = NULL; + rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */ else { cf_slot0_res[0].start = readl(IDT434_REG_BASE + DEV1BASE); diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 76a7fd96d564..70c4a6726377 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -310,6 +310,10 @@ int __init rb532_gpio_init(void) return -ENXIO; } + /* Set the interrupt status and level for the CF pin */ + rb532_gpio_set_int_level(&rb532_gpio_chip->chip, CF_GPIO_NUM, 1); + rb532_gpio_set_int_status(&rb532_gpio_chip->chip, CF_GPIO_NUM, 0); + return 0; } arch_initcall(rb532_gpio_init); diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index f6d9bf4b26e7..f8b18af141a1 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -12,20 +12,11 @@ #include <linux/types.h> #include <linux/init.h> #include <linux/kernel_stat.h> -#include <linux/signal.h> -#include <linux/sched.h> #include <linux/interrupt.h> -#include <linux/irq.h> -#include <asm/mipsregs.h> -#include <asm/addrspace.h> #include <asm/irq_cpu.h> -#include <asm/sgi/ioc.h> #include <asm/sgi/hpc3.h> #include <asm/sgi/ip22.h> -#include <asm/time.h> - -/* #define DEBUG_SGINT */ /* So far nothing hangs here */ #undef USE_LIO3_IRQ @@ -68,7 +59,7 @@ static void enable_local1_irq(unsigned int irq) sgint->imask1 |= (1 << (irq - SGINT_LOCAL1)); } -void disable_local1_irq(unsigned int irq) +static void disable_local1_irq(unsigned int irq) { sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1)); } @@ -87,7 +78,7 @@ static void enable_local2_irq(unsigned int irq) sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2)); } -void disable_local2_irq(unsigned int irq) +static void disable_local2_irq(unsigned int irq) { sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2)); if (!sgint->cmeimask0) @@ -108,7 +99,7 @@ static void enable_local3_irq(unsigned int irq) sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3)); } -void disable_local3_irq(unsigned int irq) +static void disable_local3_irq(unsigned int irq) { sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3)); if (!sgint->cmeimask1) @@ -344,6 +335,6 @@ void __init arch_init_irq(void) #ifdef CONFIG_EISA if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */ - ip22_eisa_init(); + ip22_eisa_init(); #endif } diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 17052db4161d..226e8bb2f0a1 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -46,9 +46,10 @@ config TOSHIBA_RBTX4938 support this machine type config TOSHIBA_RBTX4939 - bool "Toshiba RBTX4939 bobard" + bool "Toshiba RBTX4939 board" depends on MACH_TX49XX select SOC_TX4939 + select TXX9_7SEGLED help This Toshiba board is based on the TX4939 processor. Say Y here to support this machine type @@ -86,6 +87,9 @@ config SOC_TX4939 select HW_HAS_PCI select PCI_TX4927 +config TXX9_7SEGLED + bool + config TOSHIBA_FPCIB0 bool "FPCIB0 Backplane Support" depends on PCI && MACH_TXX9 diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c new file mode 100644 index 000000000000..727ab21b6618 --- /dev/null +++ b/arch/mips/txx9/generic/7segled.c @@ -0,0 +1,112 @@ +/* + * 7 Segment LED routines + * Based on RBTX49xx patch from CELF patch archive. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * (C) Copyright TOSHIBA CORPORATION 2005-2007 + * All Rights Reserved. + */ +#include <linux/sysdev.h> +#include <linux/slab.h> +#include <linux/map_to_7segment.h> +#include <asm/txx9/generic.h> + +static unsigned int tx_7segled_num; +static void (*tx_7segled_putc)(unsigned int pos, unsigned char val); + +void __init txx9_7segled_init(unsigned int num, + void (*putc)(unsigned int pos, unsigned char val)) +{ + tx_7segled_num = num; + tx_7segled_putc = putc; +} + +static SEG7_CONVERSION_MAP(txx9_seg7map, MAP_ASCII7SEG_ALPHANUM_LC); + +int txx9_7segled_putc(unsigned int pos, char c) +{ + if (pos >= tx_7segled_num) + return -EINVAL; + c = map_to_seg7(&txx9_seg7map, c); + if (c < 0) + return c; + tx_7segled_putc(pos, c); + return 0; +} + +static ssize_t ascii_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + unsigned int ch = dev->id; + txx9_7segled_putc(ch, buf[0]); + return size; +} + +static ssize_t raw_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + unsigned int ch = dev->id; + tx_7segled_putc(ch, buf[0]); + return size; +} + +static SYSDEV_ATTR(ascii, 0200, NULL, ascii_store); +static SYSDEV_ATTR(raw, 0200, NULL, raw_store); + +static ssize_t map_seg7_show(struct sysdev_class *class, char *buf) +{ + memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map)); + return sizeof(txx9_seg7map); +} + +static ssize_t map_seg7_store(struct sysdev_class *class, + const char *buf, size_t size) +{ + if (size != sizeof(txx9_seg7map)) + return -EINVAL; + memcpy(&txx9_seg7map, buf, size); + return size; +} + +static SYSDEV_CLASS_ATTR(map_seg7, 0600, map_seg7_show, map_seg7_store); + +static struct sysdev_class tx_7segled_sysdev_class = { + .name = "7segled", +}; + +static int __init tx_7segled_init_sysfs(void) +{ + int error, i; + if (!tx_7segled_num) + return -ENODEV; + error = sysdev_class_register(&tx_7segled_sysdev_class); + if (error) + return error; + error = sysdev_class_create_file(&tx_7segled_sysdev_class, + &attr_map_seg7); + if (error) + return error; + for (i = 0; i < tx_7segled_num; i++) { + struct sys_device *dev; + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) { + error = -ENODEV; + break; + } + dev->id = i; + dev->cls = &tx_7segled_sysdev_class; + error = sysdev_register(dev); + if (!error) { + sysdev_create_file(dev, &attr_ascii); + sysdev_create_file(dev, &attr_raw); + } + } + return error; +} + +device_initcall(tx_7segled_init_sysfs); diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index 0030d23bef5b..f2579ce054a1 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile @@ -10,5 +10,6 @@ obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o obj-$(CONFIG_SOC_TX4939) += setup_tx4939.o irq_tx4939.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o obj-$(CONFIG_SPI) += spi_eeprom.o +obj-$(CONFIG_TXX9_7SEGLED) += 7segled.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 5526375010f8..a13a08b8c9ec 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -156,11 +156,23 @@ static struct txx9_board_vec *__init find_board_byname(const char *name) static void __init prom_init_cmdline(void) { - int argc = (int)fw_arg0; - int *argv32 = (int *)fw_arg1; + int argc; + int *argv32; int i; /* Always ignore the "-c" at argv[0] */ char builtin[CL_SIZE]; + if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { + /* + * argc is not a valid number, or argv32 is not a valid + * pointer + */ + argc = 0; + argv32 = NULL; + } else { + argc = (int)fw_arg0; + argv32 = (int *)fw_arg1; + } + /* ignore all built-in args if any f/w args given */ /* * But if built-in strings was started with '+', append them @@ -414,10 +426,12 @@ char * __init prom_getcmdline(void) const char *__init prom_getenv(const char *name) { - const s32 *str = (const s32 *)fw_arg2; + const s32 *str; - if (!str) + if (fw_arg2 < CKSEG0) return NULL; + + str = (const s32 *)fw_arg2; /* YAMON style ("name", "value" pairs) */ while (str[0] && str[1]) { if (!strcmp((const char *)(unsigned long)str[0], name)) @@ -622,6 +636,21 @@ unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; EXPORT_SYMBOL(__swizzle_addr_b); #endif +#ifdef NEEDS_TXX9_IOSWABW +static u16 ioswabw_default(volatile u16 *a, u16 x) +{ + return le16_to_cpu(x); +} +static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) +{ + return x; +} +u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; +EXPORT_SYMBOL(ioswabw); +u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; +EXPORT_SYMBOL(__mem_ioswabw); +#endif + void __init txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size, const struct physmap_flash_data *pdata) diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index af724e53ef91..25819ff1c350 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -16,6 +16,7 @@ #include <linux/param.h> #include <linux/ptrace.h> #include <linux/mtd/physmap.h> +#include <linux/platform_device.h> #include <asm/reboot.h> #include <asm/traps.h> #include <asm/txx9irq.h> @@ -335,6 +336,52 @@ void __init tx4938_mtd_init(int ch) txx9_physmap_flash_init(ch, start, size, &pdata); } +void __init tx4938_ata_init(unsigned int irq, unsigned int shift, int tune) +{ + struct platform_device *pdev; + struct resource res[] = { + { + /* .start and .end are filled in later */ + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .flags = IORESOURCE_IRQ, + }, + }; + struct tx4938ide_platform_info pdata = { + .ioport_shift = shift, + /* + * The IDE driver should not change bus timings if other ISA + * devices existed. + */ + .gbus_clock = tune ? txx9_gbus_clock : 0, + }; + u64 ebccr; + int i; + + if ((__raw_readq(&tx4938_ccfgptr->pcfg) & + (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) + != TX4938_PCFG_ATA_SEL) + return; + for (i = 0; i < 8; i++) { + /* check EBCCRn.ISA, EBCCRn.BSZ, EBCCRn.ME */ + ebccr = __raw_readq(&tx4938_ebuscptr->cr[i]); + if ((ebccr & 0x00f00008) == 0x00e00008) + break; + } + if (i == 8) + return; + pdata.ebus_ch = i; + res[0].start = ((ebccr >> 48) << 20) + 0x10000; + res[0].end = res[0].start + 0x20000 - 1; + pdev = platform_device_alloc("tx4938ide", -1); + if (!pdev || + platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || + platform_device_add_data(pdev, &pdata, sizeof(pdata)) || + platform_device_add(pdev)) + platform_device_put(pdev); +} + static void __init tx4938_stop_unused_modules(void) { __u64 pcfg, rst = 0, ckd = 0; diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index e077cc4d3a59..547ff2920bf0 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -352,6 +352,7 @@ static void __init rbtx4938_device_init(void) rbtx4938_ne_init(); tx4938_wdt_init(); rbtx4938_mtd_init(); + tx4938_ata_init(RBTX4938_IRQ_IOC_ATA, 0, 1); txx9_iocled_init(RBTX4938_LED_ADDR - IO_BASE, -1, 8, 1, "green", NULL); } diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c index 9855d7bccc20..6daee9b1cd5e 100644 --- a/arch/mips/txx9/rbtx4939/setup.c +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -14,6 +14,8 @@ #include <linux/types.h> #include <linux/platform_device.h> #include <linux/leds.h> +#include <linux/interrupt.h> +#include <linux/smc91x.h> #include <asm/reboot.h> #include <asm/txx9/generic.h> #include <asm/txx9/pci.h> @@ -33,6 +35,21 @@ static void __init rbtx4939_time_init(void) tx4939_time_init(0); } +#if defined(__BIG_ENDIAN) && \ + (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)) +#define HAVE_RBTX4939_IOSWAB +#define IS_CE1_ADDR(addr) \ + ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1)) +static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x) +{ + return IS_CE1_ADDR(a) ? x : le16_to_cpu(x); +} +static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x) +{ + return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x); +} +#endif /* __BIG_ENDIAN && CONFIG_SMC91X */ + static void __init rbtx4939_pci_setup(void) { #ifdef CONFIG_PCI @@ -239,6 +256,32 @@ static inline void rbtx4939_led_setup(void) } #endif +static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val) +{ +#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) + unsigned long flags; + local_irq_save(flags); + /* bit7: reserved for LED class */ + led_val[pos] = (led_val[pos] & 0x80) | (val & 0x7f); + val = led_val[pos]; + local_irq_restore(flags); +#endif + writeb(val, rbtx4939_7seg_addr(pos / 4, pos % 4)); +} + +static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val) +{ + /* convert from map_to_seg7() notation */ + val = (val & 0x88) | + ((val & 0x40) >> 6) | + ((val & 0x20) >> 4) | + ((val & 0x10) >> 2) | + ((val & 0x04) << 2) | + ((val & 0x02) << 4) | + ((val & 0x01) << 6); + __rbtx4939_7segled_putc(pos, val); +} + static void __init rbtx4939_arch_init(void) { rbtx4939_pci_setup(); @@ -246,6 +289,22 @@ static void __init rbtx4939_arch_init(void) static void __init rbtx4939_device_init(void) { + unsigned long smc_addr = RBTX4939_ETHER_ADDR - IO_BASE; + struct resource smc_res[] = { + { + .start = smc_addr, + .end = smc_addr + 0x10 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = RBTX4939_IRQ_ETHER, + /* override default irq flag defined in smc91x.h */ + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, + }, + }; + struct smc91x_platdata smc_pdata = { + .flags = SMC91X_USE_16BIT, + }; + struct platform_device *pdev; #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) int i, j; unsigned char ethaddr[2][6]; @@ -262,6 +321,12 @@ static void __init rbtx4939_device_init(void) } tx4939_ethaddr_init(ethaddr[0], ethaddr[1]); #endif + pdev = platform_device_alloc("smc91x", -1); + if (!pdev || + platform_device_add_resources(pdev, smc_res, ARRAY_SIZE(smc_res)) || + platform_device_add_data(pdev, &smc_pdata, sizeof(smc_pdata)) || + platform_device_add(pdev)) + platform_device_put(pdev); rbtx4939_led_setup(); tx4939_wdt_init(); tx4939_ata_init(); @@ -269,6 +334,8 @@ static void __init rbtx4939_device_init(void) static void __init rbtx4939_setup(void) { + int i; + rbtx4939_ebusc_setup(); /* always enable ATA0 */ txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE); @@ -276,9 +343,16 @@ static void __init rbtx4939_setup(void) if (txx9_master_clock == 0) txx9_master_clock = 20000000; tx4939_setup(); +#ifdef HAVE_RBTX4939_IOSWAB + ioswabw = rbtx4939_ioswabw; + __mem_ioswabw = rbtx4939_mem_ioswabw; +#endif _machine_restart = rbtx4939_machine_restart; + txx9_7segled_init(RBTX4939_MAX_7SEGLEDS, rbtx4939_7segled_putc); + for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) + txx9_7segled_putc(i, '-'); pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n", readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr), readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr)); diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 70b7645ce745..8116a3328a19 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -241,19 +241,17 @@ config PACK_STACK Say Y if you are unsure. config SMALL_STACK - bool "Use 4kb/8kb for kernel stack instead of 8kb/16kb" - depends on PACK_STACK && !LOCKDEP + bool "Use 8kb for kernel stack instead of 16kb" + depends on PACK_STACK && 64BIT && !LOCKDEP help If you say Y here and the compiler supports the -mkernel-backchain - option the kernel will use a smaller kernel stack size. For 31 bit - the reduced size is 4kb instead of 8kb and for 64 bit it is 8kb - instead of 16kb. This allows to run more thread on a system and - reduces the pressure on the memory management for higher order - page allocations. + option the kernel will use a smaller kernel stack size. The reduced + size is 8kb instead of 16kb. This allows to run more threads on a + system and reduces the pressure on the memory management for higher + order page allocations. Say N if you are unsure. - config CHECK_STACK bool "Detect kernel stack overflow" help @@ -384,7 +382,7 @@ config IPL choice prompt "IPL method generated into head.S" depends on IPL - default IPL_TAPE + default IPL_VM help Select "tape" if you want to IPL the image from a Tape. diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c index a7f8979fb925..a06a47cdd5e0 100644 --- a/arch/s390/appldata/appldata_base.c +++ b/arch/s390/appldata/appldata_base.c @@ -424,7 +424,7 @@ out: */ int appldata_register_ops(struct appldata_ops *ops) { - if ((ops->size > APPLDATA_MAX_REC_SIZE) || (ops->size < 0)) + if (ops->size > APPLDATA_MAX_REC_SIZE) return -EINVAL; ops->ctl_table = kzalloc(4 * sizeof(struct ctl_table), GFP_KERNEL); diff --git a/arch/s390/include/asm/kvm_virtio.h b/arch/s390/include/asm/kvm_virtio.h index 146100224def..c13568b9351c 100644 --- a/arch/s390/include/asm/kvm_virtio.h +++ b/arch/s390/include/asm/kvm_virtio.h @@ -52,7 +52,7 @@ struct kvm_vqconfig { #ifdef __KERNEL__ /* early virtio console setup */ -#ifdef CONFIG_VIRTIO_CONSOLE +#ifdef CONFIG_S390_GUEST extern void s390_virtio_console_init(void); #else static inline void s390_virtio_console_init(void) diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h index 5dd5e7b3476f..d2b4ff831477 100644 --- a/arch/s390/include/asm/mmu.h +++ b/arch/s390/include/asm/mmu.h @@ -7,7 +7,8 @@ typedef struct { unsigned long asce_bits; unsigned long asce_limit; int noexec; - int pgstes; + int has_pgste; /* The mmu context has extended page tables */ + int alloc_pgste; /* cloned contexts will have extended page tables */ } mm_context_t; #endif diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h index 4c2fbf48c9c4..28ec870655af 100644 --- a/arch/s390/include/asm/mmu_context.h +++ b/arch/s390/include/asm/mmu_context.h @@ -20,12 +20,25 @@ static inline int init_new_context(struct task_struct *tsk, #ifdef CONFIG_64BIT mm->context.asce_bits |= _ASCE_TYPE_REGION3; #endif - if (current->mm->context.pgstes) { + if (current->mm->context.alloc_pgste) { + /* + * alloc_pgste indicates, that any NEW context will be created + * with extended page tables. The old context is unchanged. The + * page table allocation and the page table operations will + * look at has_pgste to distinguish normal and extended page + * tables. The only way to create extended page tables is to + * set alloc_pgste and then create a new context (e.g. dup_mm). + * The page table allocation is called after init_new_context + * and if has_pgste is set, it will create extended page + * tables. + */ mm->context.noexec = 0; - mm->context.pgstes = 1; + mm->context.has_pgste = 1; + mm->context.alloc_pgste = 1; } else { mm->context.noexec = s390_noexec; - mm->context.pgstes = 0; + mm->context.has_pgste = 0; + mm->context.alloc_pgste = 0; } mm->context.asce_limit = STACK_TOP_MAX; crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h index 1a928f84afd6..7fc76133b3e4 100644 --- a/arch/s390/include/asm/pgtable.h +++ b/arch/s390/include/asm/pgtable.h @@ -679,7 +679,7 @@ static inline void pmd_clear(pmd_t *pmd) static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { - if (mm->context.pgstes) + if (mm->context.has_pgste) ptep_rcp_copy(ptep); pte_val(*ptep) = _PAGE_TYPE_EMPTY; if (mm->context.noexec) @@ -763,7 +763,7 @@ static inline int kvm_s390_test_and_clear_page_dirty(struct mm_struct *mm, struct page *page; unsigned int skey; - if (!mm->context.pgstes) + if (!mm->context.has_pgste) return -EINVAL; rcp_lock(ptep); pgste = (unsigned long *) (ptep + PTRS_PER_PTE); @@ -794,7 +794,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, int young; unsigned long *pgste; - if (!vma->vm_mm->context.pgstes) + if (!vma->vm_mm->context.has_pgste) return 0; physpage = pte_val(*ptep) & PAGE_MASK; pgste = (unsigned long *) (ptep + PTRS_PER_PTE); @@ -844,7 +844,7 @@ static inline void __ptep_ipte(unsigned long address, pte_t *ptep) static inline void ptep_invalidate(struct mm_struct *mm, unsigned long address, pte_t *ptep) { - if (mm->context.pgstes) { + if (mm->context.has_pgste) { rcp_lock(ptep); __ptep_ipte(address, ptep); ptep_rcp_copy(ptep); diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h index de3fad60c682..c1eaf9604da7 100644 --- a/arch/s390/include/asm/thread_info.h +++ b/arch/s390/include/asm/thread_info.h @@ -15,13 +15,8 @@ * Size of kernel stack for each process */ #ifndef __s390x__ -#ifndef __SMALL_STACK #define THREAD_ORDER 1 #define ASYNC_ORDER 1 -#else -#define THREAD_ORDER 0 -#define ASYNC_ORDER 0 -#endif #else /* __s390x__ */ #ifndef __SMALL_STACK #define THREAD_ORDER 2 diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index 9e8b1f9b8f4d..b5595688a477 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c @@ -1119,9 +1119,7 @@ out: return rc; } -static ssize_t __ref rescan_store(struct sys_device *dev, - struct sysdev_attribute *attr, - const char *buf, +static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf, size_t count) { int rc; @@ -1129,12 +1127,10 @@ static ssize_t __ref rescan_store(struct sys_device *dev, rc = smp_rescan_cpus(); return rc ? rc : count; } -static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store); +static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store); #endif /* CONFIG_HOTPLUG_CPU */ -static ssize_t dispatching_show(struct sys_device *dev, - struct sysdev_attribute *attr, - char *buf) +static ssize_t dispatching_show(struct sysdev_class *class, char *buf) { ssize_t count; @@ -1144,9 +1140,8 @@ static ssize_t dispatching_show(struct sys_device *dev, return count; } -static ssize_t dispatching_store(struct sys_device *dev, - struct sysdev_attribute *attr, - const char *buf, size_t count) +static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf, + size_t count) { int val, rc; char delim; @@ -1168,7 +1163,8 @@ out: put_online_cpus(); return rc ? rc : count; } -static SYSDEV_ATTR(dispatching, 0644, dispatching_show, dispatching_store); +static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show, + dispatching_store); static int __init topology_init(void) { @@ -1178,13 +1174,11 @@ static int __init topology_init(void) register_cpu_notifier(&smp_cpu_nb); #ifdef CONFIG_HOTPLUG_CPU - rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, - &attr_rescan.attr); + rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan); if (rc) return rc; #endif - rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, - &attr_dispatching.attr); + rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching); if (rc) return rc; for_each_present_cpu(cpu) { diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c index 3d98ba82ea67..ef3635b52fc0 100644 --- a/arch/s390/mm/pgtable.c +++ b/arch/s390/mm/pgtable.c @@ -169,7 +169,7 @@ unsigned long *page_table_alloc(struct mm_struct *mm) unsigned long *table; unsigned long bits; - bits = (mm->context.noexec || mm->context.pgstes) ? 3UL : 1UL; + bits = (mm->context.noexec || mm->context.has_pgste) ? 3UL : 1UL; spin_lock(&mm->page_table_lock); page = NULL; if (!list_empty(&mm->context.pgtable_list)) { @@ -186,7 +186,7 @@ unsigned long *page_table_alloc(struct mm_struct *mm) pgtable_page_ctor(page); page->flags &= ~FRAG_MASK; table = (unsigned long *) page_to_phys(page); - if (mm->context.pgstes) + if (mm->context.has_pgste) clear_table_pgstes(table); else clear_table(table, _PAGE_TYPE_EMPTY, PAGE_SIZE); @@ -210,7 +210,7 @@ void page_table_free(struct mm_struct *mm, unsigned long *table) struct page *page; unsigned long bits; - bits = (mm->context.noexec || mm->context.pgstes) ? 3UL : 1UL; + bits = (mm->context.noexec || mm->context.has_pgste) ? 3UL : 1UL; bits <<= (__pa(table) & (PAGE_SIZE - 1)) / 256 / sizeof(unsigned long); page = pfn_to_page(__pa(table) >> PAGE_SHIFT); spin_lock(&mm->page_table_lock); @@ -257,7 +257,7 @@ int s390_enable_sie(void) struct mm_struct *mm, *old_mm; /* Do we have pgstes? if yes, we are done */ - if (tsk->mm->context.pgstes) + if (tsk->mm->context.has_pgste) return 0; /* lets check if we are allowed to replace the mm */ @@ -269,14 +269,14 @@ int s390_enable_sie(void) } task_unlock(tsk); - /* we copy the mm with pgstes enabled */ - tsk->mm->context.pgstes = 1; + /* we copy the mm and let dup_mm create the page tables with_pgstes */ + tsk->mm->context.alloc_pgste = 1; mm = dup_mm(tsk); - tsk->mm->context.pgstes = 0; + tsk->mm->context.alloc_pgste = 0; if (!mm) return -ENOMEM; - /* Now lets check again if somebody attached ptrace etc */ + /* Now lets check again if something happened */ task_lock(tsk); if (!tsk->mm || atomic_read(&tsk->mm->mm_users) > 1 || tsk->mm != tsk->active_mm || tsk->mm->ioctx_list) { diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c index 4dd1ba752ce6..9c115823c4b5 100644 --- a/arch/sparc/kernel/apc.c +++ b/arch/sparc/kernel/apc.c @@ -31,7 +31,7 @@ #define APC_DEVNAME "apc" static u8 __iomem *regs; -static int apc_no_idle __initdata = 0; +static int apc_no_idle __devinitdata = 0; #define apc_readb(offs) (sbus_readb(regs+offs)) #define apc_writeb(val, offs) (sbus_writeb(val, regs+offs)) diff --git a/arch/sparc/kernel/head.S b/arch/sparc/kernel/head.S index 2d325fd84579..2fe2c117e772 100644 --- a/arch/sparc/kernel/head.S +++ b/arch/sparc/kernel/head.S @@ -465,6 +465,7 @@ gokernel: mov %o7, %g4 ! Save %o7 /* Jump to it, and pray... */ + __INIT current_pc: call 1f nop diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S index 704a3afcfd06..83abd5ae88a4 100644 --- a/arch/sparc64/kernel/trampoline.S +++ b/arch/sparc64/kernel/trampoline.S @@ -328,6 +328,12 @@ after_lock_tlb: wrpr %g0, 0, %wstate + sethi %hi(prom_entry_lock), %g2 +1: ldstub [%g2 + %lo(prom_entry_lock)], %g1 + membar #StoreLoad | #StoreStore + brnz,pn %g1, 1b + nop + /* As a hack, put &init_thread_union into %g6. * prom_world() loads from here to restore the %asi * register. @@ -337,7 +343,7 @@ after_lock_tlb: sethi %hi(is_sun4v), %o0 lduw [%o0 + %lo(is_sun4v)], %o0 - brz,pt %o0, 1f + brz,pt %o0, 2f nop TRAP_LOAD_TRAP_BLOCK(%g2, %g3) @@ -369,10 +375,10 @@ after_lock_tlb: call %o1 add %sp, (2047 + 128), %o0 - ba,pt %xcc, 2f + ba,pt %xcc, 3f nop -1: sethi %hi(sparc64_ttable_tl0), %o0 +2: sethi %hi(sparc64_ttable_tl0), %o0 set prom_set_trap_table_name, %g2 stx %g2, [%sp + 2047 + 128 + 0x00] mov 1, %g2 @@ -386,7 +392,11 @@ after_lock_tlb: call %o1 add %sp, (2047 + 128), %o0 -2: ldx [%l0], %g6 +3: sethi %hi(prom_entry_lock), %g2 + stb %g0, [%g2 + %lo(prom_entry_lock)] + membar #StoreStore | #StoreLoad + + ldx [%l0], %g6 ldx [%g6 + TI_TASK], %g4 mov 1, %g5 diff --git a/arch/x86/boot/video-bios.c b/arch/x86/boot/video-bios.c index 49f26aaaebc8..3fa979c9c363 100644 --- a/arch/x86/boot/video-bios.c +++ b/arch/x86/boot/video-bios.c @@ -17,7 +17,7 @@ #include "boot.h" #include "video.h" -__videocard video_bios; +static __videocard video_bios; /* Set a conventional BIOS mode */ static int set_bios_mode(u8 mode); @@ -119,7 +119,7 @@ static int bios_probe(void) return nmodes; } -__videocard video_bios = +static __videocard video_bios = { .card_name = "BIOS", .probe = bios_probe, diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c index 99b3079dc6ab..75115849af33 100644 --- a/arch/x86/boot/video-vesa.c +++ b/arch/x86/boot/video-vesa.c @@ -20,7 +20,7 @@ static struct vesa_general_info vginfo; static struct vesa_mode_info vminfo; -__videocard video_vesa; +static __videocard video_vesa; #ifndef _WAKEUP static void vesa_store_mode_params_graphics(void); @@ -293,7 +293,7 @@ void vesa_store_edid(void) #endif /* not _WAKEUP */ -__videocard video_vesa = +static __videocard video_vesa = { .card_name = "VESA", .probe = vesa_probe, diff --git a/arch/x86/include/asm/syscall.h b/arch/x86/include/asm/syscall.h index 1d88f6957d39..d82f39bb7905 100644 --- a/arch/x86/include/asm/syscall.h +++ b/arch/x86/include/asm/syscall.h @@ -93,26 +93,26 @@ static inline void syscall_get_arguments(struct task_struct *task, { # ifdef CONFIG_IA32_EMULATION if (task_thread_info(task)->status & TS_COMPAT) - switch (i + n) { - case 6: + switch (i) { + case 0: if (!n--) break; - *args++ = regs->bp; - case 5: + *args++ = regs->bx; + case 1: if (!n--) break; - *args++ = regs->di; - case 4: + *args++ = regs->cx; + case 2: if (!n--) break; - *args++ = regs->si; + *args++ = regs->dx; case 3: if (!n--) break; - *args++ = regs->dx; - case 2: + *args++ = regs->si; + case 4: if (!n--) break; - *args++ = regs->cx; - case 1: + *args++ = regs->di; + case 5: if (!n--) break; - *args++ = regs->bx; - case 0: + *args++ = regs->bp; + case 6: if (!n--) break; default: BUG(); @@ -120,26 +120,26 @@ static inline void syscall_get_arguments(struct task_struct *task, } else # endif - switch (i + n) { - case 6: + switch (i) { + case 0: if (!n--) break; - *args++ = regs->r9; - case 5: + *args++ = regs->di; + case 1: if (!n--) break; - *args++ = regs->r8; - case 4: + *args++ = regs->si; + case 2: if (!n--) break; - *args++ = regs->r10; + *args++ = regs->dx; case 3: if (!n--) break; - *args++ = regs->dx; - case 2: + *args++ = regs->r10; + case 4: if (!n--) break; - *args++ = regs->si; - case 1: + *args++ = regs->r8; + case 5: if (!n--) break; - *args++ = regs->di; - case 0: + *args++ = regs->r9; + case 6: if (!n--) break; default: BUG(); @@ -154,55 +154,57 @@ static inline void syscall_set_arguments(struct task_struct *task, { # ifdef CONFIG_IA32_EMULATION if (task_thread_info(task)->status & TS_COMPAT) - switch (i + n) { - case 6: + switch (i) { + case 0: if (!n--) break; - regs->bp = *args++; - case 5: + regs->bx = *args++; + case 1: if (!n--) break; - regs->di = *args++; - case 4: + regs->cx = *args++; + case 2: if (!n--) break; - regs->si = *args++; + regs->dx = *args++; case 3: if (!n--) break; - regs->dx = *args++; - case 2: + regs->si = *args++; + case 4: if (!n--) break; - regs->cx = *args++; - case 1: + regs->di = *args++; + case 5: if (!n--) break; - regs->bx = *args++; - case 0: + regs->bp = *args++; + case 6: if (!n--) break; default: BUG(); + break; } else # endif - switch (i + n) { - case 6: + switch (i) { + case 0: if (!n--) break; - regs->r9 = *args++; - case 5: + regs->di = *args++; + case 1: if (!n--) break; - regs->r8 = *args++; - case 4: + regs->si = *args++; + case 2: if (!n--) break; - regs->r10 = *args++; + regs->dx = *args++; case 3: if (!n--) break; - regs->dx = *args++; - case 2: + regs->r10 = *args++; + case 4: if (!n--) break; - regs->si = *args++; - case 1: + regs->r8 = *args++; + case 5: if (!n--) break; - regs->di = *args++; - case 0: + regs->r9 = *args++; + case 6: if (!n--) break; default: BUG(); + break; } } diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 53b01a1ae10c..8c1f76abae9e 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -1137,7 +1137,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) return gsi; } if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { - pr_debug(KERN_DEBUG "Pin %d-%d already programmed\n", + pr_debug("Pin %d-%d already programmed\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); #ifdef CONFIG_X86_32 return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); @@ -1599,6 +1599,11 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), }, }, + {} +}; + +/* second table for DMI checks that should run after early-quirks */ +static struct dmi_system_id __initdata acpi_dmi_table_late[] = { /* * HP laptops which use a DSDT reporting as HP/SB400/10000, * which includes some code which overrides all temperature @@ -1727,6 +1732,9 @@ int __init early_acpi_boot_init(void) int __init acpi_boot_init(void) { + /* those are executed after early-quirks are executed */ + dmi_check_system(acpi_dmi_table_late); + /* * If acpi_disabled, bail out * One exception: acpi=ht continues far enough to enumerate LAPICs diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c index a26c480b9491..01b1244ef1c0 100644 --- a/arch/x86/kernel/cpu/proc.c +++ b/arch/x86/kernel/cpu/proc.c @@ -160,14 +160,16 @@ static void *c_start(struct seq_file *m, loff_t *pos) { if (*pos == 0) /* just in case, cpu 0 is not the first */ *pos = first_cpu(cpu_online_map); - if ((*pos) < nr_cpu_ids && cpu_online(*pos)) + else + *pos = next_cpu_nr(*pos - 1, cpu_online_map); + if ((*pos) < nr_cpu_ids) return &cpu_data(*pos); return NULL; } static void *c_next(struct seq_file *m, void *v, loff_t *pos) { - *pos = next_cpu(*pos, cpu_online_map); + (*pos)++; return c_start(m, pos); } diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c index 1a78180f08d3..b3614752197b 100644 --- a/arch/x86/kernel/dumpstack_32.c +++ b/arch/x86/kernel/dumpstack_32.c @@ -405,7 +405,6 @@ die_nmi(char *str, struct pt_regs *regs, int do_panic) panic("Non maskable interrupt"); console_silent(); spin_unlock(&nmi_print_lock); - bust_spinlocks(0); /* * If we are in kernel we are probably nested up pretty bad @@ -416,6 +415,7 @@ die_nmi(char *str, struct pt_regs *regs, int do_panic) crash_kexec(regs); } + bust_spinlocks(0); do_exit(SIGSEGV); } diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index c356423a6026..dd65143941a8 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -1024,7 +1024,7 @@ ENTRY(machine_check) RING0_INT_FRAME pushl $0 CFI_ADJUST_CFA_OFFSET 4 - pushl $do_machine_check + pushl machine_check_vector CFI_ADJUST_CFA_OFFSET 4 jmp error_code CFI_ENDPROC diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c index 2ec2de8d8c46..c0262791bda4 100644 --- a/arch/x86/kernel/genapic_flat_64.c +++ b/arch/x86/kernel/genapic_flat_64.c @@ -25,7 +25,7 @@ #include <acpi/acpi_bus.h> #endif -static int __init flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return 1; } @@ -170,7 +170,7 @@ struct genapic apic_flat = { * We cannot use logical delivery in this case because the mask * overflows, so use physical mode. */ -static int __init physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { #ifdef CONFIG_ACPI /* diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c index e4bf2cc0d743..f6a2c8eb48a6 100644 --- a/arch/x86/kernel/genx2apic_cluster.c +++ b/arch/x86/kernel/genx2apic_cluster.c @@ -12,7 +12,7 @@ DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); -static int __init x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { if (cpu_has_x2apic) return 1; diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c index 8f1343df2627..d042211768b7 100644 --- a/arch/x86/kernel/genx2apic_phys.c +++ b/arch/x86/kernel/genx2apic_phys.c @@ -19,7 +19,7 @@ static int set_x2apic_phys_mode(char *arg) } early_param("x2apic_phys", set_x2apic_phys_mode); -static int __init x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { if (cpu_has_x2apic && x2apic_phys) return 1; diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c index bfd532843df6..2c7dbdb98278 100644 --- a/arch/x86/kernel/genx2apic_uv_x.c +++ b/arch/x86/kernel/genx2apic_uv_x.c @@ -15,7 +15,6 @@ #include <linux/ctype.h> #include <linux/init.h> #include <linux/sched.h> -#include <linux/bootmem.h> #include <linux/module.h> #include <linux/hardirq.h> #include <asm/smp.h> @@ -30,7 +29,7 @@ DEFINE_PER_CPU(int, x2apic_extra_bits); static enum uv_system_type uv_system_type; -static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { if (!strcmp(oem_id, "SGI")) { if (!strcmp(oem_table_id, "UVL")) @@ -398,16 +397,16 @@ void __init uv_system_init(void) printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades()); bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades(); - uv_blade_info = alloc_bootmem_pages(bytes); + uv_blade_info = kmalloc(bytes, GFP_KERNEL); get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size); bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes(); - uv_node_to_blade = alloc_bootmem_pages(bytes); + uv_node_to_blade = kmalloc(bytes, GFP_KERNEL); memset(uv_node_to_blade, 255, bytes); bytes = sizeof(uv_cpu_to_blade[0]) * num_possible_cpus(); - uv_cpu_to_blade = alloc_bootmem_pages(bytes); + uv_cpu_to_blade = kmalloc(bytes, GFP_KERNEL); memset(uv_cpu_to_blade, 255, bytes); blade = 0; diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index 410c88f0bfeb..ae0c0d3bb770 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c @@ -218,7 +218,7 @@ static void __init setup_node_to_cpumask_map(void) /* allocate the map */ map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t)); - pr_debug(KERN_DEBUG "Node to cpumask map at %p for %d nodes\n", + pr_debug("Node to cpumask map at %p for %d nodes\n", map, nr_node_ids); /* node_to_cpumask() will now work */ diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 7ece815ea637..7b1093397319 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -893,9 +893,11 @@ do_rest: smpboot_setup_warm_reset_vector(start_ip); /* * Be paranoid about clearing APIC errors. - */ - apic_write(APIC_ESR, 0); - apic_read(APIC_ESR); + */ + if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { + apic_write(APIC_ESR, 0); + apic_read(APIC_ESR); + } } /* diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index 8b8c0d6640fa..04431f34fd16 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c @@ -6,7 +6,7 @@ * This code is released under the GNU General Public License version 2 or * later. */ -#include <linux/mc146818rtc.h> +#include <linux/seq_file.h> #include <linux/proc_fs.h> #include <linux/kernel.h> diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index e062974cce34..04d242ab0161 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -931,14 +931,6 @@ do_device_not_available(struct pt_regs *regs, long error) } #ifdef CONFIG_X86_32 -#ifdef CONFIG_X86_MCE -dotraplinkage void __kprobes do_machine_check(struct pt_regs *regs, long error) -{ - conditional_sti(regs); - machine_check_vector(regs, error); -} -#endif - dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) { siginfo_t info; diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c index 9abac8a9d823..b13acb75e822 100644 --- a/arch/x86/kernel/xsave.c +++ b/arch/x86/kernel/xsave.c @@ -248,7 +248,7 @@ clear: * This will be saved when ever the FP and extended state context is * saved on the user stack during the signal handler delivery to the user. */ -void prepare_fx_sw_frame(void) +static void prepare_fx_sw_frame(void) { int size_extended = (xstate_size - sizeof(struct i387_fxsave_struct)) + FP_XSTATE_MAGIC2_SIZE; diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index b8e461d49412..f79a02f64d10 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -350,8 +350,10 @@ phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end, * pagetable pages as RO. So assume someone who pre-setup * these mappings are more intelligent. */ - if (pte_val(*pte)) + if (pte_val(*pte)) { + pages++; continue; + } if (0) printk(" pte=%p addr=%lx pte=%016lx\n", @@ -418,8 +420,10 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end, * not differ with respect to page frame and * attributes. */ - if (page_size_mask & (1 << PG_LEVEL_2M)) + if (page_size_mask & (1 << PG_LEVEL_2M)) { + pages++; continue; + } new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); } @@ -499,8 +503,10 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end, * not differ with respect to page frame and * attributes. */ - if (page_size_mask & (1 << PG_LEVEL_1G)) + if (page_size_mask & (1 << PG_LEVEL_1G)) { + pages++; continue; + } prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); } @@ -831,7 +837,7 @@ int arch_add_memory(int nid, u64 start, u64 size) unsigned long nr_pages = size >> PAGE_SHIFT; int ret; - last_mapped_pfn = init_memory_mapping(start, start + size-1); + last_mapped_pfn = init_memory_mapping(start, start + size); if (last_mapped_pfn > max_pfn_mapped) max_pfn_mapped = last_mapped_pfn; diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c index 672e17f8262a..9cab18b0b857 100644 --- a/arch/x86/mm/memtest.c +++ b/arch/x86/mm/memtest.c @@ -61,9 +61,9 @@ static void __init memtest(unsigned long start_phys, unsigned long size, last_bad += incr; } else { if (start_bad) { - printk(KERN_CONT "\n %010lx bad mem addr %010lx - %010lx reserved", + printk(KERN_CONT "\n %016lx bad mem addr %010lx - %010lx reserved", val, start_bad, last_bad + incr); - reserve_early(start_bad, last_bad - start_bad, "BAD RAM"); + reserve_early(start_bad, last_bad + incr, "BAD RAM"); } start_bad = last_bad = start_phys_aligned; } @@ -72,9 +72,8 @@ static void __init memtest(unsigned long start_phys, unsigned long size, if (start_bad) { printk(KERN_CONT "\n %016lx bad mem addr %010lx - %010lx reserved", val, start_bad, last_bad + incr); - reserve_early(start_bad, last_bad - start_bad, "BAD RAM"); + reserve_early(start_bad, last_bad + incr, "BAD RAM"); } - } /* default is disabled */ diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index d4d52f5a1cf7..aba77b2b7d18 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c @@ -246,11 +246,21 @@ xmaddr_t arbitrary_virt_to_machine(void *vaddr) { unsigned long address = (unsigned long)vaddr; unsigned int level; - pte_t *pte = lookup_address(address, &level); - unsigned offset = address & ~PAGE_MASK; + pte_t *pte; + unsigned offset; - BUG_ON(pte == NULL); + /* + * if the PFN is in the linear mapped vaddr range, we can just use + * the (quick) virt_to_machine() p2m lookup + */ + if (virt_addr_valid(vaddr)) + return virt_to_machine(vaddr); + /* otherwise we have to do a (slower) full page-table walk */ + + pte = lookup_address(address, &level); + BUG_ON(pte == NULL); + offset = address & ~PAGE_MASK; return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset); } @@ -410,7 +420,7 @@ void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, xen_mc_batch(); - u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; + u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; u.val = pte_val_ma(pte); xen_extend_mmu_update(&u); |