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-rw-r--r--arch/arc/include/asm/setup.h1
-rw-r--r--arch/arc/mm/cache.c12
-rw-r--r--arch/arc/mm/init.c5
3 files changed, 16 insertions, 2 deletions
diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h
index cb954cdab070..c568a9df82b1 100644
--- a/arch/arc/include/asm/setup.h
+++ b/arch/arc/include/asm/setup.h
@@ -31,6 +31,7 @@ extern int root_mountflags, end_mem;
void setup_processor(void);
void __init setup_arch_memory(void);
+long __init arc_get_mem_sz(void);
/* Helpers used in arc_*_mumbojumbo routines */
#define IS_AVAIL1(v, s) ((v) ? s : "")
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index 1b4cda10844a..3c275a81528c 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -995,6 +995,8 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags)
*/
noinline void arc_ioc_setup(void)
{
+ unsigned int ap_sz;
+
/* Flush + invalidate + disable L1 dcache */
__dc_disable();
@@ -1005,8 +1007,14 @@ noinline void arc_ioc_setup(void)
/* IOC Aperture start: TDB: handle non default CONFIG_LINUX_LINK_BASE */
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
- /* IOC Aperture size: TBD: handle different mem sizes, PAE... */
- write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, 0x11);
+ /*
+ * IOC Aperture size:
+ * decoded as 2 ^ (SIZE + 2) KB: so setting 0x11 implies 512M
+ * TBD: fix for PGU + 1GB of low mem
+ * TBD: fix for PAE
+ */
+ ap_sz = order_base_2(arc_get_mem_sz()/1024) - 2;
+ write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, ap_sz);
write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c
index 399e2f223d25..8c9415ed6280 100644
--- a/arch/arc/mm/init.c
+++ b/arch/arc/mm/init.c
@@ -40,6 +40,11 @@ struct pglist_data node_data[MAX_NUMNODES] __read_mostly;
EXPORT_SYMBOL(node_data);
#endif
+long __init arc_get_mem_sz(void)
+{
+ return low_mem_sz;
+}
+
/* User can over-ride above with "mem=nnn[KkMm]" in cmdline */
static int __init setup_mem_sz(char *str)
{