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path: root/drivers/clk/rockchip/clk-rk3128.c
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Diffstat (limited to 'drivers/clk/rockchip/clk-rk3128.c')
-rw-r--r--drivers/clk/rockchip/clk-rk3128.c24
1 files changed, 19 insertions, 5 deletions
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index 75071e0cd321..7c3d92af12df 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -526,7 +526,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
GATE(PCLK_ACODEC, "pclk_acodec", "pclk_cpu", 0, RK2928_CLKGATE_CON(5), 14, GFLAGS),
GATE(0, "pclk_ddrupctl", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 7, GFLAGS),
GATE(0, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 4, GFLAGS),
- GATE(0, "pclk_mipiphy", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 0, GFLAGS),
+ GATE(PCLK_MIPIPHY, "pclk_mipiphy", "pclk_cpu", 0, RK2928_CLKGATE_CON(5), 0, GFLAGS),
GATE(0, "pclk_pmu", "pclk_pmu_pre", 0, RK2928_CLKGATE_CON(9), 2, GFLAGS),
GATE(0, "pclk_pmu_niu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 3, GFLAGS),
@@ -553,6 +553,7 @@ static struct rockchip_clk_branch rk3128_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(11), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK2928_CLKGATE_CON(3), 15, GFLAGS),
+ GATE(HCLK_SFC, "hclk_sfc", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 1, GFLAGS),
GATE(HCLK_GPS, "hclk_gps", "aclk_peri", 0, RK2928_CLKGATE_CON(3), 14, GFLAGS),
GATE(PCLK_HDMI, "pclk_hdmi", "pclk_cpu", 0, RK2928_CLKGATE_CON(3), 8, GFLAGS),
};
@@ -563,23 +564,28 @@ static const char *const rk3128_critical_clocks[] __initconst = {
"pclk_cpu",
"aclk_peri",
"hclk_peri",
+ "hclk_vio_h2p",
"pclk_peri",
"pclk_pmu",
"sclk_timer5",
};
-static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
+static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np,
+ unsigned long soc_nr_clks)
{
struct rockchip_clk_provider *ctx;
+ unsigned long common_nr_clks;
void __iomem *reg_base;
+ common_nr_clks = rockchip_clk_find_max_clk_id(common_clk_branches,
+ ARRAY_SIZE(common_clk_branches)) + 1;
reg_base = of_iomap(np, 0);
if (!reg_base) {
pr_err("%s: could not map cru region\n", __func__);
return ERR_PTR(-ENOMEM);
}
- ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
+ ctx = rockchip_clk_init(np, reg_base, max(common_nr_clks, soc_nr_clks));
if (IS_ERR(ctx)) {
pr_err("%s: rockchip clk init failed\n", __func__);
iounmap(reg_base);
@@ -608,8 +614,12 @@ static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device
static void __init rk3126_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
+ unsigned long soc_nr_clks;
- ctx = rk3128_common_clk_init(np);
+ soc_nr_clks = rockchip_clk_find_max_clk_id(rk3126_clk_branches,
+ ARRAY_SIZE(rk3126_clk_branches)) + 1;
+
+ ctx = rk3128_common_clk_init(np, soc_nr_clks);
if (IS_ERR(ctx))
return;
@@ -626,8 +636,12 @@ CLK_OF_DECLARE(rk3126_cru, "rockchip,rk3126-cru", rk3126_clk_init);
static void __init rk3128_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
+ unsigned long soc_nr_clks;
+
+ soc_nr_clks = rockchip_clk_find_max_clk_id(rk3128_clk_branches,
+ ARRAY_SIZE(rk3128_clk_branches)) + 1;
- ctx = rk3128_common_clk_init(np);
+ ctx = rk3128_common_clk_init(np, soc_nr_clks);
if (IS_ERR(ctx))
return;