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path: root/drivers/media/pci/ddbridge/ddbridge-regs.h
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Diffstat (limited to 'drivers/media/pci/ddbridge/ddbridge-regs.h')
-rw-r--r--drivers/media/pci/ddbridge/ddbridge-regs.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/media/pci/ddbridge/ddbridge-regs.h b/drivers/media/pci/ddbridge/ddbridge-regs.h
index 9d44f8d3af75..23d74ff83fe4 100644
--- a/drivers/media/pci/ddbridge/ddbridge-regs.h
+++ b/drivers/media/pci/ddbridge/ddbridge-regs.h
@@ -95,27 +95,27 @@
#define DMA_BASE_WRITE (0x100)
#define DMA_BASE_READ (0x140)
-#define TS_CONTROL(_io) (_io->regs + 0x00)
-#define TS_CONTROL2(_io) (_io->regs + 0x04)
+#define TS_CONTROL(_io) ((_io)->regs + 0x00)
+#define TS_CONTROL2(_io) ((_io)->regs + 0x04)
/* ------------------------------------------------------------------------- */
/* DMA Buffer */
-#define DMA_BUFFER_CONTROL(_dma) (_dma->regs + 0x00)
-#define DMA_BUFFER_ACK(_dma) (_dma->regs + 0x04)
-#define DMA_BUFFER_CURRENT(_dma) (_dma->regs + 0x08)
-#define DMA_BUFFER_SIZE(_dma) (_dma->regs + 0x0c)
+#define DMA_BUFFER_CONTROL(_dma) ((_dma)->regs + 0x00)
+#define DMA_BUFFER_ACK(_dma) ((_dma)->regs + 0x04)
+#define DMA_BUFFER_CURRENT(_dma) ((_dma)->regs + 0x08)
+#define DMA_BUFFER_SIZE(_dma) ((_dma)->regs + 0x0c)
/* ------------------------------------------------------------------------- */
/* CI Interface (only CI-Bridge) */
-#define CI_BASE (0x400)
-#define CI_CONTROL(i) (CI_BASE + (i) * 32 + 0x00)
+#define CI_BASE (0x400)
+#define CI_CONTROL(i) (CI_BASE + (i) * 32 + 0x00)
-#define CI_DO_ATTRIBUTE_RW(i) (CI_BASE + (i) * 32 + 0x04)
-#define CI_DO_IO_RW(i) (CI_BASE + (i) * 32 + 0x08)
-#define CI_READDATA(i) (CI_BASE + (i) * 32 + 0x0c)
-#define CI_DO_READ_ATTRIBUTES(i) (CI_BASE + (i) * 32 + 0x10)
+#define CI_DO_ATTRIBUTE_RW(i) (CI_BASE + (i) * 32 + 0x04)
+#define CI_DO_IO_RW(i) (CI_BASE + (i) * 32 + 0x08)
+#define CI_READDATA(i) (CI_BASE + (i) * 32 + 0x0c)
+#define CI_DO_READ_ATTRIBUTES(i) (CI_BASE + (i) * 32 + 0x10)
#define CI_RESET_CAM (0x00000001)
#define CI_POWER_ON (0x00000002)
@@ -132,7 +132,7 @@
#define CI_BUFFER_BASE (0x3000)
#define CI_BUFFER_SIZE (0x0800)
-#define CI_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
+#define CI_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
/* ------------------------------------------------------------------------- */
/* LNB commands (mxl5xx / Max S8) */
@@ -140,7 +140,7 @@
#define LNB_BASE (0x400)
#define LNB_CONTROL(i) (LNB_BASE + (i) * 0x20 + 0x00)
-#define LNB_CMD (7ULL << 0)
+#define LNB_CMD (7ULL << 0)
#define LNB_CMD_NOP 0
#define LNB_CMD_INIT 1
#define LNB_CMD_LOW 3
@@ -148,8 +148,8 @@
#define LNB_CMD_OFF 5
#define LNB_CMD_DISEQC 6
-#define LNB_BUSY (1ULL << 4)
-#define LNB_TONE (1ULL << 15)
+#define LNB_BUSY BIT_ULL(4)
+#define LNB_TONE BIT_ULL(15)
#define LNB_BUF_LEVEL(i) (LNB_BASE + (i) * 0x20 + 0x10)
#define LNB_BUF_WRITE(i) (LNB_BASE + (i) * 0x20 + 0x14)