diff options
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/renesas_sdhi_core.c | 3 | ||||
| -rw-r--r-- | drivers/mmc/host/tmio_mmc.h | 2 | ||||
| -rw-r--r-- | drivers/mmc/host/tmio_mmc_core.c | 15 | ||||
| -rw-r--r-- | drivers/mmc/host/uniphier-sd.c | 1 |
4 files changed, 21 insertions, 0 deletions
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index bb937411c2ec..153767054c05 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -1041,6 +1041,9 @@ int renesas_sdhi_probe(struct platform_device *pdev, /* All SDHI have SDIO status bits which must be 1 */ mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS; + /* All SDHI support HW busy detection */ + mmc_data->flags |= TMIO_MMC_USE_BUSY_TIMEOUT; + dev_pm_domain_start(&pdev->dev); ret = renesas_sdhi_clk_enable(host); diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index 7ff41185896a..819198af17f4 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -80,6 +80,8 @@ #define CLK_CTL_SCLKEN BIT(8) /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */ +#define CARD_OPT_TOP_MASK 0xf0 +#define CARD_OPT_TOP_SHIFT 4 #define CARD_OPT_WIDTH8 BIT(13) #define CARD_OPT_WIDTH BIT(15) diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c index a89547f5d733..7d2da5befe6b 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -887,6 +887,18 @@ static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); } +static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host) +{ + u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT); + unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max; + unsigned int cycles; + + val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT; + cycles = 1 << (13 + val); + + host->mmc->max_busy_timeout = cycles / (clk_rate / MSEC_PER_SEC); +} + /* Set MMC clock / power. * Note: This controller uses a simple divider scheme therefore it cannot * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as @@ -945,6 +957,9 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) break; } + if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT) + tmio_mmc_max_busy_timeout(host); + /* Let things settle. delay taken from winCE driver */ usleep_range(140, 200); if (PTR_ERR(host->mrq) == -EINTR) diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c index 3092466a99ab..a6cd16771d4e 100644 --- a/drivers/mmc/host/uniphier-sd.c +++ b/drivers/mmc/host/uniphier-sd.c @@ -586,6 +586,7 @@ static int uniphier_sd_probe(struct platform_device *pdev) tmio_data = &priv->tmio_data; tmio_data->flags |= TMIO_MMC_32BIT_DATA_PORT; + tmio_data->flags |= TMIO_MMC_USE_BUSY_TIMEOUT; host = tmio_mmc_host_alloc(pdev, tmio_data); if (IS_ERR(host)) |