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path: root/drivers/net/wireless/realtek/rtw88/phy.c
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-rw-r--r--drivers/net/wireless/realtek/rtw88/phy.c82
1 files changed, 67 insertions, 15 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/phy.c b/drivers/net/wireless/realtek/rtw88/phy.c
index 37ef80c9091d..8ed20c89d216 100644
--- a/drivers/net/wireless/realtek/rtw88/phy.c
+++ b/drivers/net/wireless/realtek/rtw88/phy.c
@@ -18,7 +18,10 @@ struct phy_cfg_pair {
};
union phy_table_tile {
- struct rtw_phy_cond cond;
+ struct {
+ struct rtw_phy_cond cond;
+ struct rtw_phy_cond2 cond2;
+ } __packed;
struct phy_cfg_pair cfg;
};
@@ -123,7 +126,7 @@ static void rtw_phy_cck_pd_init(struct rtw_dev *rtwdev)
void rtw_phy_set_edcca_th(struct rtw_dev *rtwdev, u8 l2h, u8 h2l)
{
- struct rtw_hw_reg_offset *edcca_th = rtwdev->chip->edcca_th;
+ const struct rtw_hw_reg_offset *edcca_th = rtwdev->chip->edcca_th;
rtw_write32_mask(rtwdev,
edcca_th[EDCCA_TH_L2H_IDX].hw_reg.addr,
@@ -527,6 +530,13 @@ static void rtw_phy_dig(struct rtw_dev *rtwdev)
*/
rtw_phy_dig_recorder(dm_info, cur_igi, fa_cnt);
+ /* Mitigate beacon loss and connectivity issues, mainly (only?)
+ * in the 5 GHz band
+ */
+ if (rtwdev->chip->id == RTW_CHIP_TYPE_8812A && rtwdev->beacon_loss &&
+ linked && dm_info->total_fa_cnt < DIG_PERF_FA_TH_EXTRA_HIGH)
+ cur_igi = DIG_CVRG_MIN;
+
if (cur_igi != pre_igi)
rtw_phy_dig_write(rtwdev, cur_igi);
}
@@ -1041,7 +1051,8 @@ void rtw_phy_setup_phy_cond(struct rtw_dev *rtwdev, u32 pkg)
{
struct rtw_hal *hal = &rtwdev->hal;
struct rtw_efuse *efuse = &rtwdev->efuse;
- struct rtw_phy_cond cond = {0};
+ struct rtw_phy_cond cond = {};
+ struct rtw_phy_cond2 cond2 = {};
cond.cut = hal->cut_version ? hal->cut_version : 15;
cond.pkg = pkg ? pkg : 15;
@@ -1061,15 +1072,34 @@ void rtw_phy_setup_phy_cond(struct rtw_dev *rtwdev, u32 pkg)
break;
}
+ if (rtwdev->chip->id == RTW_CHIP_TYPE_8812A ||
+ rtwdev->chip->id == RTW_CHIP_TYPE_8821A) {
+ cond.rfe = 0;
+ cond.rfe |= efuse->ext_lna_2g;
+ cond.rfe |= efuse->ext_pa_2g << 1;
+ cond.rfe |= efuse->ext_lna_5g << 2;
+ cond.rfe |= efuse->ext_pa_5g << 3;
+ cond.rfe |= efuse->btcoex << 4;
+
+ cond2.type_alna = efuse->alna_type;
+ cond2.type_glna = efuse->glna_type;
+ cond2.type_apa = efuse->apa_type;
+ cond2.type_gpa = efuse->gpa_type;
+ }
+
hal->phy_cond = cond;
+ hal->phy_cond2 = cond2;
- rtw_dbg(rtwdev, RTW_DBG_PHY, "phy cond=0x%08x\n", *((u32 *)&hal->phy_cond));
+ rtw_dbg(rtwdev, RTW_DBG_PHY, "phy cond=0x%08x cond2=0x%08x\n",
+ *((u32 *)&hal->phy_cond), *((u32 *)&hal->phy_cond2));
}
-static bool check_positive(struct rtw_dev *rtwdev, struct rtw_phy_cond cond)
+static bool check_positive(struct rtw_dev *rtwdev, struct rtw_phy_cond cond,
+ struct rtw_phy_cond2 cond2)
{
struct rtw_hal *hal = &rtwdev->hal;
struct rtw_phy_cond drv_cond = hal->phy_cond;
+ struct rtw_phy_cond2 drv_cond2 = hal->phy_cond2;
if (cond.cut && cond.cut != drv_cond.cut)
return false;
@@ -1080,8 +1110,29 @@ static bool check_positive(struct rtw_dev *rtwdev, struct rtw_phy_cond cond)
if (cond.intf && cond.intf != drv_cond.intf)
return false;
- if (cond.rfe != drv_cond.rfe)
- return false;
+ if (rtwdev->chip->id == RTW_CHIP_TYPE_8812A ||
+ rtwdev->chip->id == RTW_CHIP_TYPE_8821A) {
+ if (!(cond.rfe & 0x0f))
+ return true;
+
+ if ((cond.rfe & drv_cond.rfe) != cond.rfe)
+ return false;
+
+ if ((cond.rfe & BIT(0)) && cond2.type_glna != drv_cond2.type_glna)
+ return false;
+
+ if ((cond.rfe & BIT(1)) && cond2.type_gpa != drv_cond2.type_gpa)
+ return false;
+
+ if ((cond.rfe & BIT(2)) && cond2.type_alna != drv_cond2.type_alna)
+ return false;
+
+ if ((cond.rfe & BIT(3)) && cond2.type_apa != drv_cond2.type_apa)
+ return false;
+ } else {
+ if (cond.rfe != drv_cond.rfe)
+ return false;
+ }
return true;
}
@@ -1090,7 +1141,8 @@ void rtw_parse_tbl_phy_cond(struct rtw_dev *rtwdev, const struct rtw_table *tbl)
{
const union phy_table_tile *p = tbl->data;
const union phy_table_tile *end = p + tbl->size / 2;
- struct rtw_phy_cond pos_cond = {0};
+ struct rtw_phy_cond pos_cond = {};
+ struct rtw_phy_cond2 pos_cond2 = {};
bool is_matched = true, is_skipped = false;
BUILD_BUG_ON(sizeof(union phy_table_tile) != sizeof(struct phy_cfg_pair));
@@ -1109,11 +1161,12 @@ void rtw_parse_tbl_phy_cond(struct rtw_dev *rtwdev, const struct rtw_table *tbl)
case BRANCH_ELIF:
default:
pos_cond = p->cond;
+ pos_cond2 = p->cond2;
break;
}
} else if (p->cond.neg) {
if (!is_skipped) {
- if (check_positive(rtwdev, pos_cond)) {
+ if (check_positive(rtwdev, pos_cond, pos_cond2)) {
is_matched = true;
is_skipped = true;
} else {
@@ -1470,10 +1523,8 @@ static void rtw_phy_store_tx_power_by_rate(struct rtw_dev *rtwdev,
rate = rates[i];
if (band == PHY_BAND_2G)
hal->tx_pwr_by_rate_offset_2g[rfpath][rate] = offset;
- else if (band == PHY_BAND_5G)
- hal->tx_pwr_by_rate_offset_5g[rfpath][rate] = offset;
else
- continue;
+ hal->tx_pwr_by_rate_offset_5g[rfpath][rate] = offset;
}
}
@@ -2125,8 +2176,8 @@ void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw,
*limit = rtw_phy_get_tx_power_limit(rtwdev, band, bw, path,
rate, ch, regd);
- *remnant = (rate <= DESC_RATE11M ? dm_info->txagc_remnant_cck :
- dm_info->txagc_remnant_ofdm);
+ *remnant = rate <= DESC_RATE11M ? dm_info->txagc_remnant_cck :
+ dm_info->txagc_remnant_ofdm[path];
*sar = rtw_phy_get_tx_power_sar(rtwdev, hal->sar_band, path, rate);
}
@@ -2340,7 +2391,8 @@ void rtw_phy_init_tx_power(struct rtw_dev *rtwdev)
void rtw_phy_config_swing_table(struct rtw_dev *rtwdev,
struct rtw_swing_table *swing_table)
{
- const struct rtw_pwr_track_tbl *tbl = rtwdev->chip->pwr_track_tbl;
+ const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
+ const struct rtw_pwr_track_tbl *tbl = rfe_def->pwr_track_tbl;
u8 channel = rtwdev->hal.current_channel;
if (IS_CH_2G_BAND(channel)) {
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-13 18:06:22 +0100