diff options
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7792.c')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7792.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c index d36da5652de6..624dcc1c81bd 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c @@ -1988,7 +1988,7 @@ static const struct sh_pfc_function pinmux_functions[] = { }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { + { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2020,9 +2020,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_0_3_FN, FN_IP0_3, GP_0_2_FN, FN_IP0_2, GP_0_1_FN, FN_IP0_1, - GP_0_0_FN, FN_IP0_0 } + GP_0_0_FN, FN_IP0_0 )) }, - { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { + { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2054,9 +2054,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_1_3_FN, FN_IP1_8, GP_1_2_FN, FN_IP1_7, GP_1_1_FN, FN_IP1_6, - GP_1_0_FN, FN_IP1_5, } + GP_1_0_FN, FN_IP1_5, )) }, - { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { + { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP( GP_2_31_FN, FN_A15, GP_2_30_FN, FN_A14, GP_2_29_FN, FN_A13, @@ -2088,9 +2088,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_2_3_FN, FN_D3, GP_2_2_FN, FN_D2, GP_2_1_FN, FN_D1, - GP_2_0_FN, FN_D0 } + GP_2_0_FN, FN_D0 )) }, - { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { + { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2122,9 +2122,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_3_3_FN, FN_A19, GP_3_2_FN, FN_A18, GP_3_1_FN, FN_A17, - GP_3_0_FN, FN_A16 } + GP_3_0_FN, FN_A16 )) }, - { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { + { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2156,9 +2156,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_4_3_FN, FN_VI0_VSYNC_N, GP_4_2_FN, FN_VI0_HSYNC_N, GP_4_1_FN, FN_VI0_CLKENB, - GP_4_0_FN, FN_VI0_CLK } + GP_4_0_FN, FN_VI0_CLK )) }, - { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { + { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2190,9 +2190,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_5_3_FN, FN_VI1_VSYNC_N, GP_5_2_FN, FN_VI1_HSYNC_N, GP_5_1_FN, FN_VI1_CLKENB, - GP_5_0_FN, FN_VI1_CLK } + GP_5_0_FN, FN_VI1_CLK )) }, - { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) { + { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2224,9 +2224,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_6_3_FN, FN_IP2_3, GP_6_2_FN, FN_IP2_2, GP_6_1_FN, FN_IP2_1, - GP_6_0_FN, FN_IP2_0 } + GP_6_0_FN, FN_IP2_0 )) }, - { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) { + { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2258,9 +2258,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_7_3_FN, FN_IP3_3, GP_7_2_FN, FN_IP3_2, GP_7_1_FN, FN_IP3_1, - GP_7_0_FN, FN_IP3_0 } + GP_7_0_FN, FN_IP3_0 )) }, - { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) { + { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2292,9 +2292,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_8_3_FN, FN_IP4_3_2, GP_8_2_FN, FN_IP4_1, GP_8_1_FN, FN_IP4_0, - GP_8_0_FN, FN_VI4_CLK } + GP_8_0_FN, FN_VI4_CLK )) }, - { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) { + { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1, GROUP( 0, 0, 0, 0, 0, 0, @@ -2326,9 +2326,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_9_3_FN, FN_IP5_2, GP_9_2_FN, FN_IP5_1, GP_9_1_FN, FN_IP5_0, - GP_9_0_FN, FN_VI5_CLK } + GP_9_0_FN, FN_VI5_CLK )) }, - { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1) { + { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1, GROUP( GP_10_31_FN, FN_CAN1_RX, GP_10_30_FN, FN_CAN1_TX, GP_10_29_FN, FN_CAN_CLK, @@ -2360,9 +2360,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_10_3_FN, FN_IP6_2, GP_10_2_FN, FN_HRTS0_N, GP_10_1_FN, FN_IP6_1, - GP_10_0_FN, FN_IP6_0 } + GP_10_0_FN, FN_IP6_0 )) }, - { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1) { + { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1, GROUP( 0, 0, 0, 0, GP_11_29_FN, FN_AVS2, @@ -2394,7 +2394,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { GP_11_3_FN, FN_IP7_6, GP_11_2_FN, FN_IP7_5_4, GP_11_1_FN, FN_IP7_3_2, - GP_11_0_FN, FN_IP7_1_0 } + GP_11_0_FN, FN_IP7_1_0 )) }, { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060040, 32, 4, 4, |