diff options
Diffstat (limited to 'drivers/soc/fsl/qbman/qman.c')
| -rw-r--r-- | drivers/soc/fsl/qbman/qman.c | 31 |
1 files changed, 13 insertions, 18 deletions
diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c index 8829bbd31580..23fcc0b2498f 100644 --- a/drivers/soc/fsl/qbman/qman.c +++ b/drivers/soc/fsl/qbman/qman.c @@ -300,7 +300,8 @@ struct qm_mc { }; struct qm_addr { - void __iomem *ce; /* cache-enabled */ + void *ce; /* cache-enabled */ + __be32 *ce_be; /* same value as above but for direct access */ void __iomem *ci; /* cache-inhibited */ }; @@ -321,12 +322,12 @@ struct qm_portal { /* Cache-inhibited register access. */ static inline u32 qm_in(struct qm_portal *p, u32 offset) { - return be32_to_cpu(__raw_readl(p->addr.ci + offset)); + return ioread32be(p->addr.ci + offset); } static inline void qm_out(struct qm_portal *p, u32 offset, u32 val) { - __raw_writel(cpu_to_be32(val), p->addr.ci + offset); + iowrite32be(val, p->addr.ci + offset); } /* Cache Enabled Portal Access */ @@ -342,7 +343,7 @@ static inline void qm_cl_touch_ro(struct qm_portal *p, u32 offset) static inline u32 qm_ce_in(struct qm_portal *p, u32 offset) { - return be32_to_cpu(__raw_readl(p->addr.ce + offset)); + return be32_to_cpu(*(p->addr.ce_be + (offset/4))); } /* --- EQCR API --- */ @@ -646,11 +647,7 @@ static inline void qm_dqrr_pvb_update(struct qm_portal *portal) */ dpaa_invalidate_touch_ro(res); #endif - /* - * when accessing 'verb', use __raw_readb() to ensure that compiler - * inlining doesn't try to optimise out "excess reads". - */ - if ((__raw_readb(&res->verb) & QM_DQRR_VERB_VBIT) == dqrr->vbit) { + if ((res->verb & QM_DQRR_VERB_VBIT) == dqrr->vbit) { dqrr->pi = (dqrr->pi + 1) & (QM_DQRR_SIZE - 1); if (!dqrr->pi) dqrr->vbit ^= QM_DQRR_VERB_VBIT; @@ -777,11 +774,8 @@ static inline void qm_mr_pvb_update(struct qm_portal *portal) union qm_mr_entry *res = qm_cl(mr->ring, mr->pi); DPAA_ASSERT(mr->pmode == qm_mr_pvb); - /* - * when accessing 'verb', use __raw_readb() to ensure that compiler - * inlining doesn't try to optimise out "excess reads". - */ - if ((__raw_readb(&res->verb) & QM_MR_VERB_VBIT) == mr->vbit) { + + if ((res->verb & QM_MR_VERB_VBIT) == mr->vbit) { mr->pi = (mr->pi + 1) & (QM_MR_SIZE - 1); if (!mr->pi) mr->vbit ^= QM_MR_VERB_VBIT; @@ -822,7 +816,7 @@ static inline int qm_mc_init(struct qm_portal *portal) mc->cr = portal->addr.ce + QM_CL_CR; mc->rr = portal->addr.ce + QM_CL_RR0; - mc->rridx = (__raw_readb(&mc->cr->_ncw_verb) & QM_MCC_VERB_VBIT) + mc->rridx = (mc->cr->_ncw_verb & QM_MCC_VERB_VBIT) ? 0 : 1; mc->vbit = mc->rridx ? QM_MCC_VERB_VBIT : 0; #ifdef CONFIG_FSL_DPAA_CHECKING @@ -880,7 +874,7 @@ static inline union qm_mc_result *qm_mc_result(struct qm_portal *portal) * its command is submitted and completed. This includes the valid-bit, * in case you were wondering... */ - if (!__raw_readb(&rr->verb)) { + if (!rr->verb) { dpaa_invalidate_touch_ro(rr); return NULL; } @@ -1120,8 +1114,9 @@ static int qman_create_portal(struct qman_portal *portal, * config, everything that follows depends on it and "config" is more * for (de)reference */ - p->addr.ce = c->addr_virt[DPAA_PORTAL_CE]; - p->addr.ci = c->addr_virt[DPAA_PORTAL_CI]; + p->addr.ce = c->addr_virt_ce; + p->addr.ce_be = c->addr_virt_ce; + p->addr.ci = c->addr_virt_ci; /* * If CI-stashing is used, the current defaults use a threshold of 3, * and stash with high-than-DQRR priority. |