diff options
Diffstat (limited to 'drivers/tty/serial')
64 files changed, 4092 insertions, 1024 deletions
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index cb51be55989e..b00836851061 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -16,6 +16,9 @@ #include <linux/dmaengine.h> struct uart_8250_dma { + int (*tx_dma)(struct uart_8250_port *p); + int (*rx_dma)(struct uart_8250_port *p, unsigned int iir); + /* Filter function */ dma_filter_fn fn; @@ -41,6 +44,8 @@ struct uart_8250_dma { size_t tx_size; unsigned char tx_running:1; + unsigned char tx_err: 1; + unsigned char rx_running:1; }; struct old_serial_port { @@ -51,7 +56,7 @@ struct old_serial_port { unsigned int flags; unsigned char hub6; unsigned char io_type; - unsigned char *iomem_base; + unsigned char __iomem *iomem_base; unsigned short iomem_reg_shift; unsigned long irqflags; }; @@ -114,6 +119,8 @@ static inline void serial_dl_write(struct uart_8250_port *up, int value) } struct uart_8250_port *serial8250_get_port(int line); +void serial8250_rpm_get(struct uart_8250_port *p); +void serial8250_rpm_put(struct uart_8250_port *p); #if defined(__alpha__) && !defined(CONFIG_PCI) /* diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c index ca5cfdc1459a..9515924b7f38 100644 --- a/drivers/tty/serial/8250/8250_core.c +++ b/drivers/tty/serial/8250/8250_core.c @@ -541,23 +541,25 @@ void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p) } EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos); -static void serial8250_rpm_get(struct uart_8250_port *p) +void serial8250_rpm_get(struct uart_8250_port *p) { if (!(p->capabilities & UART_CAP_RPM)) return; pm_runtime_get_sync(p->port.dev); } +EXPORT_SYMBOL_GPL(serial8250_rpm_get); -static void serial8250_rpm_put(struct uart_8250_port *p) +void serial8250_rpm_put(struct uart_8250_port *p) { if (!(p->capabilities & UART_CAP_RPM)) return; pm_runtime_mark_last_busy(p->port.dev); pm_runtime_put_autosuspend(p->port.dev); } +EXPORT_SYMBOL_GPL(serial8250_rpm_put); /* - * This two wrapper ensure, that enable_runtime_pm_tx() can be called more than + * These two wrappers ensure that enable_runtime_pm_tx() can be called more than * once and disable_runtime_pm_tx() will still disable RPM because the fifo is * empty and the HW can idle again. */ @@ -595,6 +597,7 @@ static void serial8250_rpm_put_tx(struct uart_8250_port *p) */ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) { + unsigned char lcr = 0, efr = 0; /* * Exar UARTs have a SLEEP register that enables or disables * each UART to enter sleep mode separately. On the XR17V35x the @@ -611,6 +614,8 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) if (p->capabilities & UART_CAP_SLEEP) { if (p->capabilities & UART_CAP_EFR) { + lcr = serial_in(p, UART_LCR); + efr = serial_in(p, UART_EFR); serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(p, UART_EFR, UART_EFR_ECB); serial_out(p, UART_LCR, 0); @@ -618,8 +623,8 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); if (p->capabilities & UART_CAP_EFR) { serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); - serial_out(p, UART_EFR, 0); - serial_out(p, UART_LCR, 0); + serial_out(p, UART_EFR, efr); + serial_out(p, UART_LCR, lcr); } } out: @@ -1350,7 +1355,7 @@ static void serial8250_start_tx(struct uart_port *port) struct uart_8250_port *up = up_to_u8250p(port); serial8250_rpm_get_tx(up); - if (up->dma && !serial8250_tx_dma(up)) { + if (up->dma && !up->dma->tx_dma(up)) { return; } else if (!(up->ier & UART_IER_THRI)) { up->ier |= UART_IER_THRI; @@ -1397,6 +1402,19 @@ static void serial8250_stop_rx(struct uart_port *port) serial8250_rpm_put(up); } +static void serial8250_disable_ms(struct uart_port *port) +{ + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + + /* no MSR capabilities */ + if (up->bugs & UART_BUG_NOMSR) + return; + + up->ier &= ~UART_IER_MSI; + serial_port_out(port, UART_IER, up->ier); +} + static void serial8250_enable_ms(struct uart_port *port) { struct uart_8250_port *up = up_to_u8250p(port); @@ -1483,7 +1501,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr) ignore_char: lsr = serial_in(up, UART_LSR); - } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0)); + } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0)); spin_unlock(&port->lock); tty_flip_buffer_push(&port->state->port); spin_lock(&port->lock); @@ -1532,7 +1550,7 @@ void serial8250_tx_chars(struct uart_8250_port *up) DEBUG_INTR("THRE..."); /* - * With RPM enabled, we have to wait once the FIFO is empty before the + * With RPM enabled, we have to wait until the FIFO is empty before the * HW can go idle. So we get here once again with empty FIFO and disable * the interrupt and RPM in __stop_tx() */ @@ -1588,13 +1606,14 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir) if (status & (UART_LSR_DR | UART_LSR_BI)) { if (up->dma) - dma_err = serial8250_rx_dma(up, iir); + dma_err = up->dma->rx_dma(up, iir); if (!up->dma || dma_err) status = serial8250_rx_chars(up, status); } serial8250_modem_status(up); - if (!up->dma && (status & UART_LSR_THRE)) + if ((!up->dma || (up->dma && up->dma->tx_err)) && + (status & UART_LSR_THRE)) serial8250_tx_chars(up); spin_unlock_irqrestore(&port->lock, flags); @@ -2603,13 +2622,21 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios, } static void -serial8250_set_ldisc(struct uart_port *port, int new) +serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios) { - if (new == N_PPS) { + if (termios->c_line == N_PPS) { port->flags |= UPF_HARDPPS_CD; + spin_lock_irq(&port->lock); serial8250_enable_ms(port); - } else + spin_unlock_irq(&port->lock); + } else { port->flags &= ~UPF_HARDPPS_CD; + if (!UART_ENABLE_MS(port, termios->c_cflag)) { + spin_lock_irq(&port->lock); + serial8250_disable_ms(port); + spin_unlock_irq(&port->lock); + } + } } @@ -2634,8 +2661,11 @@ serial8250_pm(struct uart_port *port, unsigned int state, static unsigned int serial8250_port_size(struct uart_8250_port *pt) { - if (pt->port.iotype == UPIO_AU) + if (pt->port.iotype == UPIO_AU) { + if (pt->port.type == PORT_RT2880) + return 0x100; return 0x1000; + } if (is_omap1_8250(pt)) return 0x16 << pt->port.regshift; @@ -2975,42 +3005,6 @@ serial8250_verify_port(struct uart_port *port, struct serial_struct *ser) return 0; } -static int serial8250_ioctl(struct uart_port *port, unsigned int cmd, - unsigned long arg) -{ - struct uart_8250_port *up = - container_of(port, struct uart_8250_port, port); - int ret; - struct serial_rs485 rs485_config; - - if (!up->rs485_config) - return -ENOIOCTLCMD; - - switch (cmd) { - case TIOCSRS485: - if (copy_from_user(&rs485_config, (void __user *)arg, - sizeof(rs485_config))) - return -EFAULT; - - ret = up->rs485_config(up, &rs485_config); - if (ret) - return ret; - - memcpy(&up->rs485, &rs485_config, sizeof(rs485_config)); - - return 0; - case TIOCGRS485: - if (copy_to_user((void __user *)arg, &up->rs485, - sizeof(up->rs485))) - return -EFAULT; - return 0; - default: - break; - } - - return -ENOIOCTLCMD; -} - static const char * serial8250_type(struct uart_port *port) { @@ -3042,7 +3036,6 @@ static struct uart_ops serial8250_pops = { .request_port = serial8250_request_port, .config_port = serial8250_config_port, .verify_port = serial8250_verify_port, - .ioctl = serial8250_ioctl, #ifdef CONFIG_CONSOLE_POLL .poll_get_char = serial8250_get_poll_char, .poll_put_char = serial8250_put_poll_char, @@ -3198,7 +3191,9 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count) serial8250_rpm_get(up); - if (port->sysrq || oops_in_progress) + if (port->sysrq) + locked = 0; + else if (oops_in_progress) locked = spin_trylock_irqsave(&port->lock, flags); else spin_lock_irqsave(&port->lock, flags); @@ -3237,7 +3232,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count) serial8250_rpm_put(up); } -static int __init serial8250_console_setup(struct console *co, char *options) +static int serial8250_console_setup(struct console *co, char *options) { struct uart_port *port; int baud = 9600; @@ -3585,10 +3580,10 @@ int serial8250_register_8250_port(struct uart_8250_port *up) uart->port.fifosize = up->port.fifosize; uart->tx_loadsz = up->tx_loadsz; uart->capabilities = up->capabilities; - uart->rs485_config = up->rs485_config; - uart->rs485 = up->rs485; uart->port.throttle = up->port.throttle; uart->port.unthrottle = up->port.unthrottle; + uart->port.rs485_config = up->port.rs485_config; + uart->port.rs485 = up->port.rs485; /* Take tx_loadsz from fifosize if it wasn't set separately */ if (uart->port.fifosize && !uart->tx_loadsz) @@ -3623,8 +3618,13 @@ int serial8250_register_8250_port(struct uart_8250_port *up) uart->dl_read = up->dl_read; if (up->dl_write) uart->dl_write = up->dl_write; - if (up->dma) + if (up->dma) { uart->dma = up->dma; + if (!uart->dma->tx_dma) + uart->dma->tx_dma = serial8250_tx_dma; + if (!uart->dma->rx_dma) + uart->dma->rx_dma = serial8250_rx_dma; + } if (serial8250_isa_config != NULL) serial8250_isa_config(0, &uart->port, diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 148ffe4c232f..fcd7ac6af2fc 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -21,6 +21,7 @@ static void __dma_tx_complete(void *param) struct uart_8250_dma *dma = p->dma; struct circ_buf *xmit = &p->port.state->xmit; unsigned long flags; + int ret; dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, UART_XMIT_SIZE, DMA_TO_DEVICE); @@ -36,8 +37,11 @@ static void __dma_tx_complete(void *param) if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) uart_write_wakeup(&p->port); - if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) - serial8250_tx_dma(p); + ret = serial8250_tx_dma(p); + if (ret) { + p->ier |= UART_IER_THRI; + serial_port_out(&p->port, UART_IER, p->ier); + } spin_unlock_irqrestore(&p->port.lock, flags); } @@ -53,6 +57,7 @@ static void __dma_rx_complete(void *param) dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, dma->rx_size, DMA_FROM_DEVICE); + dma->rx_running = 0; dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); dmaengine_terminate_all(dma->rxchan); @@ -69,6 +74,7 @@ int serial8250_tx_dma(struct uart_8250_port *p) struct uart_8250_dma *dma = p->dma; struct circ_buf *xmit = &p->port.state->xmit; struct dma_async_tx_descriptor *desc; + int ret; if (uart_tx_stopped(&p->port) || dma->tx_running || uart_circ_empty(xmit)) @@ -80,11 +86,12 @@ int serial8250_tx_dma(struct uart_8250_port *p) dma->tx_addr + xmit->tail, dma->tx_size, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); - if (!desc) - return -EBUSY; + if (!desc) { + ret = -EBUSY; + goto err; + } dma->tx_running = 1; - desc->callback = __dma_tx_complete; desc->callback_param = p; @@ -94,19 +101,23 @@ int serial8250_tx_dma(struct uart_8250_port *p) UART_XMIT_SIZE, DMA_TO_DEVICE); dma_async_issue_pending(dma->txchan); - + if (dma->tx_err) { + dma->tx_err = 0; + if (p->ier & UART_IER_THRI) { + p->ier &= ~UART_IER_THRI; + serial_out(p, UART_IER, p->ier); + } + } return 0; +err: + dma->tx_err = 1; + return ret; } -EXPORT_SYMBOL_GPL(serial8250_tx_dma); int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) { struct uart_8250_dma *dma = p->dma; struct dma_async_tx_descriptor *desc; - struct dma_tx_state state; - int dma_status; - - dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); switch (iir & 0x3f) { case UART_IIR_RLSI: @@ -117,7 +128,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) * If RCVR FIFO trigger level was not reached, complete the * transfer and let 8250_core copy the remaining data. */ - if (dma_status == DMA_IN_PROGRESS) { + if (dma->rx_running) { dmaengine_pause(dma->rxchan); __dma_rx_complete(p); } @@ -126,7 +137,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) break; } - if (dma_status) + if (dma->rx_running) return 0; desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, @@ -135,6 +146,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) if (!desc) return -EBUSY; + dma->rx_running = 1; desc->callback = __dma_rx_complete; desc->callback_param = p; @@ -147,7 +159,6 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) return 0; } -EXPORT_SYMBOL_GPL(serial8250_rx_dma); int serial8250_request_dma(struct uart_8250_port *p) { diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index beea6ca73ee5..f4fd362f6da2 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -122,13 +122,44 @@ static unsigned int dw8250_serial_in(struct uart_port *p, int offset) return dw8250_modify_msr(p, offset, value); } -/* Read Back (rb) version to ensure register access ording. */ -static void dw8250_serial_out_rb(struct uart_port *p, int offset, int value) +#ifdef CONFIG_64BIT +static unsigned int dw8250_serial_inq(struct uart_port *p, int offset) { - dw8250_serial_out(p, offset, value); - dw8250_serial_in(p, UART_LCR); + unsigned int value; + + value = (u8)__raw_readq(p->membase + (offset << p->regshift)); + + return dw8250_modify_msr(p, offset, value); } +static void dw8250_serial_outq(struct uart_port *p, int offset, int value) +{ + struct dw8250_data *d = p->private_data; + + if (offset == UART_MCR) + d->last_mcr = value; + + value &= 0xff; + __raw_writeq(value, p->membase + (offset << p->regshift)); + /* Read back to ensure register write ordering. */ + __raw_readq(p->membase + (UART_LCR << p->regshift)); + + /* Make sure LCR write wasn't ignored */ + if (offset == UART_LCR) { + int tries = 1000; + while (tries--) { + unsigned int lcr = p->serial_in(p, UART_LCR); + if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR)) + return; + dw8250_force_idle(p); + __raw_writeq(value & 0xff, + p->membase + (UART_LCR << p->regshift)); + } + dev_err(p->dev, "Couldn't set LCR to %d\n", value); + } +} +#endif /* CONFIG_64BIT */ + static void dw8250_serial_out32(struct uart_port *p, int offset, int value) { struct dw8250_data *d = p->private_data; @@ -258,22 +289,19 @@ static int dw8250_probe_of(struct uart_port *p, struct uart_8250_port *up = up_to_u8250p(p); u32 val; bool has_ucv = true; + int id; +#ifdef CONFIG_64BIT if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) { -#ifdef __BIG_ENDIAN - /* - * Low order bits of these 64-bit registers, when - * accessed as a byte, are 7 bytes further down in the - * address space in big endian mode. - */ - p->membase += 7; -#endif - p->serial_out = dw8250_serial_out_rb; + p->serial_in = dw8250_serial_inq; + p->serial_out = dw8250_serial_outq; p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; p->type = PORT_OCTEON; data->usr_reg = 0x27; has_ucv = false; - } else if (!of_property_read_u32(np, "reg-io-width", &val)) { + } else +#endif + if (!of_property_read_u32(np, "reg-io-width", &val)) { switch (val) { case 1: break; @@ -290,9 +318,22 @@ static int dw8250_probe_of(struct uart_port *p, if (has_ucv) dw8250_setup_port(up); + /* if we have a valid fifosize, try hooking up DMA here */ + if (p->fifosize) { + up->dma = &data->dma; + + up->dma->rxconf.src_maxburst = p->fifosize / 4; + up->dma->txconf.dst_maxburst = p->fifosize / 4; + } + if (!of_property_read_u32(np, "reg-shift", &val)) p->regshift = val; + /* get index of serial line, if found in DT aliases */ + id = of_alias_get_id(np, "serial"); + if (id >= 0) + p->line = id; + /* clock got configured through clk api, all done */ if (p->uartclk) return 0; diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c index 56c87232b6a0..478599d82506 100644 --- a/drivers/tty/serial/8250/8250_em.c +++ b/drivers/tty/serial/8250/8250_em.c @@ -102,10 +102,8 @@ static int serial8250_em_probe(struct platform_device *pdev) } priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) { - dev_err(&pdev->dev, "unable to allocate private data\n"); + if (!priv) return -ENOMEM; - } priv->sclk = devm_clk_get(&pdev->dev, "sclk"); if (IS_ERR(priv->sclk)) { diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c index 1bb28cb69493..1e6899bc9429 100644 --- a/drivers/tty/serial/8250/8250_fintek.c +++ b/drivers/tty/serial/8250/8250_fintek.c @@ -89,11 +89,11 @@ static int fintek_8250_check_id(void) return 0; } -static int fintek_8250_rs4850_config(struct uart_8250_port *uart, +static int fintek_8250_rs485_config(struct uart_port *port, struct serial_rs485 *rs485) { uint8_t config = 0; - int index = fintek_8250_get_index(uart->port.iobase); + int index = fintek_8250_get_index(port->iobase); if (index < 0) return -EINVAL; @@ -134,6 +134,8 @@ static int fintek_8250_rs4850_config(struct uart_8250_port *uart, outb(config, DATA_PORT); fintek_8250_exit_key(); + port->rs485 = *rs485; + return 0; } @@ -166,7 +168,7 @@ fintek_8250_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id) uart.port.irq = pnp_irq(dev, 0); uart.port.iobase = pnp_port_start(dev, 0); uart.port.iotype = UPIO_PORT; - uart.rs485_config = fintek_8250_rs4850_config; + uart.port.rs485_config = fintek_8250_rs485_config; uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF; if (pnp_irq_flags(dev, 0) & IORESOURCE_IRQ_SHAREABLE) diff --git a/drivers/tty/serial/8250/8250_hp300.c b/drivers/tty/serial/8250/8250_hp300.c index afffe4d1f034..b4882082b247 100644 --- a/drivers/tty/serial/8250/8250_hp300.c +++ b/drivers/tty/serial/8250/8250_hp300.c @@ -88,10 +88,6 @@ extern int hp300_uart_scode; /* * Parse the bootinfo to find descriptions for headless console and * debug serial ports and register them with the 8250 driver. - * This function should be called before serial_console_init() is called - * to make sure the serial console will be available for use. IA-64 kernel - * calls this function from setup_arch() after the EFI and ACPI tables have - * been parsed. */ int __init hp300_setup_serial_console(void) { diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c index de7aae523b37..6f93123a428a 100644 --- a/drivers/tty/serial/8250/8250_mtk.c +++ b/drivers/tty/serial/8250/8250_mtk.c @@ -74,14 +74,14 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, /* Set to next lower baudrate supported */ if ((baud == 500000) || (baud == 576000)) baud = 460800; - quot = DIV_ROUND_CLOSEST(port->uartclk, 4 * baud); + quot = DIV_ROUND_UP(port->uartclk, 4 * baud); } else { serial_port_out(port, UART_MTK_HIGHS, 0x3); /* Set to highest baudrate supported */ if (baud >= 1152000) baud = 921600; - quot = (port->uartclk / (256 * baud)) + 1; + quot = DIV_ROUND_UP(port->uartclk, 256 * baud); } /* diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c new file mode 100644 index 000000000000..336602eb453e --- /dev/null +++ b/drivers/tty/serial/8250/8250_omap.c @@ -0,0 +1,1281 @@ +/* + * 8250-core based driver for the OMAP internal UART + * + * based on omap-serial.c, Copyright (C) 2010 Texas Instruments. + * + * Copyright (C) 2014 Sebastian Andrzej Siewior + * + */ + +#include <linux/device.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/serial_8250.h> +#include <linux/serial_core.h> +#include <linux/serial_reg.h> +#include <linux/tty_flip.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/of.h> +#include <linux/of_gpio.h> +#include <linux/of_irq.h> +#include <linux/delay.h> +#include <linux/pm_runtime.h> +#include <linux/console.h> +#include <linux/pm_qos.h> +#include <linux/dma-mapping.h> + +#include "8250.h" + +#define DEFAULT_CLK_SPEED 48000000 + +#define UART_ERRATA_i202_MDR1_ACCESS (1 << 0) +#define OMAP_UART_WER_HAS_TX_WAKEUP (1 << 1) +#define OMAP_DMA_TX_KICK (1 << 2) + +#define OMAP_UART_FCR_RX_TRIG 6 +#define OMAP_UART_FCR_TX_TRIG 4 + +/* SCR register bitmasks */ +#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) +#define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) +#define OMAP_UART_SCR_TX_EMPTY (1 << 3) +#define OMAP_UART_SCR_DMAMODE_MASK (3 << 1) +#define OMAP_UART_SCR_DMAMODE_1 (1 << 1) +#define OMAP_UART_SCR_DMAMODE_CTL (1 << 0) + +/* MVR register bitmasks */ +#define OMAP_UART_MVR_SCHEME_SHIFT 30 +#define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 +#define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 +#define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f +#define OMAP_UART_MVR_MAJ_MASK 0x700 +#define OMAP_UART_MVR_MAJ_SHIFT 8 +#define OMAP_UART_MVR_MIN_MASK 0x3f + +#define UART_TI752_TLR_TX 0 +#define UART_TI752_TLR_RX 4 + +#define TRIGGER_TLR_MASK(x) ((x & 0x3c) >> 2) +#define TRIGGER_FCR_MASK(x) (x & 3) + +/* Enable XON/XOFF flow control on output */ +#define OMAP_UART_SW_TX 0x08 +/* Enable XON/XOFF flow control on input */ +#define OMAP_UART_SW_RX 0x02 + +#define OMAP_UART_WER_MOD_WKUP 0x7f +#define OMAP_UART_TX_WAKEUP_EN (1 << 7) + +#define TX_TRIGGER 1 +#define RX_TRIGGER 48 + +#define OMAP_UART_TCR_RESTORE(x) ((x / 4) << 4) +#define OMAP_UART_TCR_HALT(x) ((x / 4) << 0) + +#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) + +#define OMAP_UART_REV_46 0x0406 +#define OMAP_UART_REV_52 0x0502 +#define OMAP_UART_REV_63 0x0603 + +struct omap8250_priv { + int line; + u8 habit; + u8 mdr1; + u8 efr; + u8 scr; + u8 wer; + u8 xon; + u8 xoff; + u8 delayed_restore; + u16 quot; + + bool is_suspending; + int wakeirq; + int wakeups_enabled; + u32 latency; + u32 calc_latency; + struct pm_qos_request pm_qos_request; + struct work_struct qos_work; + struct uart_8250_dma omap8250_dma; +}; + +static u32 uart_read(struct uart_8250_port *up, u32 reg) +{ + return readl(up->port.membase + (reg << up->port.regshift)); +} + +/* + * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) + * The access to uart register after MDR1 Access + * causes UART to corrupt data. + * + * Need a delay = + * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) + * give 10 times as much + */ +static void omap_8250_mdr1_errataset(struct uart_8250_port *up, + struct omap8250_priv *priv) +{ + u8 timeout = 255; + u8 old_mdr1; + + old_mdr1 = serial_in(up, UART_OMAP_MDR1); + if (old_mdr1 == priv->mdr1) + return; + + serial_out(up, UART_OMAP_MDR1, priv->mdr1); + udelay(2); + serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | + UART_FCR_CLEAR_RCVR); + /* + * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and + * TX_FIFO_E bit is 1. + */ + while (UART_LSR_THRE != (serial_in(up, UART_LSR) & + (UART_LSR_THRE | UART_LSR_DR))) { + timeout--; + if (!timeout) { + /* Should *never* happen. we warn and carry on */ + dev_crit(up->port.dev, "Errata i202: timedout %x\n", + serial_in(up, UART_LSR)); + break; + } + udelay(1); + } +} + +static void omap_8250_get_divisor(struct uart_port *port, unsigned int baud, + struct omap8250_priv *priv) +{ + unsigned int uartclk = port->uartclk; + unsigned int div_13, div_16; + unsigned int abs_d13, abs_d16; + + /* + * Old custom speed handling. + */ + if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) { + priv->quot = port->custom_divisor & 0xffff; + /* + * I assume that nobody is using this. But hey, if somebody + * would like to specify the divisor _and_ the mode then the + * driver is ready and waiting for it. + */ + if (port->custom_divisor & (1 << 16)) + priv->mdr1 = UART_OMAP_MDR1_13X_MODE; + else + priv->mdr1 = UART_OMAP_MDR1_16X_MODE; + return; + } + div_13 = DIV_ROUND_CLOSEST(uartclk, 13 * baud); + div_16 = DIV_ROUND_CLOSEST(uartclk, 16 * baud); + + if (!div_13) + div_13 = 1; + if (!div_16) + div_16 = 1; + + abs_d13 = abs(baud - uartclk / 13 / div_13); + abs_d16 = abs(baud - uartclk / 16 / div_16); + + if (abs_d13 >= abs_d16) { + priv->mdr1 = UART_OMAP_MDR1_16X_MODE; + priv->quot = div_16; + } else { + priv->mdr1 = UART_OMAP_MDR1_13X_MODE; + priv->quot = div_13; + } +} + +static void omap8250_update_scr(struct uart_8250_port *up, + struct omap8250_priv *priv) +{ + u8 old_scr; + + old_scr = serial_in(up, UART_OMAP_SCR); + if (old_scr == priv->scr) + return; + + /* + * The manual recommends not to enable the DMA mode selector in the SCR + * (instead of the FCR) register _and_ selecting the DMA mode as one + * register write because this may lead to malfunction. + */ + if (priv->scr & OMAP_UART_SCR_DMAMODE_MASK) + serial_out(up, UART_OMAP_SCR, + priv->scr & ~OMAP_UART_SCR_DMAMODE_MASK); + serial_out(up, UART_OMAP_SCR, priv->scr); +} + +static void omap8250_restore_regs(struct uart_8250_port *up) +{ + struct omap8250_priv *priv = up->port.private_data; + struct uart_8250_dma *dma = up->dma; + + if (dma && dma->tx_running) { + /* + * TCSANOW requests the change to occur immediately however if + * we have a TX-DMA operation in progress then it has been + * observed that it might stall and never complete. Therefore we + * delay DMA completes to prevent this hang from happen. + */ + priv->delayed_restore = 1; + return; + } + + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + serial_out(up, UART_EFR, UART_EFR_ECB); + + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); + serial_out(up, UART_MCR, UART_MCR_TCRTLR); + serial_out(up, UART_FCR, up->fcr); + + omap8250_update_scr(up, priv); + + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + + serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_RESTORE(16) | + OMAP_UART_TCR_HALT(52)); + serial_out(up, UART_TI752_TLR, + TRIGGER_TLR_MASK(TX_TRIGGER) << UART_TI752_TLR_TX | + TRIGGER_TLR_MASK(RX_TRIGGER) << UART_TI752_TLR_RX); + + serial_out(up, UART_LCR, 0); + + /* drop TCR + TLR access, we setup XON/XOFF later */ + serial_out(up, UART_MCR, up->mcr); + serial_out(up, UART_IER, up->ier); + + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + serial_dl_write(up, priv->quot); + + serial_out(up, UART_EFR, priv->efr); + + /* Configure flow control */ + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + serial_out(up, UART_XON1, priv->xon); + serial_out(up, UART_XOFF1, priv->xoff); + + serial_out(up, UART_LCR, up->lcr); + /* need mode A for FCR */ + if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS) + omap_8250_mdr1_errataset(up, priv); + else + serial_out(up, UART_OMAP_MDR1, priv->mdr1); + up->port.ops->set_mctrl(&up->port, up->port.mctrl); +} + +/* + * OMAP can use "CLK / (16 or 13) / div" for baud rate. And then we have have + * some differences in how we want to handle flow control. + */ +static void omap_8250_set_termios(struct uart_port *port, + struct ktermios *termios, + struct ktermios *old) +{ + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + struct omap8250_priv *priv = up->port.private_data; + unsigned char cval = 0; + unsigned int baud; + + switch (termios->c_cflag & CSIZE) { + case CS5: + cval = UART_LCR_WLEN5; + break; + case CS6: + cval = UART_LCR_WLEN6; + break; + case CS7: + cval = UART_LCR_WLEN7; + break; + default: + case CS8: + cval = UART_LCR_WLEN8; + break; + } + + if (termios->c_cflag & CSTOPB) + cval |= UART_LCR_STOP; + if (termios->c_cflag & PARENB) + cval |= UART_LCR_PARITY; + if (!(termios->c_cflag & PARODD)) + cval |= UART_LCR_EPAR; + if (termios->c_cflag & CMSPAR) + cval |= UART_LCR_SPAR; + + /* + * Ask the core to calculate the divisor for us. + */ + baud = uart_get_baud_rate(port, termios, old, + port->uartclk / 16 / 0xffff, + port->uartclk / 13); + omap_8250_get_divisor(port, baud, priv); + + /* + * Ok, we're now changing the port state. Do it with + * interrupts disabled. + */ + pm_runtime_get_sync(port->dev); + spin_lock_irq(&port->lock); + + /* + * Update the per-port timeout. + */ + uart_update_timeout(port, termios->c_cflag, baud); + + up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; + if (termios->c_iflag & INPCK) + up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; + if (termios->c_iflag & (IGNBRK | PARMRK)) + up->port.read_status_mask |= UART_LSR_BI; + + /* + * Characters to ignore + */ + up->port.ignore_status_mask = 0; + if (termios->c_iflag & IGNPAR) + up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; + if (termios->c_iflag & IGNBRK) { + up->port.ignore_status_mask |= UART_LSR_BI; + /* + * If we're ignoring parity and break indicators, + * ignore overruns too (for real raw support). + */ + if (termios->c_iflag & IGNPAR) + up->port.ignore_status_mask |= UART_LSR_OE; + } + + /* + * ignore all characters if CREAD is not set + */ + if ((termios->c_cflag & CREAD) == 0) + up->port.ignore_status_mask |= UART_LSR_DR; + + /* + * Modem status interrupts + */ + up->ier &= ~UART_IER_MSI; + if (UART_ENABLE_MS(&up->port, termios->c_cflag)) + up->ier |= UART_IER_MSI; + + up->lcr = cval; + /* Up to here it was mostly serial8250_do_set_termios() */ + + /* + * We enable TRIG_GRANU for RX and TX and additionaly we set + * SCR_TX_EMPTY bit. The result is the following: + * - RX_TRIGGER amount of bytes in the FIFO will cause an interrupt. + * - less than RX_TRIGGER number of bytes will also cause an interrupt + * once the UART decides that there no new bytes arriving. + * - Once THRE is enabled, the interrupt will be fired once the FIFO is + * empty - the trigger level is ignored here. + * + * Once DMA is enabled: + * - UART will assert the TX DMA line once there is room for TX_TRIGGER + * bytes in the TX FIFO. On each assert the DMA engine will move + * TX_TRIGGER bytes into the FIFO. + * - UART will assert the RX DMA line once there are RX_TRIGGER bytes in + * the FIFO and move RX_TRIGGER bytes. + * This is because threshold and trigger values are the same. + */ + up->fcr = UART_FCR_ENABLE_FIFO; + up->fcr |= TRIGGER_FCR_MASK(TX_TRIGGER) << OMAP_UART_FCR_TX_TRIG; + up->fcr |= TRIGGER_FCR_MASK(RX_TRIGGER) << OMAP_UART_FCR_RX_TRIG; + + priv->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_MASK | OMAP_UART_SCR_TX_EMPTY | + OMAP_UART_SCR_TX_TRIG_GRANU1_MASK; + + if (up->dma) + priv->scr |= OMAP_UART_SCR_DMAMODE_1 | + OMAP_UART_SCR_DMAMODE_CTL; + + priv->xon = termios->c_cc[VSTART]; + priv->xoff = termios->c_cc[VSTOP]; + + priv->efr = 0; + up->mcr &= ~(UART_MCR_RTS | UART_MCR_XONANY); + if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { + /* Enable AUTORTS and AUTOCTS */ + priv->efr |= UART_EFR_CTS | UART_EFR_RTS; + + /* Ensure MCR RTS is asserted */ + up->mcr |= UART_MCR_RTS; + } else if (up->port.flags & UPF_SOFT_FLOW) { + /* + * IXON Flag: + * Enable XON/XOFF flow control on input. + * Receiver compares XON1, XOFF1. + */ + if (termios->c_iflag & IXON) + priv->efr |= OMAP_UART_SW_RX; + + /* + * IXOFF Flag: + * Enable XON/XOFF flow control on output. + * Transmit XON1, XOFF1 + */ + if (termios->c_iflag & IXOFF) + priv->efr |= OMAP_UART_SW_TX; + + /* + * IXANY Flag: + * Enable any character to restart output. + * Operation resumes after receiving any + * character after recognition of the XOFF character + */ + if (termios->c_iflag & IXANY) + up->mcr |= UART_MCR_XONANY; + } + omap8250_restore_regs(up); + + spin_unlock_irq(&up->port.lock); + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); + + /* calculate wakeup latency constraint */ + priv->calc_latency = USEC_PER_SEC * 64 * 8 / baud; + priv->latency = priv->calc_latency; + + schedule_work(&priv->qos_work); + + /* Don't rewrite B0 */ + if (tty_termios_baud_rate(termios)) + tty_termios_encode_baud_rate(termios, baud, baud); +} + +/* same as 8250 except that we may have extra flow bits set in EFR */ +static void omap_8250_pm(struct uart_port *port, unsigned int state, + unsigned int oldstate) +{ + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + struct omap8250_priv *priv = up->port.private_data; + + pm_runtime_get_sync(port->dev); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + serial_out(up, UART_EFR, priv->efr | UART_EFR_ECB); + serial_out(up, UART_LCR, 0); + + serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + serial_out(up, UART_EFR, priv->efr); + serial_out(up, UART_LCR, 0); + + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); +} + +static void omap_serial_fill_features_erratas(struct uart_8250_port *up, + struct omap8250_priv *priv) +{ + u32 mvr, scheme; + u16 revision, major, minor; + + mvr = uart_read(up, UART_OMAP_MVER); + + /* Check revision register scheme */ + scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; + + switch (scheme) { + case 0: /* Legacy Scheme: OMAP2/3 */ + /* MINOR_REV[0:4], MAJOR_REV[4:7] */ + major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> + OMAP_UART_LEGACY_MVR_MAJ_SHIFT; + minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); + break; + case 1: + /* New Scheme: OMAP4+ */ + /* MINOR_REV[0:5], MAJOR_REV[8:10] */ + major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> + OMAP_UART_MVR_MAJ_SHIFT; + minor = (mvr & OMAP_UART_MVR_MIN_MASK); + break; + default: + dev_warn(up->port.dev, + "Unknown revision, defaulting to highest\n"); + /* highest possible revision */ + major = 0xff; + minor = 0xff; + } + /* normalize revision for the driver */ + revision = UART_BUILD_REVISION(major, minor); + + switch (revision) { + case OMAP_UART_REV_46: + priv->habit = UART_ERRATA_i202_MDR1_ACCESS; + break; + case OMAP_UART_REV_52: + priv->habit = UART_ERRATA_i202_MDR1_ACCESS | + OMAP_UART_WER_HAS_TX_WAKEUP; + break; + case OMAP_UART_REV_63: + priv->habit = UART_ERRATA_i202_MDR1_ACCESS | + OMAP_UART_WER_HAS_TX_WAKEUP; + break; + default: + break; + } +} + +static void omap8250_uart_qos_work(struct work_struct *work) +{ + struct omap8250_priv *priv; + + priv = container_of(work, struct omap8250_priv, qos_work); + pm_qos_update_request(&priv->pm_qos_request, priv->latency); +} + +static irqreturn_t omap_wake_irq(int irq, void *dev_id) +{ + struct uart_port *port = dev_id; + int ret; + + ret = port->handle_irq(port); + if (ret) + return IRQ_HANDLED; + return IRQ_NONE; +} + +static int omap_8250_startup(struct uart_port *port) +{ + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + struct omap8250_priv *priv = port->private_data; + + int ret; + + if (priv->wakeirq) { + ret = request_irq(priv->wakeirq, omap_wake_irq, + port->irqflags, "uart wakeup irq", port); + if (ret) + return ret; + disable_irq(priv->wakeirq); + } + + pm_runtime_get_sync(port->dev); + + ret = serial8250_do_startup(port); + if (ret) + goto err; + +#ifdef CONFIG_PM_RUNTIME + up->capabilities |= UART_CAP_RPM; +#endif + + /* Enable module level wake up */ + priv->wer = OMAP_UART_WER_MOD_WKUP; + if (priv->habit & OMAP_UART_WER_HAS_TX_WAKEUP) + priv->wer |= OMAP_UART_TX_WAKEUP_EN; + serial_out(up, UART_OMAP_WER, priv->wer); + + if (up->dma) + up->dma->rx_dma(up, 0); + + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); + return 0; +err: + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); + if (priv->wakeirq) + free_irq(priv->wakeirq, port); + return ret; +} + +static void omap_8250_shutdown(struct uart_port *port) +{ + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + struct omap8250_priv *priv = port->private_data; + + flush_work(&priv->qos_work); + if (up->dma) + up->dma->rx_dma(up, UART_IIR_RX_TIMEOUT); + + pm_runtime_get_sync(port->dev); + + serial_out(up, UART_OMAP_WER, 0); + serial8250_do_shutdown(port); + + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); + + if (priv->wakeirq) + free_irq(priv->wakeirq, port); +} + +static void omap_8250_throttle(struct uart_port *port) +{ + unsigned long flags; + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + + pm_runtime_get_sync(port->dev); + + spin_lock_irqsave(&port->lock, flags); + up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); + serial_out(up, UART_IER, up->ier); + spin_unlock_irqrestore(&port->lock, flags); + + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); +} + +static void omap_8250_unthrottle(struct uart_port *port) +{ + unsigned long flags; + struct uart_8250_port *up = + container_of(port, struct uart_8250_port, port); + + pm_runtime_get_sync(port->dev); + + spin_lock_irqsave(&port->lock, flags); + up->ier |= UART_IER_RLSI | UART_IER_RDI; + serial_out(up, UART_IER, up->ier); + spin_unlock_irqrestore(&port->lock, flags); + + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); +} + +#ifdef CONFIG_SERIAL_8250_DMA +static int omap_8250_rx_dma(struct uart_8250_port *p, unsigned int iir); + +static void __dma_rx_do_complete(struct uart_8250_port *p, bool error) +{ + struct uart_8250_dma *dma = p->dma; + struct tty_port *tty_port = &p->port.state->port; + struct dma_tx_state state; + int count; + + dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, + dma->rx_size, DMA_FROM_DEVICE); + + dma->rx_running = 0; + dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); + dmaengine_terminate_all(dma->rxchan); + + count = dma->rx_size - state.residue; + + tty_insert_flip_string(tty_port, dma->rx_buf, count); + p->port.icount.rx += count; + if (!error) + omap_8250_rx_dma(p, 0); + + tty_flip_buffer_push(tty_port); +} + +static void __dma_rx_complete(void *param) +{ + __dma_rx_do_complete(param, false); +} + +static int omap_8250_rx_dma(struct uart_8250_port *p, unsigned int iir) +{ + struct uart_8250_dma *dma = p->dma; + struct dma_async_tx_descriptor *desc; + + switch (iir & 0x3f) { + case UART_IIR_RLSI: + /* 8250_core handles errors and break interrupts */ + if (dma->rx_running) { + dmaengine_pause(dma->rxchan); + __dma_rx_do_complete(p, true); + } + return -EIO; + case UART_IIR_RX_TIMEOUT: + /* + * If RCVR FIFO trigger level was not reached, complete the + * transfer and let 8250_core copy the remaining data. + */ + if (dma->rx_running) { + dmaengine_pause(dma->rxchan); + __dma_rx_do_complete(p, true); + } + return -ETIMEDOUT; + case UART_IIR_RDI: + /* + * The OMAP UART is a special BEAST. If we receive RDI we _have_ + * a DMA transfer programmed but it didn't work. One reason is + * that we were too slow and there were too many bytes in the + * FIFO, the UART counted wrong and never kicked the DMA engine + * to do anything. That means once we receive RDI on OMAP then + * the DMA won't do anything soon so we have to cancel the DMA + * transfer and purge the FIFO manually. + */ + if (dma->rx_running) { + dmaengine_pause(dma->rxchan); + __dma_rx_do_complete(p, true); + } + return -ETIMEDOUT; + + default: + break; + } + + if (dma->rx_running) + return 0; + + desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, + dma->rx_size, DMA_DEV_TO_MEM, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) + return -EBUSY; + + dma->rx_running = 1; + desc->callback = __dma_rx_complete; + desc->callback_param = p; + + dma->rx_cookie = dmaengine_submit(desc); + + dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, + dma->rx_size, DMA_FROM_DEVICE); + + dma_async_issue_pending(dma->rxchan); + return 0; +} + +static int omap_8250_tx_dma(struct uart_8250_port *p); + +static void omap_8250_dma_tx_complete(void *param) +{ + struct uart_8250_port *p = param; + struct uart_8250_dma *dma = p->dma; + struct circ_buf *xmit = &p->port.state->xmit; + unsigned long flags; + bool en_thri = false; + struct omap8250_priv *priv = p->port.private_data; + + dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, + UART_XMIT_SIZE, DMA_TO_DEVICE); + + spin_lock_irqsave(&p->port.lock, flags); + + dma->tx_running = 0; + + xmit->tail += dma->tx_size; + xmit->tail &= UART_XMIT_SIZE - 1; + p->port.icount.tx += dma->tx_size; + + if (priv->delayed_restore) { + priv->delayed_restore = 0; + omap8250_restore_regs(p); + } + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(&p->port); + + if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) { + int ret; + + ret = omap_8250_tx_dma(p); + if (ret) + en_thri = true; + + } else if (p->capabilities & UART_CAP_RPM) { + en_thri = true; + } + + if (en_thri) { + dma->tx_err = 1; + p->ier |= UART_IER_THRI; + serial_port_out(&p->port, UART_IER, p->ier); + } + + spin_unlock_irqrestore(&p->port.lock, flags); +} + +static int omap_8250_tx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + struct omap8250_priv *priv = p->port.private_data; + struct circ_buf *xmit = &p->port.state->xmit; + struct dma_async_tx_descriptor *desc; + unsigned int skip_byte = 0; + int ret; + + if (dma->tx_running) + return 0; + if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) { + + /* + * Even if no data, we need to return an error for the two cases + * below so serial8250_tx_chars() is invoked and properly clears + * THRI and/or runtime suspend. + */ + if (dma->tx_err || p->capabilities & UART_CAP_RPM) { + ret = -EBUSY; + goto err; + } + if (p->ier & UART_IER_THRI) { + p->ier &= ~UART_IER_THRI; + serial_out(p, UART_IER, p->ier); + } + return 0; + } + + dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); + if (priv->habit & OMAP_DMA_TX_KICK) { + u8 tx_lvl; + + /* + * We need to put the first byte into the FIFO in order to start + * the DMA transfer. For transfers smaller than four bytes we + * don't bother doing DMA at all. It seem not matter if there + * are still bytes in the FIFO from the last transfer (in case + * we got here directly from omap_8250_dma_tx_complete()). Bytes + * leaving the FIFO seem not to trigger the DMA transfer. It is + * really the byte that we put into the FIFO. + * If the FIFO is already full then we most likely got here from + * omap_8250_dma_tx_complete(). And this means the DMA engine + * just completed its work. We don't have to wait the complete + * 86us at 115200,8n1 but around 60us (not to mention lower + * baudrates). So in that case we take the interrupt and try + * again with an empty FIFO. + */ + tx_lvl = serial_in(p, UART_OMAP_TX_LVL); + if (tx_lvl == p->tx_loadsz) { + ret = -EBUSY; + goto err; + } + if (dma->tx_size < 4) { + ret = -EINVAL; + goto err; + } + skip_byte = 1; + } + + desc = dmaengine_prep_slave_single(dma->txchan, + dma->tx_addr + xmit->tail + skip_byte, + dma->tx_size - skip_byte, DMA_MEM_TO_DEV, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) { + ret = -EBUSY; + goto err; + } + + dma->tx_running = 1; + + desc->callback = omap_8250_dma_tx_complete; + desc->callback_param = p; + + dma->tx_cookie = dmaengine_submit(desc); + + dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, + UART_XMIT_SIZE, DMA_TO_DEVICE); + + dma_async_issue_pending(dma->txchan); + if (dma->tx_err) + dma->tx_err = 0; + + if (p->ier & UART_IER_THRI) { + p->ier &= ~UART_IER_THRI; + serial_out(p, UART_IER, p->ier); + } + if (skip_byte) + serial_out(p, UART_TX, xmit->buf[xmit->tail]); + return 0; +err: + dma->tx_err = 1; + return ret; +} + +/* + * This is mostly serial8250_handle_irq(). We have a slightly different DMA + * hoook for RX/TX and need different logic for them in the ISR. Therefore we + * use the default routine in the non-DMA case and this one for with DMA. + */ +static int omap_8250_dma_handle_irq(struct uart_port *port) +{ + struct uart_8250_port *up = up_to_u8250p(port); + unsigned char status; + unsigned long flags; + u8 iir; + int dma_err = 0; + + serial8250_rpm_get(up); + + iir = serial_port_in(port, UART_IIR); + if (iir & UART_IIR_NO_INT) { + serial8250_rpm_put(up); + return 0; + } + + spin_lock_irqsave(&port->lock, flags); + + status = serial_port_in(port, UART_LSR); + + if (status & (UART_LSR_DR | UART_LSR_BI)) { + + dma_err = omap_8250_rx_dma(up, iir); + if (dma_err) { + status = serial8250_rx_chars(up, status); + omap_8250_rx_dma(up, 0); + } + } + serial8250_modem_status(up); + if (status & UART_LSR_THRE && up->dma->tx_err) { + if (uart_tx_stopped(&up->port) || + uart_circ_empty(&up->port.state->xmit)) { + up->dma->tx_err = 0; + serial8250_tx_chars(up); + } else { + /* + * try again due to an earlier failer which + * might have been resolved by now. + */ + dma_err = omap_8250_tx_dma(up); + if (dma_err) + serial8250_tx_chars(up); + } + } + + spin_unlock_irqrestore(&port->lock, flags); + serial8250_rpm_put(up); + return 1; +} + +static bool the_no_dma_filter_fn(struct dma_chan *chan, void *param) +{ + return false; +} + +#else + +static inline int omap_8250_rx_dma(struct uart_8250_port *p, unsigned int iir) +{ + return -EINVAL; +} +#endif + +static int omap8250_probe(struct platform_device *pdev) +{ + struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + struct omap8250_priv *priv; + struct uart_8250_port up; + int ret; + void __iomem *membase; + + if (!regs || !irq) { + dev_err(&pdev->dev, "missing registers or irq\n"); + return -EINVAL; + } + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + membase = devm_ioremap_nocache(&pdev->dev, regs->start, + resource_size(regs)); + if (!membase) + return -ENODEV; + + memset(&up, 0, sizeof(up)); + up.port.dev = &pdev->dev; + up.port.mapbase = regs->start; + up.port.membase = membase; + up.port.irq = irq->start; + /* + * It claims to be 16C750 compatible however it is a little different. + * It has EFR and has no FCR7_64byte bit. The AFE (which it claims to + * have) is enabled via EFR instead of MCR. The type is set here 8250 + * just to get things going. UNKNOWN does not work for a few reasons and + * we don't need our own type since we don't use 8250's set_termios() + * or pm callback. + */ + up.port.type = PORT_8250; + up.port.iotype = UPIO_MEM; + up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SOFT_FLOW | + UPF_HARD_FLOW; + up.port.private_data = priv; + + up.port.regshift = 2; + up.port.fifosize = 64; + up.tx_loadsz = 64; + up.capabilities = UART_CAP_FIFO; +#ifdef CONFIG_PM_RUNTIME + /* + * PM_RUNTIME is mostly transparent. However to do it right we need to a + * TX empty interrupt before we can put the device to auto idle. So if + * PM_RUNTIME is not enabled we don't add that flag and can spare that + * one extra interrupt in the TX path. + */ + up.capabilities |= UART_CAP_RPM; +#endif + up.port.set_termios = omap_8250_set_termios; + up.port.pm = omap_8250_pm; + up.port.startup = omap_8250_startup; + up.port.shutdown = omap_8250_shutdown; + up.port.throttle = omap_8250_throttle; + up.port.unthrottle = omap_8250_unthrottle; + + if (pdev->dev.of_node) { + ret = of_alias_get_id(pdev->dev.of_node, "serial"); + + of_property_read_u32(pdev->dev.of_node, "clock-frequency", + &up.port.uartclk); + priv->wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); + } else { + ret = pdev->id; + } + if (ret < 0) { + dev_err(&pdev->dev, "failed to get alias/pdev id\n"); + return ret; + } + up.port.line = ret; + + if (!up.port.uartclk) { + up.port.uartclk = DEFAULT_CLK_SPEED; + dev_warn(&pdev->dev, + "No clock speed specified: using default: %d\n", + DEFAULT_CLK_SPEED); + } + + priv->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; + priv->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; + pm_qos_add_request(&priv->pm_qos_request, PM_QOS_CPU_DMA_LATENCY, + priv->latency); + INIT_WORK(&priv->qos_work, omap8250_uart_qos_work); + + device_init_wakeup(&pdev->dev, true); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, -1); + + pm_runtime_irq_safe(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + pm_runtime_get_sync(&pdev->dev); + + omap_serial_fill_features_erratas(&up, priv); +#ifdef CONFIG_SERIAL_8250_DMA + if (pdev->dev.of_node) { + /* + * Oh DMA support. If there are no DMA properties in the DT then + * we will fall back to a generic DMA channel which does not + * really work here. To ensure that we do not get a generic DMA + * channel assigned, we have the the_no_dma_filter_fn() here. + * To avoid "failed to request DMA" messages we check for DMA + * properties in DT. + */ + ret = of_property_count_strings(pdev->dev.of_node, "dma-names"); + if (ret == 2) { + up.dma = &priv->omap8250_dma; + up.port.handle_irq = omap_8250_dma_handle_irq; + priv->omap8250_dma.fn = the_no_dma_filter_fn; + priv->omap8250_dma.tx_dma = omap_8250_tx_dma; + priv->omap8250_dma.rx_dma = omap_8250_rx_dma; + priv->omap8250_dma.rx_size = RX_TRIGGER; + priv->omap8250_dma.rxconf.src_maxburst = RX_TRIGGER; + priv->omap8250_dma.txconf.dst_maxburst = TX_TRIGGER; + + if (of_machine_is_compatible("ti,am33xx")) + priv->habit |= OMAP_DMA_TX_KICK; + } + } +#endif + ret = serial8250_register_8250_port(&up); + if (ret < 0) { + dev_err(&pdev->dev, "unable to register 8250 port\n"); + goto err; + } + priv->line = ret; + platform_set_drvdata(pdev, priv); + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_put_autosuspend(&pdev->dev); + return 0; +err: + pm_runtime_put(&pdev->dev); + pm_runtime_disable(&pdev->dev); + return ret; +} + +static int omap8250_remove(struct platform_device *pdev) +{ + struct omap8250_priv *priv = platform_get_drvdata(pdev); + + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + serial8250_unregister_port(priv->line); + pm_qos_remove_request(&priv->pm_qos_request); + device_init_wakeup(&pdev->dev, false); + return 0; +} + +#if defined(CONFIG_PM_SLEEP) || defined(CONFIG_PM_RUNTIME) + +static inline void omap8250_enable_wakeirq(struct omap8250_priv *priv, + bool enable) +{ + if (!priv->wakeirq) + return; + + if (enable) + enable_irq(priv->wakeirq); + else + disable_irq_nosync(priv->wakeirq); +} + +static void omap8250_enable_wakeup(struct omap8250_priv *priv, + bool enable) +{ + if (enable == priv->wakeups_enabled) + return; + + omap8250_enable_wakeirq(priv, enable); + priv->wakeups_enabled = enable; +} +#endif + +#ifdef CONFIG_PM_SLEEP +static int omap8250_prepare(struct device *dev) +{ + struct omap8250_priv *priv = dev_get_drvdata(dev); + + if (!priv) + return 0; + priv->is_suspending = true; + return 0; +} + +static void omap8250_complete(struct device *dev) +{ + struct omap8250_priv *priv = dev_get_drvdata(dev); + + if (!priv) + return; + priv->is_suspending = false; +} + +static int omap8250_suspend(struct device *dev) +{ + struct omap8250_priv *priv = dev_get_drvdata(dev); + + serial8250_suspend_port(priv->line); + flush_work(&priv->qos_work); + + if (device_may_wakeup(dev)) + omap8250_enable_wakeup(priv, true); + else + omap8250_enable_wakeup(priv, false); + return 0; +} + +static int omap8250_resume(struct device *dev) +{ + struct omap8250_priv *priv = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + omap8250_enable_wakeup(priv, false); + + serial8250_resume_port(priv->line); + return 0; +} +#else +#define omap8250_prepare NULL +#define omap8250_complete NULL +#endif + +#ifdef CONFIG_PM_RUNTIME +static int omap8250_lost_context(struct uart_8250_port *up) +{ + u32 val; + + val = serial_in(up, UART_OMAP_MDR1); + /* + * If we lose context, then MDR1 is set to its reset value which is + * UART_OMAP_MDR1_DISABLE. After set_termios() we set it either to 13x + * or 16x but never to disable again. + */ + if (val == UART_OMAP_MDR1_DISABLE) + return 1; + return 0; +} + +static int omap8250_runtime_suspend(struct device *dev) +{ + struct omap8250_priv *priv = dev_get_drvdata(dev); + struct uart_8250_port *up; + + up = serial8250_get_port(priv->line); + /* + * When using 'no_console_suspend', the console UART must not be + * suspended. Since driver suspend is managed by runtime suspend, + * preventing runtime suspend (by returning error) will keep device + * active during suspend. + */ + if (priv->is_suspending && !console_suspend_enabled) { + if (uart_console(&up->port)) + return -EBUSY; + } + + omap8250_enable_wakeup(priv, true); + if (up->dma) + omap_8250_rx_dma(up, UART_IIR_RX_TIMEOUT); + + priv->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; + schedule_work(&priv->qos_work); + + return 0; +} + +static int omap8250_runtime_resume(struct device *dev) +{ + struct omap8250_priv *priv = dev_get_drvdata(dev); + struct uart_8250_port *up; + int loss_cntx; + + /* In case runtime-pm tries this before we are setup */ + if (!priv) + return 0; + + up = serial8250_get_port(priv->line); + omap8250_enable_wakeup(priv, false); + loss_cntx = omap8250_lost_context(up); + + if (loss_cntx) + omap8250_restore_regs(up); + + if (up->dma) + omap_8250_rx_dma(up, 0); + + priv->latency = priv->calc_latency; + schedule_work(&priv->qos_work); + return 0; +} +#endif + +static const struct dev_pm_ops omap8250_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(omap8250_suspend, omap8250_resume) + SET_RUNTIME_PM_OPS(omap8250_runtime_suspend, + omap8250_runtime_resume, NULL) + .prepare = omap8250_prepare, + .complete = omap8250_complete, +}; + +static const struct of_device_id omap8250_dt_ids[] = { + { .compatible = "ti,omap2-uart" }, + { .compatible = "ti,omap3-uart" }, + { .compatible = "ti,omap4-uart" }, + {}, +}; +MODULE_DEVICE_TABLE(of, omap8250_dt_ids); + +static struct platform_driver omap8250_platform_driver = { + .driver = { + .name = "omap8250", + .pm = &omap8250_dev_pm_ops, + .of_match_table = omap8250_dt_ids, + .owner = THIS_MODULE, + }, + .probe = omap8250_probe, + .remove = omap8250_remove, +}; +module_platform_driver(omap8250_platform_driver); + +MODULE_AUTHOR("Sebastian Andrzej Siewior"); +MODULE_DESCRIPTION("OMAP 8250 Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index beb9d71cd47a..31feeb2d0a66 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -79,29 +79,24 @@ setup_port(struct serial_private *priv, struct uart_8250_port *port, int bar, int offset, int regshift) { struct pci_dev *dev = priv->dev; - unsigned long base, len; if (bar >= PCI_NUM_BAR_RESOURCES) return -EINVAL; - base = pci_resource_start(dev, bar); - if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) { - len = pci_resource_len(dev, bar); - if (!priv->remapped_bar[bar]) - priv->remapped_bar[bar] = ioremap_nocache(base, len); + priv->remapped_bar[bar] = pci_ioremap_bar(dev, bar); if (!priv->remapped_bar[bar]) return -ENOMEM; port->port.iotype = UPIO_MEM; port->port.iobase = 0; - port->port.mapbase = base + offset; + port->port.mapbase = pci_resource_start(dev, bar) + offset; port->port.membase = priv->remapped_bar[bar] + offset; port->port.regshift = regshift; } else { port->port.iotype = UPIO_PORT; - port->port.iobase = base + offset; + port->port.iobase = pci_resource_start(dev, bar) + offset; port->port.mapbase = 0; port->port.membase = NULL; port->port.regshift = 0; @@ -317,7 +312,6 @@ static void pci_plx9050_exit(struct pci_dev *dev) static void pci_ni8420_exit(struct pci_dev *dev) { void __iomem *p; - unsigned long base, len; unsigned int bar = 0; if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) { @@ -325,9 +319,7 @@ static void pci_ni8420_exit(struct pci_dev *dev) return; } - base = pci_resource_start(dev, bar); - len = pci_resource_len(dev, bar); - p = ioremap_nocache(base, len); + p = pci_ioremap_bar(dev, bar); if (p == NULL) return; @@ -349,7 +341,6 @@ static void pci_ni8420_exit(struct pci_dev *dev) static void pci_ni8430_exit(struct pci_dev *dev) { void __iomem *p; - unsigned long base, len; unsigned int bar = 0; if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) { @@ -357,9 +348,7 @@ static void pci_ni8430_exit(struct pci_dev *dev) return; } - base = pci_resource_start(dev, bar); - len = pci_resource_len(dev, bar); - p = ioremap_nocache(base, len); + p = pci_ioremap_bar(dev, bar); if (p == NULL) return; @@ -682,7 +671,6 @@ static int pci_xircom_init(struct pci_dev *dev) static int pci_ni8420_init(struct pci_dev *dev) { void __iomem *p; - unsigned long base, len; unsigned int bar = 0; if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) { @@ -690,9 +678,7 @@ static int pci_ni8420_init(struct pci_dev *dev) return 0; } - base = pci_resource_start(dev, bar); - len = pci_resource_len(dev, bar); - p = ioremap_nocache(base, len); + p = pci_ioremap_bar(dev, bar); if (p == NULL) return -ENOMEM; @@ -714,7 +700,7 @@ static int pci_ni8420_init(struct pci_dev *dev) static int pci_ni8430_init(struct pci_dev *dev) { void __iomem *p; - unsigned long base, len; + struct pci_bus_region region; u32 device_window; unsigned int bar = 0; @@ -723,14 +709,17 @@ static int pci_ni8430_init(struct pci_dev *dev) return 0; } - base = pci_resource_start(dev, bar); - len = pci_resource_len(dev, bar); - p = ioremap_nocache(base, len); + p = pci_ioremap_bar(dev, bar); if (p == NULL) return -ENOMEM; - /* Set device window address and size in BAR0 */ - device_window = ((base + MITE_IOWBSR1_WIN_OFFSET) & 0xffffff00) + /* + * Set device window address and size in BAR0, while acknowledging that + * the resource structure may contain a translated address that differs + * from the address the device responds to. + */ + pcibios_resource_to_bus(dev->bus, ®ion, &dev->resource[bar]); + device_window = ((region.start + MITE_IOWBSR1_WIN_OFFSET) & 0xffffff00) | MITE_IOWBSR1_WENAB | MITE_IOWBSR1_WSIZE; writel(device_window, p + MITE_IOWBSR1); @@ -757,8 +746,8 @@ pci_ni8430_setup(struct serial_private *priv, const struct pciserial_board *board, struct uart_8250_port *port, int idx) { + struct pci_dev *dev = priv->dev; void __iomem *p; - unsigned long base, len; unsigned int bar, offset = board->first_offset; if (idx >= board->num_ports) @@ -767,9 +756,9 @@ pci_ni8430_setup(struct serial_private *priv, bar = FL_GET_BASE(board->flags); offset += idx * board->uart_offset; - base = pci_resource_start(priv->dev, bar); - len = pci_resource_len(priv->dev, bar); - p = ioremap_nocache(base, len); + p = pci_ioremap_bar(dev, bar); + if (!p) + return -ENOMEM; /* enable the transceiver */ writeb(readb(p + offset + NI8430_PORTCON) | NI8430_PORTCON_TXVR_ENABLE, @@ -1003,6 +992,40 @@ static void pci_ite887x_exit(struct pci_dev *dev) } /* + * EndRun Technologies. + * Determine the number of ports available on the device. + */ +#define PCI_VENDOR_ID_ENDRUN 0x7401 +#define PCI_DEVICE_ID_ENDRUN_1588 0xe100 + +static int pci_endrun_init(struct pci_dev *dev) +{ + u8 __iomem *p; + unsigned long deviceID; + unsigned int number_uarts = 0; + + /* EndRun device is all 0xexxx */ + if (dev->vendor == PCI_VENDOR_ID_ENDRUN && + (dev->device & 0xf000) != 0xe000) + return 0; + + p = pci_iomap(dev, 0, 5); + if (p == NULL) + return -ENOMEM; + + deviceID = ioread32(p); + /* EndRun device */ + if (deviceID == 0x07000200) { + number_uarts = ioread8(p + 4); + dev_dbg(&dev->dev, + "%d ports detected on EndRun PCI Express device\n", + number_uarts); + } + pci_iounmap(dev, p); + return number_uarts; +} + +/* * Oxford Semiconductor Inc. * Check that device is part of the Tornado range of devices, then determine * the number of ports available on the device. @@ -1531,25 +1554,48 @@ static int pci_fintek_setup(struct serial_private *priv, unsigned long iobase; unsigned long ciobase = 0; u8 config_base; + u32 bar_data[3]; /* - * We are supposed to be able to read these from the PCI config space, - * but the values there don't seem to match what we need to use, so - * just use these hard-coded values for now, as they are correct. + * Find each UARTs offset in PCI configuraion space */ switch (idx) { - case 0: iobase = 0xe000; config_base = 0x40; break; - case 1: iobase = 0xe008; config_base = 0x48; break; - case 2: iobase = 0xe010; config_base = 0x50; break; - case 3: iobase = 0xe018; config_base = 0x58; break; - case 4: iobase = 0xe020; config_base = 0x60; break; - case 5: iobase = 0xe028; config_base = 0x68; break; - case 6: iobase = 0xe030; config_base = 0x70; break; - case 7: iobase = 0xe038; config_base = 0x78; break; - case 8: iobase = 0xe040; config_base = 0x80; break; - case 9: iobase = 0xe048; config_base = 0x88; break; - case 10: iobase = 0xe050; config_base = 0x90; break; - case 11: iobase = 0xe058; config_base = 0x98; break; + case 0: + config_base = 0x40; + break; + case 1: + config_base = 0x48; + break; + case 2: + config_base = 0x50; + break; + case 3: + config_base = 0x58; + break; + case 4: + config_base = 0x60; + break; + case 5: + config_base = 0x68; + break; + case 6: + config_base = 0x70; + break; + case 7: + config_base = 0x78; + break; + case 8: + config_base = 0x80; + break; + case 9: + config_base = 0x88; + break; + case 10: + config_base = 0x90; + break; + case 11: + config_base = 0x98; + break; default: /* Unknown number of ports, get out of here */ return -EINVAL; @@ -1560,6 +1606,14 @@ static int pci_fintek_setup(struct serial_private *priv, ciobase = (int)(base + (0x8 * idx)); } + /* Get the io address dispatch from the BIOS */ + pci_read_config_dword(pdev, 0x24, &bar_data[0]); + pci_read_config_dword(pdev, 0x20, &bar_data[1]); + pci_read_config_dword(pdev, 0x1c, &bar_data[2]); + + /* Calculate Real IO Port */ + iobase = (bar_data[idx/4] & 0xffffffe0) + (idx % 4) * 8; + dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%lx ciobase=0x%lx config_base=0x%2x\n", __func__, idx, iobase, ciobase, config_base); @@ -1760,6 +1814,16 @@ pci_wch_ch353_setup(struct serial_private *priv, return pci_default_setup(priv, board, port, idx); } +static int +pci_wch_ch382_setup(struct serial_private *priv, + const struct pciserial_board *board, + struct uart_8250_port *port, int idx) +{ + port->port.flags |= UPF_FIXED_TYPE; + port->port.type = PORT_16850; + return pci_default_setup(priv, board, port, idx); +} + #define PCI_VENDOR_ID_SBSMODULARIO 0x124B #define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B #define PCI_DEVICE_ID_OCTPRO 0x0001 @@ -1814,6 +1878,8 @@ pci_wch_ch353_setup(struct serial_private *priv, #define PCI_VENDOR_ID_SUNIX 0x1fd4 #define PCI_DEVICE_ID_SUNIX_1999 0x1999 +#define PCIE_VENDOR_ID_WCH 0x1c00 +#define PCIE_DEVICE_ID_WCH_CH382_2S1P 0x3250 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */ #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 @@ -2346,6 +2412,17 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .setup = pci_netmos_9900_setup, }, /* + * EndRun Technologies + */ + { + .vendor = PCI_VENDOR_ID_ENDRUN, + .device = PCI_ANY_ID, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .init = pci_endrun_init, + .setup = pci_default_setup, + }, + /* * For Oxford Semiconductor Tornado based devices */ { @@ -2494,6 +2571,14 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .subdevice = PCI_ANY_ID, .setup = pci_wch_ch353_setup, }, + /* WCH CH382 2S1P card (16750 clone) */ + { + .vendor = PCIE_VENDOR_ID_WCH, + .device = PCIE_DEVICE_ID_WCH_CH382_2S1P, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .setup = pci_wch_ch382_setup, + }, /* * ASIX devices with FIFO bug */ @@ -2754,6 +2839,7 @@ enum pci_board_num_t { pbn_panacom2, pbn_panacom4, pbn_plx_romulus, + pbn_endrun_2_4000000, pbn_oxsemi, pbn_oxsemi_1_4000000, pbn_oxsemi_2_4000000, @@ -3299,6 +3385,20 @@ static struct pciserial_board pci_boards[] = { }, /* + * EndRun Technologies + * Uses the size of PCI Base region 0 to + * signal now many ports are available + * 2 port 952 Uart support + */ + [pbn_endrun_2_4000000] = { + .flags = FL_BASE0, + .num_ports = 2, + .base_baud = 4000000, + .uart_offset = 0x200, + .first_offset = 0x1000, + }, + + /* * This board uses the size of PCI Base region 0 to * signal now many ports are available */ @@ -3586,6 +3686,7 @@ static const struct pci_device_id blacklist[] = { /* multi-io cards handled by parport_serial */ { PCI_DEVICE(0x4348, 0x7053), }, /* WCH CH353 2S1P */ { PCI_DEVICE(0x4348, 0x5053), }, /* WCH CH353 1S1P */ + { PCI_DEVICE(0x1c00, 0x3250), }, /* WCH CH382 2S1P */ }; /* @@ -4171,6 +4272,13 @@ static struct pci_device_id serial_pci_tbl[] = { 0x10b5, 0x106a, 0, 0, pbn_plx_romulus }, /* + * EndRun Technologies. PCI express device range. + * EndRun PTP/1588 has 2 Native UARTs. + */ + { PCI_VENDOR_ID_ENDRUN, PCI_DEVICE_ID_ENDRUN_1588, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_endrun_2_4000000 }, + /* * Quatech cards. These actually have configurable clocks but for * now we just use the default. * diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig index 21eca79224e4..0fcbcd29502f 100644 --- a/drivers/tty/serial/8250/Kconfig +++ b/drivers/tty/serial/8250/Kconfig @@ -293,12 +293,21 @@ config SERIAL_8250_EM config SERIAL_8250_RT288X bool "Ralink RT288x/RT305x/RT3662/RT3883 serial port support" - depends on SERIAL_8250 && (SOC_RT288X || SOC_RT305X || SOC_RT3883) + depends on SERIAL_8250 && (SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620) help If you have a Ralink RT288x/RT305x SoC based board and want to use the serial port, say Y to this option. The driver can handle up to 2 serial ports. If unsure, say N. +config SERIAL_8250_OMAP + tristate "Support for OMAP internal UART (8250 based driver)" + depends on SERIAL_8250 && ARCH_OMAP2PLUS + help + If you have a machine based on an Texas Instruments OMAP CPU you + can enable its onboard serial ports by enabling this option. + + This driver uses ttyS instead of ttyO. + config SERIAL_8250_FINTEK tristate "Support for Fintek F81216A LPC to 4 UART" depends on SERIAL_8250 && PNP diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile index 5256b894e46a..31e7cdc6865c 100644 --- a/drivers/tty/serial/8250/Makefile +++ b/drivers/tty/serial/8250/Makefile @@ -20,5 +20,6 @@ obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o +obj-$(CONFIG_SERIAL_8250_OMAP) += 8250_omap.o obj-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index a26653fe788c..c79b43cd6014 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1029,11 +1029,11 @@ config SERIAL_VR41XX_CONSOLE a console on a serial port, say Y. Otherwise, say N. config SERIAL_JSM - tristate "Digi International NEO PCI Support" + tristate "Digi International NEO and Classic PCI Support" depends on PCI select SERIAL_CORE help - This is a driver for Digi International's Neo series + This is a driver for Digi International's Neo and Classic series of cards which provide multiple serial ports. You would need something like this to connect more than two modems to your Linux box, for instance in order to become a dial-in server. This driver @@ -1281,22 +1281,25 @@ config SERIAL_TIMBERDALE Add support for UART controller on timberdale. config SERIAL_BCM63XX - tristate "bcm63xx serial port support" + tristate "Broadcom BCM63xx/BCM33xx UART support" select SERIAL_CORE - depends on BCM63XX + depends on MIPS || ARM || COMPILE_TEST help - If you have a bcm63xx CPU, you can enable its onboard - serial port by enabling this options. + This enables the driver for the onchip UART core found on + the following chipsets: - To compile this driver as a module, choose M here: the - module will be called bcm963xx_uart. + BCM33xx (cable modem) + BCM63xx/BCM63xxx (DSL) + BCM68xx (PON) + BCM7xxx (STB) - DOCSIS console config SERIAL_BCM63XX_CONSOLE - bool "Console on bcm63xx serial port" + bool "Console on BCM63xx serial port" depends on SERIAL_BCM63XX=y select SERIAL_CORE_CONSOLE + select SERIAL_EARLYCON help - If you have enabled the serial port on the bcm63xx CPU + If you have enabled the serial port on the BCM63xx CPU you can make it the console by answering Y to this option. config SERIAL_GRLIB_GAISLER_APBUART @@ -1408,6 +1411,7 @@ config SERIAL_MXS_AUART depends on ARCH_MXS tristate "MXS AUART support" select SERIAL_CORE + select SERIAL_MCTRL_GPIO if GPIOLIB help This driver supports the MXS Application UART (AUART) port. diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c index 2064d31d0c8b..5d41d5b92619 100644 --- a/drivers/tty/serial/amba-pl010.c +++ b/drivers/tty/serial/amba-pl010.c @@ -75,7 +75,8 @@ struct uart_amba_port { static void pl010_stop_tx(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int cr; cr = readb(uap->port.membase + UART010_CR); @@ -85,7 +86,8 @@ static void pl010_stop_tx(struct uart_port *port) static void pl010_start_tx(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int cr; cr = readb(uap->port.membase + UART010_CR); @@ -95,7 +97,8 @@ static void pl010_start_tx(struct uart_port *port) static void pl010_stop_rx(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int cr; cr = readb(uap->port.membase + UART010_CR); @@ -103,12 +106,23 @@ static void pl010_stop_rx(struct uart_port *port) writel(cr, uap->port.membase + UART010_CR); } -static void pl010_enable_ms(struct uart_port *port) +static void pl010_disable_ms(struct uart_port *port) { struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int cr; cr = readb(uap->port.membase + UART010_CR); + cr &= ~UART010_CR_MSIE; + writel(cr, uap->port.membase + UART010_CR); +} + +static void pl010_enable_ms(struct uart_port *port) +{ + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); + unsigned int cr; + + cr = readb(uap->port.membase + UART010_CR); cr |= UART010_CR_MSIE; writel(cr, uap->port.membase + UART010_CR); } @@ -259,14 +273,16 @@ static irqreturn_t pl010_int(int irq, void *dev_id) static unsigned int pl010_tx_empty(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int status = readb(uap->port.membase + UART01x_FR); return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; } static unsigned int pl010_get_mctrl(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int result = 0; unsigned int status; @@ -283,7 +299,8 @@ static unsigned int pl010_get_mctrl(struct uart_port *port) static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); if (uap->data) uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl); @@ -291,7 +308,8 @@ static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl) static void pl010_break_ctl(struct uart_port *port, int break_state) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned long flags; unsigned int lcr_h; @@ -307,7 +325,8 @@ static void pl010_break_ctl(struct uart_port *port, int break_state) static int pl010_startup(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); int retval; /* @@ -347,7 +366,8 @@ static int pl010_startup(struct uart_port *port) static void pl010_shutdown(struct uart_port *port) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); /* * Free the interrupt @@ -374,7 +394,8 @@ static void pl010_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int lcr_h, old_cr; unsigned long flags; unsigned int baud, quot; @@ -468,13 +489,21 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios, spin_unlock_irqrestore(&uap->port.lock, flags); } -static void pl010_set_ldisc(struct uart_port *port, int new) +static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios) { - if (new == N_PPS) { + if (termios->c_line == N_PPS) { port->flags |= UPF_HARDPPS_CD; + spin_lock_irq(&port->lock); pl010_enable_ms(port); - } else + spin_unlock_irq(&port->lock); + } else { port->flags &= ~UPF_HARDPPS_CD; + if (!UART_ENABLE_MS(port, termios->c_cflag)) { + spin_lock_irq(&port->lock); + pl010_disable_ms(port); + spin_unlock_irq(&port->lock); + } + } } static const char *pl010_type(struct uart_port *port) @@ -551,7 +580,8 @@ static struct uart_amba_port *amba_ports[UART_NR]; static void pl010_console_putchar(struct uart_port *port, int ch) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; + struct uart_amba_port *uap = + container_of(port, struct uart_amba_port, port); unsigned int status; do { diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index 02016fcd91b8..8d94c194f090 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -246,6 +246,7 @@ static int pl011_sgbuf_init(struct dma_chan *chan, struct pl011_sgbuf *sg, sg_set_page(&sg->sg, phys_to_page(dma_addr), PL011_DMA_BUFFER_SIZE, offset_in_page(dma_addr)); sg_dma_address(&sg->sg) = dma_addr; + sg_dma_len(&sg->sg) = PL011_DMA_BUFFER_SIZE; return 0; } @@ -321,10 +322,26 @@ static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port * .src_maxburst = uap->fifosize >> 2, .device_fc = false, }; + struct dma_slave_caps caps; + /* + * Some DMA controllers provide information on their capabilities. + * If the controller does, check for suitable residue processing + * otherwise assime all is well. + */ + if (0 == dma_get_slave_caps(chan, &caps)) { + if (caps.residue_granularity == + DMA_RESIDUE_GRANULARITY_DESCRIPTOR) { + dma_release_channel(chan); + dev_info(uap->port.dev, + "RX DMA disabled - no residue processing\n"); + return; + } + } dmaengine_slave_config(chan, &rx_conf); uap->dmarx.chan = chan; + uap->dmarx.auto_poll_rate = false; if (plat && plat->dma_rx_poll_enable) { /* Set poll rate if specified. */ if (plat->dma_rx_poll_rate) { @@ -345,9 +362,24 @@ static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port * plat->dma_rx_poll_timeout; else uap->dmarx.poll_timeout = 3000; - } else - uap->dmarx.auto_poll_rate = false; - + } else if (!plat && dev->of_node) { + uap->dmarx.auto_poll_rate = of_property_read_bool( + dev->of_node, "auto-poll"); + if (uap->dmarx.auto_poll_rate) { + u32 x; + + if (0 == of_property_read_u32(dev->of_node, + "poll-rate-ms", &x)) + uap->dmarx.poll_rate = x; + else + uap->dmarx.poll_rate = 100; + if (0 == of_property_read_u32(dev->of_node, + "poll-timeout-ms", &x)) + uap->dmarx.poll_timeout = x; + else + uap->dmarx.poll_timeout = 3000; + } + } dev_info(uap->port.dev, "DMA channel RX %s\n", dma_chan_name(uap->dmarx.chan)); } @@ -501,7 +533,11 @@ static int pl011_dma_tx_refill(struct uart_amba_port *uap) memcpy(&dmatx->buf[0], &xmit->buf[xmit->tail], count); else { size_t first = UART_XMIT_SIZE - xmit->tail; - size_t second = xmit->head; + size_t second; + + if (first > count) + first = count; + second = count - first; memcpy(&dmatx->buf[0], &xmit->buf[xmit->tail], first); if (second) @@ -988,7 +1024,7 @@ static void pl011_dma_startup(struct uart_amba_port *uap) if (!uap->dmatx.chan) return; - uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL); + uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); if (!uap->dmatx.buf) { dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); uap->port.fifosize = uap->fifosize; @@ -1689,6 +1725,8 @@ static void pl011_shutdown(struct uart_port *port) plat->exit(); } + if (uap->port.ops->flush_buffer) + uap->port.ops->flush_buffer(port); } static void diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c index 0be1c45efd65..2739361a86f1 100644 --- a/drivers/tty/serial/ar933x_uart.c +++ b/drivers/tty/serial/ar933x_uart.c @@ -119,7 +119,8 @@ static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) static unsigned int ar933x_uart_tx_empty(struct uart_port *port) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); unsigned long flags; unsigned int rdata; @@ -141,21 +142,24 @@ static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) static void ar933x_uart_start_tx(struct uart_port *port) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); ar933x_uart_start_tx_interrupt(up); } static void ar933x_uart_stop_tx(struct uart_port *port) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); ar933x_uart_stop_tx_interrupt(up); } static void ar933x_uart_stop_rx(struct uart_port *port) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); up->ier &= ~AR933X_UART_INT_RX_VALID; ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); @@ -163,7 +167,8 @@ static void ar933x_uart_stop_rx(struct uart_port *port) static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); unsigned long flags; spin_lock_irqsave(&up->port.lock, flags); @@ -231,7 +236,8 @@ static void ar933x_uart_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); unsigned int cs; unsigned long flags; unsigned int baud, scale, step; @@ -404,7 +410,8 @@ static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) static int ar933x_uart_startup(struct uart_port *port) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); unsigned long flags; int ret; @@ -430,7 +437,8 @@ static int ar933x_uart_startup(struct uart_port *port) static void ar933x_uart_shutdown(struct uart_port *port) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); /* Disable all interrupts */ up->ier = 0; @@ -468,7 +476,8 @@ static void ar933x_uart_config_port(struct uart_port *port, int flags) static int ar933x_uart_verify_port(struct uart_port *port, struct serial_struct *ser) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); if (ser->type != PORT_UNKNOWN && ser->type != PORT_AR933X) @@ -521,7 +530,8 @@ static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) static void ar933x_uart_console_putchar(struct uart_port *port, int ch) { - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; + struct ar933x_uart_port *up = + container_of(port, struct ar933x_uart_port, port); ar933x_uart_wait_xmitr(up); ar933x_uart_putc(up, ch); diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index edde3eca055d..2cb04137ae78 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -167,7 +167,6 @@ struct atmel_uart_port { struct circ_buf rx_ring; - struct serial_rs485 rs485; /* rs485 settings */ struct mctrl_gpios *gpios; int gpio_irq[UART_GPIO_MAX]; unsigned int tx_done_mask; @@ -290,13 +289,11 @@ static unsigned int atmel_get_lines_status(struct uart_port *port) } /* Enable or disable the rs485 support */ -void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) +static int atmel_config_rs485(struct uart_port *port, + struct serial_rs485 *rs485conf) { struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); unsigned int mode; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); /* Disable interrupts */ UART_PUT_IDR(port, atmel_port->tx_done_mask); @@ -306,7 +303,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) /* Resetting serial mode to RS232 (0x0) */ mode &= ~ATMEL_US_USMODE; - atmel_port->rs485 = *rs485conf; + port->rs485 = *rs485conf; if (rs485conf->flags & SER_RS485_ENABLED) { dev_dbg(port->dev, "Setting UART to RS485\n"); @@ -327,8 +324,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) /* Enable interrupts */ UART_PUT_IER(port, atmel_port->tx_done_mask); - spin_unlock_irqrestore(&port->lock, flags); - + return 0; } /* @@ -372,11 +368,10 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) /* Resetting serial mode to RS232 (0x0) */ mode &= ~ATMEL_US_USMODE; - if (atmel_port->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) { dev_dbg(port->dev, "Setting UART to RS485\n"); - if ((atmel_port->rs485.delay_rts_after_send) > 0) - UART_PUT_TTGR(port, - atmel_port->rs485.delay_rts_after_send); + if ((port->rs485.delay_rts_after_send) > 0) + UART_PUT_TTGR(port, port->rs485.delay_rts_after_send); mode |= ATMEL_US_USMODE_RS485; } else { dev_dbg(port->dev, "Setting UART to RS232\n"); @@ -423,8 +418,8 @@ static void atmel_stop_tx(struct uart_port *port) /* Disable interrupts */ UART_PUT_IDR(port, atmel_port->tx_done_mask); - if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && - !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) + if ((port->rs485.flags & SER_RS485_ENABLED) && + !(port->rs485.flags & SER_RS485_RX_DURING_TX)) atmel_start_rx(port); } @@ -441,8 +436,8 @@ static void atmel_start_tx(struct uart_port *port) really need this.*/ return; - if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && - !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) + if ((port->rs485.flags & SER_RS485_ENABLED) && + !(port->rs485.flags & SER_RS485_RX_DURING_TX)) atmel_stop_rx(port); /* re-enable PDC transmit */ @@ -807,7 +802,7 @@ static void atmel_tx_dma(struct uart_port *port) atmel_port->cookie_tx = dmaengine_submit(desc); } else { - if (atmel_port->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) { /* DMA done, stop TX, start RX for RS485 */ atmel_start_rx(port); } @@ -862,9 +857,8 @@ static int atmel_prepare_tx_dma(struct uart_port *port) config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; config.dst_addr = port->mapbase + ATMEL_US_THR; - ret = dmaengine_device_control(atmel_port->chan_tx, - DMA_SLAVE_CONFIG, - (unsigned long)&config); + ret = dmaengine_slave_config(atmel_port->chan_tx, + &config); if (ret) { dev_err(port->dev, "DMA tx slave configuration failed\n"); goto chan_err; @@ -880,32 +874,6 @@ chan_err: return -EINVAL; } -static void atmel_flip_buffer_rx_dma(struct uart_port *port, - char *buf, size_t count) -{ - struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); - struct tty_port *tport = &port->state->port; - - dma_sync_sg_for_cpu(port->dev, - &atmel_port->sg_rx, - 1, - DMA_DEV_TO_MEM); - - tty_insert_flip_string(tport, buf, count); - - dma_sync_sg_for_device(port->dev, - &atmel_port->sg_rx, - 1, - DMA_DEV_TO_MEM); - /* - * Drop the lock here since it might end up calling - * uart_start(), which takes the lock. - */ - spin_unlock(&port->lock); - tty_flip_buffer_push(tport); - spin_lock(&port->lock); -} - static void atmel_complete_rx_dma(void *arg) { struct uart_port *port = arg; @@ -934,11 +902,12 @@ static void atmel_release_rx_dma(struct uart_port *port) static void atmel_rx_from_dma(struct uart_port *port) { struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + struct tty_port *tport = &port->state->port; struct circ_buf *ring = &atmel_port->rx_ring; struct dma_chan *chan = atmel_port->chan_rx; struct dma_tx_state state; enum dma_status dmastat; - size_t pending, count; + size_t count; /* Reset the UART timeout early so that we don't miss one */ @@ -953,27 +922,68 @@ static void atmel_rx_from_dma(struct uart_port *port) tasklet_schedule(&atmel_port->tasklet); return; } - /* current transfer size should no larger than dma buffer */ - pending = sg_dma_len(&atmel_port->sg_rx) - state.residue; - BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx)); + + /* CPU claims ownership of RX DMA buffer */ + dma_sync_sg_for_cpu(port->dev, + &atmel_port->sg_rx, + 1, + DMA_DEV_TO_MEM); /* - * This will take the chars we have so far, - * ring->head will record the transfer size, only new bytes come - * will insert into the framework. + * ring->head points to the end of data already written by the DMA. + * ring->tail points to the beginning of data to be read by the + * framework. + * The current transfer size should not be larger than the dma buffer + * length. */ - if (pending > ring->head) { - count = pending - ring->head; + ring->head = sg_dma_len(&atmel_port->sg_rx) - state.residue; + BUG_ON(ring->head > sg_dma_len(&atmel_port->sg_rx)); + /* + * At this point ring->head may point to the first byte right after the + * last byte of the dma buffer: + * 0 <= ring->head <= sg_dma_len(&atmel_port->sg_rx) + * + * However ring->tail must always points inside the dma buffer: + * 0 <= ring->tail <= sg_dma_len(&atmel_port->sg_rx) - 1 + * + * Since we use a ring buffer, we have to handle the case + * where head is lower than tail. In such a case, we first read from + * tail to the end of the buffer then reset tail. + */ + if (ring->head < ring->tail) { + count = sg_dma_len(&atmel_port->sg_rx) - ring->tail; + + tty_insert_flip_string(tport, ring->buf + ring->tail, count); + ring->tail = 0; + port->icount.rx += count; + } - atmel_flip_buffer_rx_dma(port, ring->buf + ring->head, count); + /* Finally we read data from tail to head */ + if (ring->tail < ring->head) { + count = ring->head - ring->tail; - ring->head += count; - if (ring->head == sg_dma_len(&atmel_port->sg_rx)) + tty_insert_flip_string(tport, ring->buf + ring->tail, count); + /* Wrap ring->head if needed */ + if (ring->head >= sg_dma_len(&atmel_port->sg_rx)) ring->head = 0; - + ring->tail = ring->head; port->icount.rx += count; } + /* USART retreives ownership of RX DMA buffer */ + dma_sync_sg_for_device(port->dev, + &atmel_port->sg_rx, + 1, + DMA_DEV_TO_MEM); + + /* + * Drop the lock here since it might end up calling + * uart_start(), which takes the lock. + */ + spin_unlock(&port->lock); + tty_flip_buffer_push(tport); + spin_lock(&port->lock); + UART_PUT_IER(port, ATMEL_US_TIMEOUT); } @@ -1026,9 +1036,8 @@ static int atmel_prepare_rx_dma(struct uart_port *port) config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; config.src_addr = port->mapbase + ATMEL_US_RHR; - ret = dmaengine_device_control(atmel_port->chan_rx, - DMA_SLAVE_CONFIG, - (unsigned long)&config); + ret = dmaengine_slave_config(atmel_port->chan_rx, + &config); if (ret) { dev_err(port->dev, "DMA rx slave configuration failed\n"); goto chan_err; @@ -1240,8 +1249,8 @@ static void atmel_tx_pdc(struct uart_port *port) /* Enable interrupts */ UART_PUT_IER(port, atmel_port->tx_done_mask); } else { - if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && - !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) { + if ((port->rs485.flags & SER_RS485_ENABLED) && + !(port->rs485.flags & SER_RS485_RX_DURING_TX)) { /* DMA done, stop TX, start RX for RS485 */ atmel_start_rx(port); } @@ -1552,7 +1561,7 @@ static int atmel_init_property(struct atmel_uart_port *atmel_port, return 0; } -static void atmel_init_rs485(struct atmel_uart_port *atmel_port, +static void atmel_init_rs485(struct uart_port *port, struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -1563,7 +1572,7 @@ static void atmel_init_rs485(struct atmel_uart_port *atmel_port, /* rs485 properties */ if (of_property_read_u32_array(np, "rs485-rts-delay", rs485_delay, 2) == 0) { - struct serial_rs485 *rs485conf = &atmel_port->rs485; + struct serial_rs485 *rs485conf = &port->rs485; rs485conf->delay_rts_before_send = rs485_delay[0]; rs485conf->delay_rts_after_send = rs485_delay[1]; @@ -1577,7 +1586,7 @@ static void atmel_init_rs485(struct atmel_uart_port *atmel_port, rs485conf->flags |= SER_RS485_ENABLED; } } else { - atmel_port->rs485 = pdata->rs485; + port->rs485 = pdata->rs485; } } @@ -1802,6 +1811,20 @@ free_irq: } /* + * Flush any TX data submitted for DMA. Called when the TX circular + * buffer is reset. + */ +static void atmel_flush_buffer(struct uart_port *port) +{ + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + + if (atmel_use_pdc_tx(port)) { + UART_PUT_TCR(port, 0); + atmel_port->pdc_tx.ofs = 0; + } +} + +/* * Disable the port */ static void atmel_shutdown(struct uart_port *port) @@ -1852,20 +1875,8 @@ static void atmel_shutdown(struct uart_port *port) atmel_free_gpio_irq(port); atmel_port->ms_irq_enabled = false; -} -/* - * Flush any TX data submitted for DMA. Called when the TX circular - * buffer is reset. - */ -static void atmel_flush_buffer(struct uart_port *port) -{ - struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); - - if (atmel_use_pdc_tx(port)) { - UART_PUT_TCR(port, 0); - atmel_port->pdc_tx.ofs = 0; - } + atmel_flush_buffer(port); } /* @@ -1911,7 +1922,6 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, { unsigned long flags; unsigned int mode, imr, quot, baud; - struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); /* Get current mode register */ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL @@ -2013,10 +2023,9 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, /* Resetting serial mode to RS232 (0x0) */ mode &= ~ATMEL_US_USMODE; - if (atmel_port->rs485.flags & SER_RS485_ENABLED) { - if ((atmel_port->rs485.delay_rts_after_send) > 0) - UART_PUT_TTGR(port, - atmel_port->rs485.delay_rts_after_send); + if (port->rs485.flags & SER_RS485_ENABLED) { + if ((port->rs485.delay_rts_after_send) > 0) + UART_PUT_TTGR(port, port->rs485.delay_rts_after_send); mode |= ATMEL_US_USMODE_RS485; } @@ -2040,13 +2049,20 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, spin_unlock_irqrestore(&port->lock, flags); } -static void atmel_set_ldisc(struct uart_port *port, int new) +static void atmel_set_ldisc(struct uart_port *port, struct ktermios *termios) { - if (new == N_PPS) { + if (termios->c_line == N_PPS) { port->flags |= UPF_HARDPPS_CD; + spin_lock_irq(&port->lock); atmel_enable_ms(port); + spin_unlock_irq(&port->lock); } else { port->flags &= ~UPF_HARDPPS_CD; + if (!UART_ENABLE_MS(port, termios->c_cflag)) { + spin_lock_irq(&port->lock); + atmel_disable_ms(port); + spin_unlock_irq(&port->lock); + } } } @@ -2148,35 +2164,6 @@ static void atmel_poll_put_char(struct uart_port *port, unsigned char ch) } #endif -static int -atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) -{ - struct serial_rs485 rs485conf; - - switch (cmd) { - case TIOCSRS485: - if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, - sizeof(rs485conf))) - return -EFAULT; - - atmel_config_rs485(port, &rs485conf); - break; - - case TIOCGRS485: - if (copy_to_user((struct serial_rs485 *) arg, - &(to_atmel_uart_port(port)->rs485), - sizeof(rs485conf))) - return -EFAULT; - break; - - default: - return -ENOIOCTLCMD; - } - return 0; -} - - - static struct uart_ops atmel_pops = { .tx_empty = atmel_tx_empty, .set_mctrl = atmel_set_mctrl, @@ -2197,7 +2184,6 @@ static struct uart_ops atmel_pops = { .config_port = atmel_config_port, .verify_port = atmel_verify_port, .pm = atmel_serial_pm, - .ioctl = atmel_ioctl, #ifdef CONFIG_CONSOLE_POLL .poll_get_char = atmel_poll_get_char, .poll_put_char = atmel_poll_put_char, @@ -2217,7 +2203,7 @@ static int atmel_init_port(struct atmel_uart_port *atmel_port, if (!atmel_init_property(atmel_port, pdev)) atmel_set_ops(port); - atmel_init_rs485(atmel_port, pdev); + atmel_init_rs485(port, pdev); port->iotype = UPIO_MEM; port->flags = UPF_BOOT_AUTOCONF; @@ -2226,6 +2212,7 @@ static int atmel_init_port(struct atmel_uart_port *atmel_port, port->dev = &pdev->dev; port->mapbase = pdev->resource[0].start; port->irq = pdev->resource[1].start; + port->rs485_config = atmel_config_rs485; tasklet_init(&atmel_port->tasklet, atmel_tasklet_func, (unsigned long)port); @@ -2260,7 +2247,7 @@ static int atmel_init_port(struct atmel_uart_port *atmel_port, } /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */ - if (atmel_port->rs485.flags & SER_RS485_ENABLED) + if (port->rs485.flags & SER_RS485_ENABLED) atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; else if (atmel_use_pdc_tx(port)) { port->fifosize = PDC_BUFFER_SIZE; @@ -2541,6 +2528,7 @@ static int atmel_serial_probe(struct platform_device *pdev) struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev); void *data; int ret = -ENODEV; + bool rs485_enabled; BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); @@ -2588,6 +2576,8 @@ static int atmel_serial_probe(struct platform_device *pdev) port->rx_ring.buf = data; } + rs485_enabled = port->uart.rs485.flags & SER_RS485_ENABLED; + ret = uart_add_one_port(&atmel_uart, &port->uart); if (ret) goto err_add_port; @@ -2606,7 +2596,7 @@ static int atmel_serial_probe(struct platform_device *pdev) device_init_wakeup(&pdev->dev, 1); platform_set_drvdata(pdev, port); - if (port->rs485.flags & SER_RS485_ENABLED) { + if (rs485_enabled) { UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL); UART_PUT_CR(&port->uart, ATMEL_US_RTSEN); } diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c index 231519022b73..e04e5805ae6e 100644 --- a/drivers/tty/serial/bcm63xx_uart.c +++ b/drivers/tty/serial/bcm63xx_uart.c @@ -588,20 +588,7 @@ static void bcm_uart_set_termios(struct uart_port *port, */ static int bcm_uart_request_port(struct uart_port *port) { - unsigned int size; - - size = UART_REG_SIZE; - if (!request_mem_region(port->mapbase, size, "bcm63xx")) { - dev_err(port->dev, "Memory region busy\n"); - return -EBUSY; - } - - port->membase = ioremap(port->mapbase, size); - if (!port->membase) { - dev_err(port->dev, "Unable to map registers\n"); - release_mem_region(port->mapbase, size); - return -EBUSY; - } + /* UARTs always present */ return 0; } @@ -610,8 +597,7 @@ static int bcm_uart_request_port(struct uart_port *port) */ static void bcm_uart_release_port(struct uart_port *port) { - release_mem_region(port->mapbase, UART_REG_SIZE); - iounmap(port->membase); + /* Nothing to release ... */ } /* @@ -782,6 +768,26 @@ static int __init bcm63xx_console_init(void) console_initcall(bcm63xx_console_init); +static void bcm_early_write(struct console *con, const char *s, unsigned n) +{ + struct earlycon_device *dev = con->data; + + uart_console_write(&dev->port, s, n, bcm_console_putchar); + wait_for_xmitr(&dev->port); +} + +static int __init bcm_early_console_setup(struct earlycon_device *device, + const char *opt) +{ + if (!device->port.membase) + return -ENODEV; + + device->con->write = bcm_early_write; + return 0; +} + +OF_EARLYCON_DECLARE(bcm63xx_uart, "brcm,bcm6345-uart", bcm_early_console_setup); + #define BCM63XX_CONSOLE (&bcm63xx_console) #else #define BCM63XX_CONSOLE NULL @@ -813,25 +819,30 @@ static int bcm_uart_probe(struct platform_device *pdev) if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS) return -EINVAL; - if (ports[pdev->id].membase) + port = &ports[pdev->id]; + if (port->membase) return -EBUSY; + memset(port, 0, sizeof(*port)); res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res_mem) return -ENODEV; + port->mapbase = res_mem->start; + port->membase = devm_ioremap_resource(&pdev->dev, res_mem); + if (IS_ERR(port->membase)) + return PTR_ERR(port->membase); + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!res_irq) return -ENODEV; - clk = clk_get(&pdev->dev, "periph"); + clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : + clk_get(&pdev->dev, "periph"); if (IS_ERR(clk)) return -ENODEV; - port = &ports[pdev->id]; - memset(port, 0, sizeof(*port)); port->iotype = UPIO_MEM; - port->mapbase = res_mem->start; port->irq = res_irq->start; port->ops = &bcm_uart_ops; port->flags = UPF_BOOT_AUTOCONF; @@ -905,5 +916,5 @@ module_init(bcm_uart_init); module_exit(bcm_uart_exit); MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>"); -MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver"); +MODULE_DESCRIPTION("Broadcom 63xx integrated uart driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/tty/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c index d62d8daac8ab..984e1c050096 100644 --- a/drivers/tty/serial/bfin_sport_uart.c +++ b/drivers/tty/serial/bfin_sport_uart.c @@ -517,14 +517,15 @@ static void sport_set_termios(struct uart_port *port, up->csize = 5; break; default: - pr_warning("requested word length not supported\n"); + pr_warn("requested word length not supported\n"); + break; } if (termios->c_cflag & CSTOPB) { up->stopb = 1; } if (termios->c_cflag & PARENB) { - pr_warning("PAREN bits is not supported yet\n"); + pr_warn("PAREN bit is not supported yet\n"); /* up->parib = 1; */ } diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c index 7da9911e95f0..44b27ec32341 100644 --- a/drivers/tty/serial/bfin_uart.c +++ b/drivers/tty/serial/bfin_uart.c @@ -944,12 +944,13 @@ bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser) * Enable the IrDA function if tty->ldisc.num is N_IRDA. * In other cases, disable IrDA function. */ -static void bfin_serial_set_ldisc(struct uart_port *port, int ld) +static void bfin_serial_set_ldisc(struct uart_port *port, + struct ktermios *termios) { struct bfin_serial_port *uart = (struct bfin_serial_port *)port; unsigned int val; - switch (ld) { + switch (termios->c_line) { case N_IRDA: val = UART_GET_GCTL(uart); val |= (UMOD_IRDA | RPOLC); diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c index acfe31773643..f963c4c48085 100644 --- a/drivers/tty/serial/clps711x.c +++ b/drivers/tty/serial/clps711x.c @@ -225,13 +225,14 @@ static void uart_clps711x_break_ctl(struct uart_port *port, int break_state) writel(ubrlcr, port->membase + UBRLCR_OFFSET); } -static void uart_clps711x_set_ldisc(struct uart_port *port, int ld) +static void uart_clps711x_set_ldisc(struct uart_port *port, + struct ktermios *termios) { if (!port->line) { struct clps711x_port *s = dev_get_drvdata(port->dev); regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON1_SIREN, - (ld == N_IRDA) ? SYSCON1_SIREN : 0); + (termios->c_line == N_IRDA) ? SYSCON1_SIREN : 0); } } diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c index 533852eb8778..638afd35c547 100644 --- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c @@ -80,7 +80,8 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo); */ static unsigned int cpm_uart_tx_empty(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); cbd_t __iomem *bdp = pinfo->tx_bd_base; int ret = 0; @@ -102,7 +103,8 @@ static unsigned int cpm_uart_tx_empty(struct uart_port *port) static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); if (pinfo->gpios[GPIO_RTS] >= 0) gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS)); @@ -113,7 +115,8 @@ static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) static unsigned int cpm_uart_get_mctrl(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; if (pinfo->gpios[GPIO_CTS] >= 0) { @@ -144,7 +147,8 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port) */ static void cpm_uart_stop_tx(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); smc_t __iomem *smcp = pinfo->smcp; scc_t __iomem *sccp = pinfo->sccp; @@ -161,7 +165,8 @@ static void cpm_uart_stop_tx(struct uart_port *port) */ static void cpm_uart_start_tx(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); smc_t __iomem *smcp = pinfo->smcp; scc_t __iomem *sccp = pinfo->sccp; @@ -189,7 +194,8 @@ static void cpm_uart_start_tx(struct uart_port *port) */ static void cpm_uart_stop_rx(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); smc_t __iomem *smcp = pinfo->smcp; scc_t __iomem *sccp = pinfo->sccp; @@ -206,7 +212,8 @@ static void cpm_uart_stop_rx(struct uart_port *port) */ static void cpm_uart_break_ctl(struct uart_port *port, int break_state) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line, break_state); @@ -240,7 +247,8 @@ static void cpm_uart_int_rx(struct uart_port *port) unsigned char ch; u8 *cp; struct tty_port *tport = &port->state->port; - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); cbd_t __iomem *bdp; u16 status; unsigned int flg; @@ -397,7 +405,8 @@ static irqreturn_t cpm_uart_int(int irq, void *data) static int cpm_uart_startup(struct uart_port *port) { int retval; - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); pr_debug("CPM uart[%d]:startup\n", port->line); @@ -442,7 +451,8 @@ inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo) */ static void cpm_uart_shutdown(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); pr_debug("CPM uart[%d]:shutdown\n", port->line); @@ -492,7 +502,8 @@ static void cpm_uart_set_termios(struct uart_port *port, unsigned long flags; u16 cval, scval, prev_mode; int bits, sbits; - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); smc_t __iomem *smcp = pinfo->smcp; scc_t __iomem *sccp = pinfo->sccp; int maxidl; @@ -675,7 +686,8 @@ static int cpm_uart_tx_pump(struct uart_port *port) cbd_t __iomem *bdp; u8 *p; int count; - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); struct circ_buf *xmit = &port->state->xmit; /* Handle xon/xoff */ @@ -906,7 +918,8 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) */ static int cpm_uart_request_port(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); int ret; pr_debug("CPM uart[%d]:request port\n", port->line); @@ -938,7 +951,8 @@ static int cpm_uart_request_port(struct uart_port *port) static void cpm_uart_release_port(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); if (!(pinfo->flags & FLAG_CONSOLE)) cpm_uart_freebuf(pinfo); @@ -1082,7 +1096,8 @@ static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo) static int cpm_get_poll_char(struct uart_port *port) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); if (!serial_polled) { serial_polled = 1; @@ -1099,7 +1114,8 @@ static int cpm_get_poll_char(struct uart_port *port) static void cpm_put_poll_char(struct uart_port *port, unsigned char c) { - struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; + struct uart_cpm_port *pinfo = + container_of(port, struct uart_cpm_port, port); static char ch[2]; ch[0] = (char)c; diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c index 58e6f61a87e4..0c1825b0b41d 100644 --- a/drivers/tty/serial/crisv10.c +++ b/drivers/tty/serial/crisv10.c @@ -3676,12 +3676,6 @@ rs_close(struct tty_struct *tty, struct file * filp) } info->port.flags |= ASYNC_CLOSING; /* - * Save the termios structure, since this port may have - * separate termios for callout and dialin. - */ - if (info->port.flags & ASYNC_NORMAL_ACTIVE) - info->normal_termios = tty->termios; - /* * Now we wait for the transmit buffer to clear; and we notify * the line discipline to only process XON/XOFF characters. */ @@ -4076,11 +4070,6 @@ rs_open(struct tty_struct *tty, struct file * filp) return retval; } - if ((info->port.count == 1) && (info->port.flags & ASYNC_SPLIT_TERMIOS)) { - tty->termios = info->normal_termios; - change_speed(info); - } - #ifdef SERIAL_DEBUG_OPEN printk("rs_open ttyS%d successful...\n", info->line); #endif @@ -4327,7 +4316,6 @@ static int __init rs_init(void) info->custom_divisor = 0; info->x_char = 0; info->event = 0; - info->normal_termios = driver->init_termios; info->xmit.buf = NULL; info->xmit.tail = info->xmit.head = 0; info->first_recv_buffer = info->last_recv_buffer = NULL; diff --git a/drivers/tty/serial/crisv10.h b/drivers/tty/serial/crisv10.h index 7599014ae03f..15a52ee58251 100644 --- a/drivers/tty/serial/crisv10.h +++ b/drivers/tty/serial/crisv10.h @@ -98,7 +98,6 @@ struct e100_serial { struct work_struct work; struct async_icount icount; /* error-statistics etc.*/ - struct ktermios normal_termios; unsigned long char_time_usec; /* The time for 1 char, in usecs */ unsigned long flush_time_usec; /* How often we should flush */ diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c index a514ee6f5406..64fe25a4285c 100644 --- a/drivers/tty/serial/earlycon.c +++ b/drivers/tty/serial/earlycon.c @@ -98,7 +98,7 @@ static int __init parse_options(struct earlycon_device *device, strlcpy(device->options, options, length); } - if (mmio || mmio32) + if (port->iotype == UPIO_MEM || port->iotype == UPIO_MEM32) pr_info("Early serial console at MMIO%s 0x%llx (options '%s')\n", mmio32 ? "32" : "", (unsigned long long)port->mapbase, diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 6dd53af546a3..4f58077b1413 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -1786,15 +1786,13 @@ static int lpuart_probe(struct platform_device *pdev) } sport->port.line = ret; sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart"); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; - sport->port.mapbase = res->start; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); sport->port.membase = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(sport->port.membase)) return PTR_ERR(sport->port.membase); + sport->port.mapbase = res->start; sport->port.dev = &pdev->dev; sport->port.type = PORT_LPUART; sport->port.iotype = UPIO_MEM; @@ -1862,6 +1860,20 @@ static int lpuart_suspend(struct device *dev) static int lpuart_resume(struct device *dev) { struct lpuart_port *sport = dev_get_drvdata(dev); + unsigned long temp; + + if (sport->lpuart32) { + lpuart32_setup_watermark(sport); + temp = lpuart32_read(sport->port.membase + UARTCTRL); + temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE | + UARTCTRL_TE | UARTCTRL_ILIE); + lpuart32_write(temp, sport->port.membase + UARTCTRL); + } else { + lpuart_setup_watermark(sport); + temp = readb(sport->port.membase + UARTCR2); + temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE); + writeb(temp, sport->port.membase + UARTCR2); + } uart_resume_port(&lpuart_reg, &sport->port); @@ -1884,11 +1896,8 @@ static struct platform_driver lpuart_driver = { static int __init lpuart_serial_init(void) { - int ret; - - pr_info("serial: Freescale lpuart driver\n"); + int ret = uart_register_driver(&lpuart_reg); - ret = uart_register_driver(&lpuart_reg); if (ret) return ret; diff --git a/drivers/tty/serial/icom.c b/drivers/tty/serial/icom.c index d4620fe5da2e..45fc323b95e6 100644 --- a/drivers/tty/serial/icom.c +++ b/drivers/tty/serial/icom.c @@ -1550,8 +1550,10 @@ static int icom_probe(struct pci_dev *dev, icom_adapter->base_addr = pci_ioremap_bar(dev, 0); - if (!icom_adapter->base_addr) + if (!icom_adapter->base_addr) { + retval = -ENOMEM; goto probe_exit1; + } /* save off irq and request irq line */ if ( (retval = request_irq(dev->irq, icom_interrupt, diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 8f62a3cec23e..c53968e5439c 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -302,7 +302,7 @@ static inline int is_imx6q_uart(struct imx_port *sport) /* * Save and restore functions for UCR1, UCR2 and UCR3 registers */ -#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_IMX_CONSOLE) +#if defined(CONFIG_SERIAL_IMX_CONSOLE) static void imx_port_ucrs_save(struct uart_port *port, struct imx_port_ucrs *ucr) { @@ -991,7 +991,6 @@ static int imx_uart_dma_init(struct imx_port *sport) sport->rx_buf = kzalloc(PAGE_SIZE, GFP_KERNEL); if (!sport->rx_buf) { - dev_err(dev, "cannot alloc DMA buffer.\n"); ret = -ENOMEM; goto err; } @@ -1076,11 +1075,11 @@ static int imx_startup(struct uart_port *port) retval = clk_prepare_enable(sport->clk_per); if (retval) - goto error_out1; + return retval; retval = clk_prepare_enable(sport->clk_ipg); if (retval) { clk_disable_unprepare(sport->clk_per); - goto error_out1; + return retval; } imx_setup_ufcr(sport, 0); @@ -1109,37 +1108,6 @@ static int imx_startup(struct uart_port *port) while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) udelay(1); - /* - * Allocate the IRQ(s) i.MX1 has three interrupts whereas later - * chips only have one interrupt. - */ - if (sport->txirq > 0) { - retval = request_irq(sport->rxirq, imx_rxint, 0, - dev_name(port->dev), sport); - if (retval) - goto error_out1; - - retval = request_irq(sport->txirq, imx_txint, 0, - dev_name(port->dev), sport); - if (retval) - goto error_out2; - - /* do not use RTS IRQ on IrDA */ - if (!USE_IRDA(sport)) { - retval = request_irq(sport->rtsirq, imx_rtsint, 0, - dev_name(port->dev), sport); - if (retval) - goto error_out3; - } - } else { - retval = request_irq(sport->port.irq, imx_int, 0, - dev_name(port->dev), sport); - if (retval) { - free_irq(sport->port.irq, sport); - goto error_out1; - } - } - spin_lock_irqsave(&sport->port.lock, flags); /* * Finally, clear and enable interrupts @@ -1201,15 +1169,6 @@ static int imx_startup(struct uart_port *port) } return 0; - -error_out3: - if (sport->txirq) - free_irq(sport->txirq, sport); -error_out2: - if (sport->rxirq) - free_irq(sport->rxirq, sport); -error_out1: - return retval; } static void imx_shutdown(struct uart_port *port) @@ -1255,17 +1214,6 @@ static void imx_shutdown(struct uart_port *port) del_timer_sync(&sport->timer); /* - * Free the interrupts - */ - if (sport->txirq > 0) { - if (!USE_IRDA(sport)) - free_irq(sport->rtsirq, sport); - free_irq(sport->txirq, sport); - free_irq(sport->rxirq, sport); - } else - free_irq(sport->port.irq, sport); - - /* * Disable all interrupts, port and break condition. */ @@ -1507,44 +1455,65 @@ imx_verify_port(struct uart_port *port, struct serial_struct *ser) } #if defined(CONFIG_CONSOLE_POLL) + +static int imx_poll_init(struct uart_port *port) +{ + struct imx_port *sport = (struct imx_port *)port; + unsigned long flags; + unsigned long temp; + int retval; + + retval = clk_prepare_enable(sport->clk_ipg); + if (retval) + return retval; + retval = clk_prepare_enable(sport->clk_per); + if (retval) + clk_disable_unprepare(sport->clk_ipg); + + imx_setup_ufcr(sport, 0); + + spin_lock_irqsave(&sport->port.lock, flags); + + temp = readl(sport->port.membase + UCR1); + if (is_imx1_uart(sport)) + temp |= IMX1_UCR1_UARTCLKEN; + temp |= UCR1_UARTEN | UCR1_RRDYEN; + temp &= ~(UCR1_TXMPTYEN | UCR1_RTSDEN); + writel(temp, sport->port.membase + UCR1); + + temp = readl(sport->port.membase + UCR2); + temp |= UCR2_RXEN; + writel(temp, sport->port.membase + UCR2); + + spin_unlock_irqrestore(&sport->port.lock, flags); + + return 0; +} + static int imx_poll_get_char(struct uart_port *port) { - if (!(readl(port->membase + USR2) & USR2_RDR)) + if (!(readl_relaxed(port->membase + USR2) & USR2_RDR)) return NO_POLL_CHAR; - return readl(port->membase + URXD0) & URXD_RX_DATA; + return readl_relaxed(port->membase + URXD0) & URXD_RX_DATA; } static void imx_poll_put_char(struct uart_port *port, unsigned char c) { - struct imx_port_ucrs old_ucr; unsigned int status; - /* save control registers */ - imx_port_ucrs_save(port, &old_ucr); - - /* disable interrupts */ - writel(UCR1_UARTEN, port->membase + UCR1); - writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), - port->membase + UCR2); - writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), - port->membase + UCR3); - /* drain */ do { - status = readl(port->membase + USR1); + status = readl_relaxed(port->membase + USR1); } while (~status & USR1_TRDY); /* write */ - writel(c, port->membase + URTX0); + writel_relaxed(c, port->membase + URTX0); /* flush */ do { - status = readl(port->membase + USR2); + status = readl_relaxed(port->membase + USR2); } while (~status & USR2_TXDC); - - /* restore control registers */ - imx_port_ucrs_restore(port, &old_ucr); } #endif @@ -1565,6 +1534,7 @@ static struct uart_ops imx_pops = { .config_port = imx_config_port, .verify_port = imx_verify_port, #if defined(CONFIG_CONSOLE_POLL) + .poll_init = imx_poll_init, .poll_get_char = imx_poll_get_char, .poll_put_char = imx_poll_put_char, #endif @@ -1929,6 +1899,36 @@ static int serial_imx_probe(struct platform_device *pdev) sport->port.uartclk = clk_get_rate(sport->clk_per); + /* + * Allocate the IRQ(s) i.MX1 has three interrupts whereas later + * chips only have one interrupt. + */ + if (sport->txirq > 0) { + ret = devm_request_irq(&pdev->dev, sport->rxirq, imx_rxint, 0, + dev_name(&pdev->dev), sport); + if (ret) + return ret; + + ret = devm_request_irq(&pdev->dev, sport->txirq, imx_txint, 0, + dev_name(&pdev->dev), sport); + if (ret) + return ret; + + /* do not use RTS IRQ on IrDA */ + if (!USE_IRDA(sport)) { + ret = devm_request_irq(&pdev->dev, sport->rtsirq, + imx_rtsint, 0, + dev_name(&pdev->dev), sport); + if (ret) + return ret; + } + } else { + ret = devm_request_irq(&pdev->dev, sport->port.irq, imx_int, 0, + dev_name(&pdev->dev), sport); + if (ret) + return ret; + } + imx_ports[sport->port.line] = sport; platform_set_drvdata(pdev, sport); @@ -1959,11 +1959,8 @@ static struct platform_driver serial_imx_driver = { static int __init imx_serial_init(void) { - int ret; - - pr_info("Serial: IMX driver\n"); + int ret = uart_register_driver(&imx_reg); - ret = uart_register_driver(&imx_reg); if (ret) return ret; diff --git a/drivers/tty/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c index 99b7b8697861..991e6dce916e 100644 --- a/drivers/tty/serial/ip22zilog.c +++ b/drivers/tty/serial/ip22zilog.c @@ -544,7 +544,8 @@ static unsigned int ip22zilog_get_mctrl(struct uart_port *port) /* The port lock is held and interrupts are disabled. */ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; + struct uart_ip22zilog_port *up = + container_of(port, struct uart_ip22zilog_port, port); struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char set_bits, clear_bits; @@ -568,7 +569,8 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl) /* The port lock is held and interrupts are disabled. */ static void ip22zilog_stop_tx(struct uart_port *port) { - struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; + struct uart_ip22zilog_port *up = + container_of(port, struct uart_ip22zilog_port, port); up->flags |= IP22ZILOG_FLAG_TX_STOPPED; } @@ -576,7 +578,8 @@ static void ip22zilog_stop_tx(struct uart_port *port) /* The port lock is held and interrupts are disabled. */ static void ip22zilog_start_tx(struct uart_port *port) { - struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; + struct uart_ip22zilog_port *up = + container_of(port, struct uart_ip22zilog_port, port); struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char status; @@ -636,7 +639,8 @@ static void ip22zilog_stop_rx(struct uart_port *port) /* The port lock is held. */ static void ip22zilog_enable_ms(struct uart_port *port) { - struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; + struct uart_ip22zilog_port *up = + container_of(port, struct uart_ip22zilog_port, port); struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char new_reg; @@ -652,7 +656,8 @@ static void ip22zilog_enable_ms(struct uart_port *port) /* The port lock is not held. */ static void ip22zilog_break_ctl(struct uart_port *port, int break_state) { - struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; + struct uart_ip22zilog_port *up = + container_of(port, struct uart_ip22zilog_port, port); struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char set_bits, clear_bits, new_reg; unsigned long flags; @@ -873,7 +878,8 @@ static void ip22zilog_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; + struct uart_ip22zilog_port *up = + container_of(port, struct uart_ip22zilog_port, port); unsigned long flags; int baud, brg; diff --git a/drivers/tty/serial/jsm/Makefile b/drivers/tty/serial/jsm/Makefile index e46b6e0f8b18..705d1ff6fdeb 100644 --- a/drivers/tty/serial/jsm/Makefile +++ b/drivers/tty/serial/jsm/Makefile @@ -4,5 +4,5 @@ obj-$(CONFIG_SERIAL_JSM) += jsm.o -jsm-objs := jsm_driver.o jsm_neo.o jsm_tty.o +jsm-objs := jsm_driver.o jsm_neo.o jsm_tty.o jsm_cls.o diff --git a/drivers/tty/serial/jsm/jsm.h b/drivers/tty/serial/jsm/jsm.h index af7013488aeb..0b79b87df47d 100644 --- a/drivers/tty/serial/jsm/jsm.h +++ b/drivers/tty/serial/jsm/jsm.h @@ -13,11 +13,6 @@ * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR * PURPOSE. See the GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 * Temple Place - Suite 330, Boston, - * MA 02111-1307, USA. - * * Contact Information: * Scott H Kilau <Scott_Kilau@digi.com> * Wendy Xiong <wendyx@us.ibm.com> @@ -68,6 +63,10 @@ do { \ #define MAX_STOPS_SENT 5 /* Board ids */ +#define PCI_DEVICE_ID_CLASSIC_4 0x0028 +#define PCI_DEVICE_ID_CLASSIC_8 0x0029 +#define PCI_DEVICE_ID_CLASSIC_4_422 0x00D0 +#define PCI_DEVICE_ID_CLASSIC_8_422 0x00D1 #define PCI_DEVICE_ID_NEO_4 0x00B0 #define PCI_DEVICE_ID_NEO_1_422 0x00CC #define PCI_DEVICE_ID_NEO_1_422_485 0x00CD @@ -112,21 +111,21 @@ struct jsm_channel; ************************************************************************/ struct board_ops { irq_handler_t intr; - void (*uart_init) (struct jsm_channel *ch); - void (*uart_off) (struct jsm_channel *ch); - void (*param) (struct jsm_channel *ch); - void (*assert_modem_signals) (struct jsm_channel *ch); - void (*flush_uart_write) (struct jsm_channel *ch); - void (*flush_uart_read) (struct jsm_channel *ch); - void (*disable_receiver) (struct jsm_channel *ch); - void (*enable_receiver) (struct jsm_channel *ch); - void (*send_break) (struct jsm_channel *ch); - void (*clear_break) (struct jsm_channel *ch, int); - void (*send_start_character) (struct jsm_channel *ch); - void (*send_stop_character) (struct jsm_channel *ch); - void (*copy_data_from_queue_to_uart) (struct jsm_channel *ch); - u32 (*get_uart_bytes_left) (struct jsm_channel *ch); - void (*send_immediate_char) (struct jsm_channel *ch, unsigned char); + void (*uart_init)(struct jsm_channel *ch); + void (*uart_off)(struct jsm_channel *ch); + void (*param)(struct jsm_channel *ch); + void (*assert_modem_signals)(struct jsm_channel *ch); + void (*flush_uart_write)(struct jsm_channel *ch); + void (*flush_uart_read)(struct jsm_channel *ch); + void (*disable_receiver)(struct jsm_channel *ch); + void (*enable_receiver)(struct jsm_channel *ch); + void (*send_break)(struct jsm_channel *ch); + void (*clear_break)(struct jsm_channel *ch); + void (*send_start_character)(struct jsm_channel *ch); + void (*send_stop_character)(struct jsm_channel *ch); + void (*copy_data_from_queue_to_uart)(struct jsm_channel *ch); + u32 (*get_uart_bytes_left)(struct jsm_channel *ch); + void (*send_immediate_char)(struct jsm_channel *ch, unsigned char); }; @@ -189,7 +188,7 @@ struct jsm_board #define CH_LOOPBACK 0x2000 /* Channel is in lookback mode */ #define CH_BAUD0 0x08000 /* Used for checking B0 transitions */ -/* Our Read/Error/Write queue sizes */ +/* Our Read/Error queue sizes */ #define RQUEUEMASK 0x1FFF /* 8 K - 1 */ #define EQUEUEMASK 0x1FFF /* 8 K - 1 */ #define RQUEUESIZE (RQUEUEMASK + 1) @@ -222,7 +221,10 @@ struct jsm_channel { u8 ch_mostat; /* FEP output modem status */ u8 ch_mistat; /* FEP input modem status */ - struct neo_uart_struct __iomem *ch_neo_uart; /* Pointer to the "mapped" UART struct */ + /* Pointers to the "mapped" UART structs */ + struct neo_uart_struct __iomem *ch_neo_uart; /* NEO card */ + struct cls_uart_struct __iomem *ch_cls_uart; /* Classic card */ + u8 ch_cached_lsr; /* Cached value of the LSR register */ u8 *ch_rqueue; /* Our read queue buffer - malloc'ed */ @@ -254,6 +256,60 @@ struct jsm_channel { u64 ch_xoff_sends; /* Count of xoffs transmitted */ }; +/************************************************************************ + * Per channel/port Classic UART structures * + ************************************************************************ + * Base Structure Entries Usage Meanings to Host * + * * + * W = read write R = read only * + * U = Unused. * + ************************************************************************/ + +struct cls_uart_struct { + u8 txrx; /* WR RHR/THR - Holding Reg */ + u8 ier; /* WR IER - Interrupt Enable Reg */ + u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg*/ + u8 lcr; /* WR LCR - Line Control Reg */ + u8 mcr; /* WR MCR - Modem Control Reg */ + u8 lsr; /* WR LSR - Line Status Reg */ + u8 msr; /* WR MSR - Modem Status Reg */ + u8 spr; /* WR SPR - Scratch Pad Reg */ +}; + +/* Where to read the interrupt register (8bits) */ +#define UART_CLASSIC_POLL_ADDR_OFFSET 0x40 + +#define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF + +#define UART_16654_FCR_TXTRIGGER_8 0x0 +#define UART_16654_FCR_TXTRIGGER_16 0x10 +#define UART_16654_FCR_TXTRIGGER_32 0x20 +#define UART_16654_FCR_TXTRIGGER_56 0x30 + +#define UART_16654_FCR_RXTRIGGER_8 0x0 +#define UART_16654_FCR_RXTRIGGER_16 0x40 +#define UART_16654_FCR_RXTRIGGER_56 0x80 +#define UART_16654_FCR_RXTRIGGER_60 0xC0 + +#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */ +#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */ + +/* + * These are the EXTENDED definitions for the Exar 654's Interrupt + * Enable Register. + */ +#define UART_EXAR654_EFR_ECB 0x10 /* Enhanced control bit */ +#define UART_EXAR654_EFR_IXON 0x2 /* Receiver compares Xon1/Xoff1 */ +#define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */ +#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */ +#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */ + +#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */ +#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */ + +#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */ +#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */ +#define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */ /************************************************************************ * Per channel/port NEO UART structure * @@ -374,6 +430,7 @@ struct neo_uart_struct { */ extern struct uart_driver jsm_uart_driver; extern struct board_ops jsm_neo_ops; +extern struct board_ops jsm_cls_ops; extern int jsm_debug; /************************************************************************* diff --git a/drivers/tty/serial/jsm/jsm_cls.c b/drivers/tty/serial/jsm/jsm_cls.c new file mode 100644 index 000000000000..bfb0681195b6 --- /dev/null +++ b/drivers/tty/serial/jsm/jsm_cls.c @@ -0,0 +1,982 @@ +/* + * Copyright 2003 Digi International (www.digi.com) + * Scott H Kilau <Scott_Kilau at digi dot com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the + * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * + * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE! + * + * This is shared code between Digi's CVS archive and the + * Linux Kernel sources. + * Changing the source just for reformatting needlessly breaks + * our CVS diff history. + * + * Send any bug fixes/changes to: Eng.Linux at digi dot com. + * Thank you. + * + */ + +#include <linux/delay.h> /* For udelay */ +#include <linux/io.h> /* For read[bwl]/write[bwl] */ +#include <linux/serial.h> /* For struct async_serial */ +#include <linux/serial_reg.h> /* For the various UART offsets */ +#include <linux/pci.h> +#include <linux/tty.h> + +#include "jsm.h" /* Driver main header file */ + +static struct { + unsigned int rate; + unsigned int cflag; +} baud_rates[] = { + { 921600, B921600 }, + { 460800, B460800 }, + { 230400, B230400 }, + { 115200, B115200 }, + { 57600, B57600 }, + { 38400, B38400 }, + { 19200, B19200 }, + { 9600, B9600 }, + { 4800, B4800 }, + { 2400, B2400 }, + { 1200, B1200 }, + { 600, B600 }, + { 300, B300 }, + { 200, B200 }, + { 150, B150 }, + { 134, B134 }, + { 110, B110 }, + { 75, B75 }, + { 50, B50 }, +}; + +static void cls_set_cts_flow_control(struct jsm_channel *ch) +{ + u8 lcrb = readb(&ch->ch_cls_uart->lcr); + u8 ier = readb(&ch->ch_cls_uart->ier); + u8 isr_fcr = 0; + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn on CTS flow control, turn off IXON flow control */ + isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_CTSDSR); + isr_fcr &= ~(UART_EXAR654_EFR_IXON); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* + * Enable interrupts for CTS flow, turn off interrupts for + * received XOFF chars + */ + ier |= (UART_EXAR654_IER_CTSDSR); + ier &= ~(UART_EXAR654_IER_XOFF); + writeb(ier, &ch->ch_cls_uart->ier); + + /* Set the usual FIFO values */ + writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); + + writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_56 | + UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), + &ch->ch_cls_uart->isr_fcr); + + ch->ch_t_tlevel = 16; +} + +static void cls_set_ixon_flow_control(struct jsm_channel *ch) +{ + u8 lcrb = readb(&ch->ch_cls_uart->lcr); + u8 ier = readb(&ch->ch_cls_uart->ier); + u8 isr_fcr = 0; + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn on IXON flow control, turn off CTS flow control */ + isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXON); + isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Now set our current start/stop chars while in enhanced mode */ + writeb(ch->ch_startc, &ch->ch_cls_uart->mcr); + writeb(0, &ch->ch_cls_uart->lsr); + writeb(ch->ch_stopc, &ch->ch_cls_uart->msr); + writeb(0, &ch->ch_cls_uart->spr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* + * Disable interrupts for CTS flow, turn on interrupts for + * received XOFF chars + */ + ier &= ~(UART_EXAR654_IER_CTSDSR); + ier |= (UART_EXAR654_IER_XOFF); + writeb(ier, &ch->ch_cls_uart->ier); + + /* Set the usual FIFO values */ + writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); + + writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | + UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), + &ch->ch_cls_uart->isr_fcr); +} + +static void cls_set_no_output_flow_control(struct jsm_channel *ch) +{ + u8 lcrb = readb(&ch->ch_cls_uart->lcr); + u8 ier = readb(&ch->ch_cls_uart->ier); + u8 isr_fcr = 0; + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn off IXON flow control, turn off CTS flow control */ + isr_fcr |= (UART_EXAR654_EFR_ECB); + isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR | UART_EXAR654_EFR_IXON); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* + * Disable interrupts for CTS flow, turn off interrupts for + * received XOFF chars + */ + ier &= ~(UART_EXAR654_IER_CTSDSR); + ier &= ~(UART_EXAR654_IER_XOFF); + writeb(ier, &ch->ch_cls_uart->ier); + + /* Set the usual FIFO values */ + writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); + + writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | + UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), + &ch->ch_cls_uart->isr_fcr); + + ch->ch_r_watermark = 0; + ch->ch_t_tlevel = 16; + ch->ch_r_tlevel = 16; +} + +static void cls_set_rts_flow_control(struct jsm_channel *ch) +{ + u8 lcrb = readb(&ch->ch_cls_uart->lcr); + u8 ier = readb(&ch->ch_cls_uart->ier); + u8 isr_fcr = 0; + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn on RTS flow control, turn off IXOFF flow control */ + isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_RTSDTR); + isr_fcr &= ~(UART_EXAR654_EFR_IXOFF); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* Enable interrupts for RTS flow */ + ier |= (UART_EXAR654_IER_RTSDTR); + writeb(ier, &ch->ch_cls_uart->ier); + + /* Set the usual FIFO values */ + writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); + + writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_56 | + UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), + &ch->ch_cls_uart->isr_fcr); + + ch->ch_r_watermark = 4; + ch->ch_r_tlevel = 8; +} + +static void cls_set_ixoff_flow_control(struct jsm_channel *ch) +{ + u8 lcrb = readb(&ch->ch_cls_uart->lcr); + u8 ier = readb(&ch->ch_cls_uart->ier); + u8 isr_fcr = 0; + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn on IXOFF flow control, turn off RTS flow control */ + isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXOFF); + isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Now set our current start/stop chars while in enhanced mode */ + writeb(ch->ch_startc, &ch->ch_cls_uart->mcr); + writeb(0, &ch->ch_cls_uart->lsr); + writeb(ch->ch_stopc, &ch->ch_cls_uart->msr); + writeb(0, &ch->ch_cls_uart->spr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* Disable interrupts for RTS flow */ + ier &= ~(UART_EXAR654_IER_RTSDTR); + writeb(ier, &ch->ch_cls_uart->ier); + + /* Set the usual FIFO values */ + writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); + + writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | + UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), + &ch->ch_cls_uart->isr_fcr); +} + +static void cls_set_no_input_flow_control(struct jsm_channel *ch) +{ + u8 lcrb = readb(&ch->ch_cls_uart->lcr); + u8 ier = readb(&ch->ch_cls_uart->ier); + u8 isr_fcr = 0; + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn off IXOFF flow control, turn off RTS flow control */ + isr_fcr |= (UART_EXAR654_EFR_ECB); + isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR | UART_EXAR654_EFR_IXOFF); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* Disable interrupts for RTS flow */ + ier &= ~(UART_EXAR654_IER_RTSDTR); + writeb(ier, &ch->ch_cls_uart->ier); + + /* Set the usual FIFO values */ + writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); + + writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | + UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), + &ch->ch_cls_uart->isr_fcr); + + ch->ch_t_tlevel = 16; + ch->ch_r_tlevel = 16; +} + +/* + * cls_clear_break. + * Determines whether its time to shut off break condition. + * + * No locks are assumed to be held when calling this function. + * channel lock is held and released in this function. + */ +static void cls_clear_break(struct jsm_channel *ch) +{ + unsigned long lock_flags; + + spin_lock_irqsave(&ch->ch_lock, lock_flags); + + /* Turn break off, and unset some variables */ + if (ch->ch_flags & CH_BREAK_SENDING) { + u8 temp = readb(&ch->ch_cls_uart->lcr); + + writeb((temp & ~UART_LCR_SBC), &ch->ch_cls_uart->lcr); + + ch->ch_flags &= ~(CH_BREAK_SENDING); + jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, + "clear break Finishing UART_LCR_SBC! finished: %lx\n", + jiffies); + } + spin_unlock_irqrestore(&ch->ch_lock, lock_flags); +} + +static void cls_disable_receiver(struct jsm_channel *ch) +{ + u8 tmp = readb(&ch->ch_cls_uart->ier); + + tmp &= ~(UART_IER_RDI); + writeb(tmp, &ch->ch_cls_uart->ier); +} + +static void cls_enable_receiver(struct jsm_channel *ch) +{ + u8 tmp = readb(&ch->ch_cls_uart->ier); + + tmp |= (UART_IER_RDI); + writeb(tmp, &ch->ch_cls_uart->ier); +} + +/* Make the UART raise any of the output signals we want up */ +static void cls_assert_modem_signals(struct jsm_channel *ch) +{ + if (!ch) + return; + + writeb(ch->ch_mostat, &ch->ch_cls_uart->mcr); +} + +static void cls_copy_data_from_uart_to_queue(struct jsm_channel *ch) +{ + int qleft = 0; + u8 linestatus = 0; + u8 error_mask = 0; + u16 head; + u16 tail; + unsigned long flags; + + if (!ch) + return; + + spin_lock_irqsave(&ch->ch_lock, flags); + + /* cache head and tail of queue */ + head = ch->ch_r_head & RQUEUEMASK; + tail = ch->ch_r_tail & RQUEUEMASK; + + /* Get our cached LSR */ + linestatus = ch->ch_cached_lsr; + ch->ch_cached_lsr = 0; + + /* Store how much space we have left in the queue */ + qleft = tail - head - 1; + if (qleft < 0) + qleft += RQUEUEMASK + 1; + + /* + * Create a mask to determine whether we should + * insert the character (if any) into our queue. + */ + if (ch->ch_c_iflag & IGNBRK) + error_mask |= UART_LSR_BI; + + while (1) { + /* + * Grab the linestatus register, we need to + * check to see if there is any data to read + */ + linestatus = readb(&ch->ch_cls_uart->lsr); + + /* Break out if there is no data to fetch */ + if (!(linestatus & UART_LSR_DR)) + break; + + /* + * Discard character if we are ignoring the error mask + * which in this case is the break signal. + */ + if (linestatus & error_mask) { + u8 discard; + + linestatus = 0; + discard = readb(&ch->ch_cls_uart->txrx); + continue; + } + + /* + * If our queue is full, we have no choice but to drop some + * data. The assumption is that HWFLOW or SWFLOW should have + * stopped things way way before we got to this point. + * + * I decided that I wanted to ditch the oldest data first, + * I hope thats okay with everyone? Yes? Good. + */ + while (qleft < 1) { + tail = (tail + 1) & RQUEUEMASK; + ch->ch_r_tail = tail; + ch->ch_err_overrun++; + qleft++; + } + + ch->ch_equeue[head] = linestatus & (UART_LSR_BI | UART_LSR_PE + | UART_LSR_FE); + ch->ch_rqueue[head] = readb(&ch->ch_cls_uart->txrx); + + qleft--; + + if (ch->ch_equeue[head] & UART_LSR_PE) + ch->ch_err_parity++; + if (ch->ch_equeue[head] & UART_LSR_BI) + ch->ch_err_break++; + if (ch->ch_equeue[head] & UART_LSR_FE) + ch->ch_err_frame++; + + /* Add to, and flip head if needed */ + head = (head + 1) & RQUEUEMASK; + ch->ch_rxcount++; + } + + /* + * Write new final heads to channel structure. + */ + ch->ch_r_head = head & RQUEUEMASK; + ch->ch_e_head = head & EQUEUEMASK; + + spin_unlock_irqrestore(&ch->ch_lock, flags); +} + +static void cls_copy_data_from_queue_to_uart(struct jsm_channel *ch) +{ + u16 tail; + int n; + int qlen; + u32 len_written = 0; + struct circ_buf *circ; + + if (!ch) + return; + + circ = &ch->uart_port.state->xmit; + + /* No data to write to the UART */ + if (uart_circ_empty(circ)) + return; + + /* If port is "stopped", don't send any data to the UART */ + if ((ch->ch_flags & CH_STOP) || (ch->ch_flags & CH_BREAK_SENDING)) + return; + + /* We have to do it this way, because of the EXAR TXFIFO count bug. */ + if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) + return; + + n = 32; + + /* cache tail of queue */ + tail = circ->tail & (UART_XMIT_SIZE - 1); + qlen = uart_circ_chars_pending(circ); + + /* Find minimum of the FIFO space, versus queue length */ + n = min(n, qlen); + + while (n > 0) { + writeb(circ->buf[tail], &ch->ch_cls_uart->txrx); + tail = (tail + 1) & (UART_XMIT_SIZE - 1); + n--; + ch->ch_txcount++; + len_written++; + } + + /* Update the final tail */ + circ->tail = tail & (UART_XMIT_SIZE - 1); + + if (len_written > ch->ch_t_tlevel) + ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); + + if (uart_circ_empty(circ)) + uart_write_wakeup(&ch->uart_port); +} + +static void cls_parse_modem(struct jsm_channel *ch, u8 signals) +{ + u8 msignals = signals; + + jsm_dbg(MSIGS, &ch->ch_bd->pci_dev, + "neo_parse_modem: port: %d msignals: %x\n", + ch->ch_portnum, msignals); + + /* + * Scrub off lower bits. + * They signify delta's, which I don't care about + * Keep DDCD and DDSR though + */ + msignals &= 0xf8; + + if (msignals & UART_MSR_DDCD) + uart_handle_dcd_change(&ch->uart_port, msignals & UART_MSR_DCD); + if (msignals & UART_MSR_DDSR) + uart_handle_dcd_change(&ch->uart_port, msignals & UART_MSR_CTS); + + if (msignals & UART_MSR_DCD) + ch->ch_mistat |= UART_MSR_DCD; + else + ch->ch_mistat &= ~UART_MSR_DCD; + + if (msignals & UART_MSR_DSR) + ch->ch_mistat |= UART_MSR_DSR; + else + ch->ch_mistat &= ~UART_MSR_DSR; + + if (msignals & UART_MSR_RI) + ch->ch_mistat |= UART_MSR_RI; + else + ch->ch_mistat &= ~UART_MSR_RI; + + if (msignals & UART_MSR_CTS) + ch->ch_mistat |= UART_MSR_CTS; + else + ch->ch_mistat &= ~UART_MSR_CTS; + + jsm_dbg(MSIGS, &ch->ch_bd->pci_dev, + "Port: %d DTR: %d RTS: %d CTS: %d DSR: %d " "RI: %d CD: %d\n", + ch->ch_portnum, + !!((ch->ch_mistat | ch->ch_mostat) & UART_MCR_DTR), + !!((ch->ch_mistat | ch->ch_mostat) & UART_MCR_RTS), + !!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_CTS), + !!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_DSR), + !!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_RI), + !!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_DCD)); +} + +/* Parse the ISR register for the specific port */ +static inline void cls_parse_isr(struct jsm_board *brd, uint port) +{ + struct jsm_channel *ch; + u8 isr = 0; + unsigned long flags; + + /* + * No need to verify board pointer, it was already + * verified in the interrupt routine. + */ + + if (port > brd->nasync) + return; + + ch = brd->channels[port]; + if (!ch) + return; + + /* Here we try to figure out what caused the interrupt to happen */ + while (1) { + isr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Bail if no pending interrupt on port */ + if (isr & UART_IIR_NO_INT) + break; + + /* Receive Interrupt pending */ + if (isr & (UART_IIR_RDI | UART_IIR_RDI_TIMEOUT)) { + /* Read data from uart -> queue */ + cls_copy_data_from_uart_to_queue(ch); + jsm_check_queue_flow_control(ch); + } + + /* Transmit Hold register empty pending */ + if (isr & UART_IIR_THRI) { + /* Transfer data (if any) from Write Queue -> UART. */ + spin_lock_irqsave(&ch->ch_lock, flags); + ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); + spin_unlock_irqrestore(&ch->ch_lock, flags); + cls_copy_data_from_queue_to_uart(ch); + } + + /* + * CTS/RTS change of state: + * Don't need to do anything, the cls_parse_modem + * below will grab the updated modem signals. + */ + + /* Parse any modem signal changes */ + cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr)); + } +} + +/* Channel lock MUST be held before calling this function! */ +static void cls_flush_uart_write(struct jsm_channel *ch) +{ + u8 tmp = 0; + u8 i = 0; + + if (!ch) + return; + + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), + &ch->ch_cls_uart->isr_fcr); + + for (i = 0; i < 10; i++) { + /* Check to see if the UART feels it completely flushed FIFO */ + tmp = readb(&ch->ch_cls_uart->isr_fcr); + if (tmp & UART_FCR_CLEAR_XMIT) { + jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, + "Still flushing TX UART... i: %d\n", i); + udelay(10); + } else + break; + } + + ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); +} + +/* Channel lock MUST be held before calling this function! */ +static void cls_flush_uart_read(struct jsm_channel *ch) +{ + if (!ch) + return; + + /* + * For complete POSIX compatibility, we should be purging the + * read FIFO in the UART here. + * + * However, clearing the read FIFO (UART_FCR_CLEAR_RCVR) also + * incorrectly flushes write data as well as just basically trashing the + * FIFO. + * + * Presumably, this is a bug in this UART. + */ + + udelay(10); +} + +static void cls_send_start_character(struct jsm_channel *ch) +{ + if (!ch) + return; + + if (ch->ch_startc != __DISABLED_CHAR) { + ch->ch_xon_sends++; + writeb(ch->ch_startc, &ch->ch_cls_uart->txrx); + } +} + +static void cls_send_stop_character(struct jsm_channel *ch) +{ + if (!ch) + return; + + if (ch->ch_stopc != __DISABLED_CHAR) { + ch->ch_xoff_sends++; + writeb(ch->ch_stopc, &ch->ch_cls_uart->txrx); + } +} + +/* + * cls_param() + * Send any/all changes to the line to the UART. + */ +static void cls_param(struct jsm_channel *ch) +{ + u8 lcr = 0; + u8 uart_lcr = 0; + u8 ier = 0; + u32 baud = 9600; + int quot = 0; + struct jsm_board *bd; + int i; + unsigned int cflag; + + bd = ch->ch_bd; + if (!bd) + return; + + /* + * If baud rate is zero, flush queues, and set mval to drop DTR. + */ + if ((ch->ch_c_cflag & (CBAUD)) == 0) { + ch->ch_r_head = 0; + ch->ch_r_tail = 0; + ch->ch_e_head = 0; + ch->ch_e_tail = 0; + + cls_flush_uart_write(ch); + cls_flush_uart_read(ch); + + /* The baudrate is B0 so all modem lines are to be dropped. */ + ch->ch_flags |= (CH_BAUD0); + ch->ch_mostat &= ~(UART_MCR_RTS | UART_MCR_DTR); + cls_assert_modem_signals(ch); + return; + } + + cflag = C_BAUD(ch->uart_port.state->port.tty); + baud = 9600; + for (i = 0; i < ARRAY_SIZE(baud_rates); i++) { + if (baud_rates[i].cflag == cflag) { + baud = baud_rates[i].rate; + break; + } + } + + if (ch->ch_flags & CH_BAUD0) + ch->ch_flags &= ~(CH_BAUD0); + + if (ch->ch_c_cflag & PARENB) + lcr |= UART_LCR_PARITY; + + if (!(ch->ch_c_cflag & PARODD)) + lcr |= UART_LCR_EPAR; + + /* + * Not all platforms support mark/space parity, + * so this will hide behind an ifdef. + */ +#ifdef CMSPAR + if (ch->ch_c_cflag & CMSPAR) + lcr |= UART_LCR_SPAR; +#endif + + if (ch->ch_c_cflag & CSTOPB) + lcr |= UART_LCR_STOP; + + switch (ch->ch_c_cflag & CSIZE) { + case CS5: + lcr |= UART_LCR_WLEN5; + break; + case CS6: + lcr |= UART_LCR_WLEN6; + break; + case CS7: + lcr |= UART_LCR_WLEN7; + break; + case CS8: + default: + lcr |= UART_LCR_WLEN8; + break; + } + + ier = readb(&ch->ch_cls_uart->ier); + uart_lcr = readb(&ch->ch_cls_uart->lcr); + + quot = ch->ch_bd->bd_dividend / baud; + + if (quot != 0) { + writeb(UART_LCR_DLAB, &ch->ch_cls_uart->lcr); + writeb((quot & 0xff), &ch->ch_cls_uart->txrx); + writeb((quot >> 8), &ch->ch_cls_uart->ier); + writeb(lcr, &ch->ch_cls_uart->lcr); + } + + if (uart_lcr != lcr) + writeb(lcr, &ch->ch_cls_uart->lcr); + + if (ch->ch_c_cflag & CREAD) + ier |= (UART_IER_RDI | UART_IER_RLSI); + + ier |= (UART_IER_THRI | UART_IER_MSI); + + writeb(ier, &ch->ch_cls_uart->ier); + + if (ch->ch_c_cflag & CRTSCTS) + cls_set_cts_flow_control(ch); + else if (ch->ch_c_iflag & IXON) { + /* + * If start/stop is set to disable, + * then we should disable flow control. + */ + if ((ch->ch_startc == __DISABLED_CHAR) || + (ch->ch_stopc == __DISABLED_CHAR)) + cls_set_no_output_flow_control(ch); + else + cls_set_ixon_flow_control(ch); + } else + cls_set_no_output_flow_control(ch); + + if (ch->ch_c_cflag & CRTSCTS) + cls_set_rts_flow_control(ch); + else if (ch->ch_c_iflag & IXOFF) { + /* + * If start/stop is set to disable, + * then we should disable flow control. + */ + if ((ch->ch_startc == __DISABLED_CHAR) || + (ch->ch_stopc == __DISABLED_CHAR)) + cls_set_no_input_flow_control(ch); + else + cls_set_ixoff_flow_control(ch); + } else + cls_set_no_input_flow_control(ch); + + cls_assert_modem_signals(ch); + + /* get current status of the modem signals now */ + cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr)); +} + +/* + * cls_intr() + * + * Classic specific interrupt handler. + */ +static irqreturn_t cls_intr(int irq, void *voidbrd) +{ + struct jsm_board *brd = voidbrd; + unsigned long lock_flags; + unsigned char uart_poll; + uint i = 0; + + /* Lock out the slow poller from running on this board. */ + spin_lock_irqsave(&brd->bd_intr_lock, lock_flags); + + /* + * Check the board's global interrupt offset to see if we + * acctually do have an interrupt pending on us. + */ + uart_poll = readb(brd->re_map_membase + UART_CLASSIC_POLL_ADDR_OFFSET); + + jsm_dbg(INTR, &brd->pci_dev, "%s:%d uart_poll: %x\n", + __FILE__, __LINE__, uart_poll); + + if (!uart_poll) { + jsm_dbg(INTR, &brd->pci_dev, + "Kernel interrupted to me, but no pending interrupts...\n"); + spin_unlock_irqrestore(&brd->bd_intr_lock, lock_flags); + return IRQ_NONE; + } + + /* At this point, we have at least SOMETHING to service, dig further. */ + + /* Parse each port to find out what caused the interrupt */ + for (i = 0; i < brd->nasync; i++) + cls_parse_isr(brd, i); + + spin_unlock_irqrestore(&brd->bd_intr_lock, lock_flags); + + return IRQ_HANDLED; +} + +/* Inits UART */ +static void cls_uart_init(struct jsm_channel *ch) +{ + unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); + unsigned char isr_fcr = 0; + + writeb(0, &ch->ch_cls_uart->ier); + + /* + * The Enhanced Register Set may only be accessed when + * the Line Control Register is set to 0xBFh. + */ + writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); + + isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); + + /* Turn on Enhanced/Extended controls */ + isr_fcr |= (UART_EXAR654_EFR_ECB); + + writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); + + /* Write old LCR value back out, which turns enhanced access off */ + writeb(lcrb, &ch->ch_cls_uart->lcr); + + /* Clear out UART and FIFO */ + readb(&ch->ch_cls_uart->txrx); + + writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT), + &ch->ch_cls_uart->isr_fcr); + udelay(10); + + ch->ch_flags |= (CH_FIFO_ENABLED | CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); + + readb(&ch->ch_cls_uart->lsr); + readb(&ch->ch_cls_uart->msr); +} + +/* + * Turns off UART. + */ +static void cls_uart_off(struct jsm_channel *ch) +{ + /* Stop all interrupts from accurring. */ + writeb(0, &ch->ch_cls_uart->ier); +} + +/* + * cls_get_uarts_bytes_left. + * Returns 0 is nothing left in the FIFO, returns 1 otherwise. + * + * The channel lock MUST be held by the calling function. + */ +static u32 cls_get_uart_bytes_left(struct jsm_channel *ch) +{ + u8 left = 0; + u8 lsr = readb(&ch->ch_cls_uart->lsr); + + /* Determine whether the Transmitter is empty or not */ + if (!(lsr & UART_LSR_TEMT)) + left = 1; + else { + ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); + left = 0; + } + + return left; +} + +/* + * cls_send_break. + * Starts sending a break thru the UART. + * + * The channel lock MUST be held by the calling function. + */ +static void cls_send_break(struct jsm_channel *ch) +{ + /* Tell the UART to start sending the break */ + if (!(ch->ch_flags & CH_BREAK_SENDING)) { + u8 temp = readb(&ch->ch_cls_uart->lcr); + + writeb((temp | UART_LCR_SBC), &ch->ch_cls_uart->lcr); + ch->ch_flags |= (CH_BREAK_SENDING); + } +} + +/* + * cls_send_immediate_char. + * Sends a specific character as soon as possible to the UART, + * jumping over any bytes that might be in the write queue. + * + * The channel lock MUST be held by the calling function. + */ +static void cls_send_immediate_char(struct jsm_channel *ch, unsigned char c) +{ + writeb(c, &ch->ch_cls_uart->txrx); +} + +struct board_ops jsm_cls_ops = { + .intr = cls_intr, + .uart_init = cls_uart_init, + .uart_off = cls_uart_off, + .param = cls_param, + .assert_modem_signals = cls_assert_modem_signals, + .flush_uart_write = cls_flush_uart_write, + .flush_uart_read = cls_flush_uart_read, + .disable_receiver = cls_disable_receiver, + .enable_receiver = cls_enable_receiver, + .send_break = cls_send_break, + .clear_break = cls_clear_break, + .send_start_character = cls_send_start_character, + .send_stop_character = cls_send_stop_character, + .copy_data_from_queue_to_uart = cls_copy_data_from_queue_to_uart, + .get_uart_bytes_left = cls_get_uart_bytes_left, + .send_immediate_char = cls_send_immediate_char +}; + diff --git a/drivers/tty/serial/jsm/jsm_driver.c b/drivers/tty/serial/jsm/jsm_driver.c index d2885a7bb090..efbd87a76656 100644 --- a/drivers/tty/serial/jsm/jsm_driver.c +++ b/drivers/tty/serial/jsm/jsm_driver.c @@ -13,11 +13,6 @@ * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR * PURPOSE. See the GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 * Temple Place - Suite 330, Boston, - * MA 02111-1307, USA. - * * Contact Information: * Scott H Kilau <Scott_Kilau@digi.com> * Wendy Xiong <wendyx@us.ibm.com> @@ -31,8 +26,7 @@ #include "jsm.h" MODULE_AUTHOR("Digi International, http://www.digi.com"); -MODULE_DESCRIPTION("Driver for the Digi International " - "Neo PCI based product line"); +MODULE_DESCRIPTION("Driver for the Digi International Neo and Classic PCI based product line"); MODULE_LICENSE("GPL"); MODULE_SUPPORTED_DEVICE("jsm"); @@ -50,7 +44,7 @@ struct uart_driver jsm_uart_driver = { }; static pci_ers_result_t jsm_io_error_detected(struct pci_dev *pdev, - pci_channel_state_t state); + pci_channel_state_t state); static pci_ers_result_t jsm_io_slot_reset(struct pci_dev *pdev); static void jsm_io_resume(struct pci_dev *pdev); @@ -68,7 +62,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) { int rc = 0; struct jsm_board *brd; - static int adapter_count = 0; + static int adapter_count; rc = pci_enable_device(pdev); if (rc) { @@ -82,10 +76,8 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) goto out_disable_device; } - brd = kzalloc(sizeof(struct jsm_board), GFP_KERNEL); + brd = kzalloc(sizeof(*brd), GFP_KERNEL); if (!brd) { - dev_err(&pdev->dev, - "memory allocation for board structure failed\n"); rc = -ENOMEM; goto out_release_regions; } @@ -95,7 +87,6 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) brd->pci_dev = pdev; switch (pdev->device) { - case PCI_DEVICE_ID_NEO_2DB9: case PCI_DEVICE_ID_NEO_2DB9PRI: case PCI_DEVICE_ID_NEO_2RJ45: @@ -104,6 +95,8 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) brd->maxports = 2; break; + case PCI_DEVICE_ID_CLASSIC_4: + case PCI_DEVICE_ID_CLASSIC_4_422: case PCI_DEVICE_ID_NEO_4: case PCIE_DEVICE_ID_NEO_4: case PCIE_DEVICE_ID_NEO_4RJ45: @@ -111,6 +104,8 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) brd->maxports = 4; break; + case PCI_DEVICE_ID_CLASSIC_8: + case PCI_DEVICE_ID_CLASSIC_8_422: case PCI_DEVICE_ID_DIGI_NEO_8: case PCIE_DEVICE_ID_NEO_8: case PCIE_DEVICE_ID_NEO_8RJ45: @@ -129,36 +124,109 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) brd->irq = pdev->irq; - jsm_dbg(INIT, &brd->pci_dev, "jsm_found_board - NEO adapter\n"); + switch (pdev->device) { + case PCI_DEVICE_ID_CLASSIC_4: + case PCI_DEVICE_ID_CLASSIC_4_422: + case PCI_DEVICE_ID_CLASSIC_8: + case PCI_DEVICE_ID_CLASSIC_8_422: + + jsm_dbg(INIT, &brd->pci_dev, + "jsm_found_board - Classic adapter\n"); + + /* + * For PCI ClassicBoards + * PCI Local Address (.i.e. "resource" number) space + * 0 PLX Memory Mapped Config + * 1 PLX I/O Mapped Config + * 2 I/O Mapped UARTs and Status + * 3 Memory Mapped VPD + * 4 Memory Mapped UARTs and Status + */ + + /* Get the PCI Base Address Registers */ + brd->membase = pci_resource_start(pdev, 4); + brd->membase_end = pci_resource_end(pdev, 4); + + if (brd->membase & 0x1) + brd->membase &= ~0x3; + else + brd->membase &= ~0xF; + + brd->iobase = pci_resource_start(pdev, 1); + brd->iobase_end = pci_resource_end(pdev, 1); + brd->iobase = ((unsigned int)(brd->iobase)) & 0xFFFE; + + /* Assign the board_ops struct */ + brd->bd_ops = &jsm_cls_ops; + + brd->bd_uart_offset = 0x8; + brd->bd_dividend = 921600; + + brd->re_map_membase = ioremap(brd->membase, + pci_resource_len(pdev, 4)); + if (!brd->re_map_membase) { + dev_err(&pdev->dev, + "Card has no PCI Memory resources, failing board.\n"); + rc = -ENOMEM; + goto out_kfree_brd; + } + + /* + * Enable Local Interrupt 1 (0x1), + * Local Interrupt 1 Polarity Active high (0x2), + * Enable PCI interrupt (0x43) + */ + outb(0x43, brd->iobase + 0x4c); + + break; + + case PCI_DEVICE_ID_NEO_2DB9: + case PCI_DEVICE_ID_NEO_2DB9PRI: + case PCI_DEVICE_ID_NEO_2RJ45: + case PCI_DEVICE_ID_NEO_2RJ45PRI: + case PCI_DEVICE_ID_NEO_2_422_485: + case PCI_DEVICE_ID_NEO_4: + case PCIE_DEVICE_ID_NEO_4: + case PCIE_DEVICE_ID_NEO_4RJ45: + case PCIE_DEVICE_ID_NEO_4_IBM: + case PCI_DEVICE_ID_DIGI_NEO_8: + case PCIE_DEVICE_ID_NEO_8: + case PCIE_DEVICE_ID_NEO_8RJ45: + + jsm_dbg(INIT, &brd->pci_dev, "jsm_found_board - NEO adapter\n"); - /* get the PCI Base Address Registers */ - brd->membase = pci_resource_start(pdev, 0); - brd->membase_end = pci_resource_end(pdev, 0); + /* get the PCI Base Address Registers */ + brd->membase = pci_resource_start(pdev, 0); + brd->membase_end = pci_resource_end(pdev, 0); - if (brd->membase & 1) - brd->membase &= ~3; - else - brd->membase &= ~15; + if (brd->membase & 1) + brd->membase &= ~0x3; + else + brd->membase &= ~0xF; - /* Assign the board_ops struct */ - brd->bd_ops = &jsm_neo_ops; + /* Assign the board_ops struct */ + brd->bd_ops = &jsm_neo_ops; - brd->bd_uart_offset = 0x200; - brd->bd_dividend = 921600; + brd->bd_uart_offset = 0x200; + brd->bd_dividend = 921600; - brd->re_map_membase = ioremap(brd->membase, pci_resource_len(pdev, 0)); - if (!brd->re_map_membase) { - dev_err(&pdev->dev, - "card has no PCI Memory resources, " - "failing board.\n"); - rc = -ENOMEM; - goto out_kfree_brd; + brd->re_map_membase = ioremap(brd->membase, + pci_resource_len(pdev, 0)); + if (!brd->re_map_membase) { + dev_err(&pdev->dev, + "Card has no PCI Memory resources, failing board.\n"); + rc = -ENOMEM; + goto out_kfree_brd; + } + + break; + default: + return -ENXIO; } - rc = request_irq(brd->irq, brd->bd_ops->intr, - IRQF_SHARED, "JSM", brd); + rc = request_irq(brd->irq, brd->bd_ops->intr, IRQF_SHARED, "JSM", brd); if (rc) { - printk(KERN_WARNING "Failed to hook IRQ %d\n",brd->irq); + dev_warn(&pdev->dev, "Failed to hook IRQ %d\n", brd->irq); goto out_iounmap; } @@ -178,7 +246,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) } /* Log the information about the board */ - dev_info(&pdev->dev, "board %d: Digi Neo (rev %d), irq %d\n", + dev_info(&pdev->dev, "board %d: Digi Classic/Neo (rev %d), irq %d\n", adapter_count, brd->rev, brd->irq); pci_set_drvdata(pdev, brd); @@ -205,6 +273,18 @@ static void jsm_remove_one(struct pci_dev *pdev) struct jsm_board *brd = pci_get_drvdata(pdev); int i = 0; + switch (pdev->device) { + case PCI_DEVICE_ID_CLASSIC_4: + case PCI_DEVICE_ID_CLASSIC_4_422: + case PCI_DEVICE_ID_CLASSIC_8: + case PCI_DEVICE_ID_CLASSIC_8_422: + /* Tell card not to interrupt anymore. */ + outb(0x0, brd->iobase + 0x4c); + break; + default: + break; + } + jsm_remove_uart_port(brd); free_irq(brd->irq, brd); @@ -239,6 +319,10 @@ static struct pci_device_id jsm_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4), 0, 0, 11 }, { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_4RJ45), 0, 0, 12 }, { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCIE_DEVICE_ID_NEO_8RJ45), 0, 0, 13 }, + { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_4), 0, 0, 14 }, + { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_4_422), 0, 0, 15 }, + { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_8), 0, 0, 16 }, + { PCI_DEVICE(PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_CLASSIC_8_422), 0, 0, 17 }, { 0, } }; MODULE_DEVICE_TABLE(pci, jsm_pci_tbl); diff --git a/drivers/tty/serial/jsm/jsm_neo.c b/drivers/tty/serial/jsm/jsm_neo.c index dfaf48826417..7291c2117daa 100644 --- a/drivers/tty/serial/jsm/jsm_neo.c +++ b/drivers/tty/serial/jsm/jsm_neo.c @@ -13,11 +13,6 @@ * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR * PURPOSE. See the GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 * Temple Place - Suite 330, Boston, - * MA 02111-1307, USA. - * * Contact Information: * Scott H Kilau <Scott_Kilau@digi.com> * Wendy Xiong <wendyx@us.ibm.com> @@ -649,7 +644,7 @@ static void neo_flush_uart_write(struct jsm_channel *ch) /* Check to see if the UART feels it completely flushed the FIFO. */ tmp = readb(&ch->ch_neo_uart->isr_fcr); - if (tmp & 4) { + if (tmp & UART_FCR_CLEAR_XMIT) { jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "Still flushing TX UART... i: %d\n", i); udelay(10); @@ -694,7 +689,7 @@ static void neo_flush_uart_read(struct jsm_channel *ch) /* * No locks are assumed to be held when calling this function. */ -static void neo_clear_break(struct jsm_channel *ch, int force) +static void neo_clear_break(struct jsm_channel *ch) { unsigned long lock_flags; @@ -1024,27 +1019,24 @@ static void neo_param(struct jsm_channel *ch) lcr |= UART_LCR_STOP; switch (ch->ch_c_cflag & CSIZE) { - case CS5: - lcr |= UART_LCR_WLEN5; - break; - case CS6: - lcr |= UART_LCR_WLEN6; - break; - case CS7: - lcr |= UART_LCR_WLEN7; - break; - case CS8: - default: - lcr |= UART_LCR_WLEN8; + case CS5: + lcr |= UART_LCR_WLEN5; break; + case CS6: + lcr |= UART_LCR_WLEN6; + break; + case CS7: + lcr |= UART_LCR_WLEN7; + break; + case CS8: + default: + lcr |= UART_LCR_WLEN8; + break; } ier = readb(&ch->ch_neo_uart->ier); uart_lcr = readb(&ch->ch_neo_uart->lcr); - if (baud == 0) - baud = 9600; - quot = ch->ch_bd->bd_dividend / baud; if (quot != 0) { diff --git a/drivers/tty/serial/jsm/jsm_tty.c b/drivers/tty/serial/jsm/jsm_tty.c index 3e5c1563afe2..524e86ab3cae 100644 --- a/drivers/tty/serial/jsm/jsm_tty.c +++ b/drivers/tty/serial/jsm/jsm_tty.c @@ -13,11 +13,6 @@ * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR * PURPOSE. See the GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 * Temple Place - Suite 330, Boston, - * MA 02111-1307, USA. - * * Contact Information: * Scott H Kilau <Scott_Kilau@digi.com> * Ananda Venkatarman <mansarov@us.ibm.com> @@ -77,7 +72,8 @@ static unsigned int jsm_tty_tx_empty(struct uart_port *port) static unsigned int jsm_tty_get_mctrl(struct uart_port *port) { int result; - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); @@ -98,7 +94,8 @@ static unsigned int jsm_tty_get_mctrl(struct uart_port *port) */ static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); @@ -133,7 +130,8 @@ static void jsm_tty_write(struct uart_port *port) static void jsm_tty_start_tx(struct uart_port *port) { - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); @@ -145,7 +143,8 @@ static void jsm_tty_start_tx(struct uart_port *port) static void jsm_tty_stop_tx(struct uart_port *port) { - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); @@ -157,7 +156,8 @@ static void jsm_tty_stop_tx(struct uart_port *port) static void jsm_tty_send_xchar(struct uart_port *port, char ch) { unsigned long lock_flags; - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); struct ktermios *termios; spin_lock_irqsave(&port->lock, lock_flags); @@ -172,7 +172,8 @@ static void jsm_tty_send_xchar(struct uart_port *port, char ch) static void jsm_tty_stop_rx(struct uart_port *port) { - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); channel->ch_bd->bd_ops->disable_receiver(channel); } @@ -180,13 +181,14 @@ static void jsm_tty_stop_rx(struct uart_port *port) static void jsm_tty_break(struct uart_port *port, int break_state) { unsigned long lock_flags; - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); spin_lock_irqsave(&port->lock, lock_flags); if (break_state == -1) channel->ch_bd->bd_ops->send_break(channel); else - channel->ch_bd->bd_ops->clear_break(channel, 0); + channel->ch_bd->bd_ops->clear_break(channel); spin_unlock_irqrestore(&port->lock, lock_flags); } @@ -194,7 +196,8 @@ static void jsm_tty_break(struct uart_port *port, int break_state) static int jsm_tty_open(struct uart_port *port) { struct jsm_board *brd; - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); struct ktermios *termios; /* Get board pointer from our array of majors we have allocated */ @@ -273,7 +276,8 @@ static void jsm_tty_close(struct uart_port *port) { struct jsm_board *bd; struct ktermios *ts; - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "start\n"); @@ -307,7 +311,8 @@ static void jsm_tty_set_termios(struct uart_port *port, struct ktermios *old_termios) { unsigned long lock_flags; - struct jsm_channel *channel = (struct jsm_channel *)port; + struct jsm_channel *channel = + container_of(port, struct jsm_channel, uart_port); spin_lock_irqsave(&port->lock, lock_flags); channel->ch_c_cflag = termios->c_cflag; @@ -415,6 +420,8 @@ int jsm_tty_init(struct jsm_board *brd) if (brd->bd_uart_offset == 0x200) ch->ch_neo_uart = vaddr + (brd->bd_uart_offset * i); + else + ch->ch_cls_uart = vaddr + (brd->bd_uart_offset * i); ch->ch_bd = brd; ch->ch_portnum = i; diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c index 4675fe198d31..18c3844510ff 100644 --- a/drivers/tty/serial/lantiq.c +++ b/drivers/tty/serial/lantiq.c @@ -497,8 +497,10 @@ lqasc_type(struct uart_port *port) static void lqasc_release_port(struct uart_port *port) { + struct platform_device *pdev = to_platform_device(port->dev); + if (port->flags & UPF_IOREMAP) { - iounmap(port->membase); + devm_iounmap(&pdev->dev, port->membase); port->membase = NULL; } } diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c index 5702828fb62e..8f7f83a14c93 100644 --- a/drivers/tty/serial/m32r_sio.c +++ b/drivers/tty/serial/m32r_sio.c @@ -249,7 +249,8 @@ static void serial_out(struct uart_sio_port *up, int offset, int value) static void m32r_sio_stop_tx(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); if (up->ier & UART_IER_THRI) { up->ier &= ~UART_IER_THRI; @@ -260,7 +261,8 @@ static void m32r_sio_stop_tx(struct uart_port *port) static void m32r_sio_start_tx(struct uart_port *port) { #ifdef CONFIG_SERIAL_M32R_PLDSIO - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); struct circ_buf *xmit = &up->port.state->xmit; if (!(up->ier & UART_IER_THRI)) { @@ -274,7 +276,8 @@ static void m32r_sio_start_tx(struct uart_port *port) } while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY); #else - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); if (!(up->ier & UART_IER_THRI)) { up->ier |= UART_IER_THRI; @@ -285,7 +288,8 @@ static void m32r_sio_start_tx(struct uart_port *port) static void m32r_sio_stop_rx(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); up->ier &= ~UART_IER_RLSI; up->port.read_status_mask &= ~UART_LSR_DR; @@ -294,7 +298,8 @@ static void m32r_sio_stop_rx(struct uart_port *port) static void m32r_sio_enable_ms(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); up->ier |= UART_IER_MSI; serial_out(up, UART_IER, up->ier); @@ -581,7 +586,8 @@ static void m32r_sio_timeout(unsigned long data) static unsigned int m32r_sio_tx_empty(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); unsigned long flags; unsigned int ret; @@ -609,7 +615,8 @@ static void m32r_sio_break_ctl(struct uart_port *port, int break_state) static int m32r_sio_startup(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); int retval; sio_init(); @@ -652,7 +659,8 @@ static int m32r_sio_startup(struct uart_port *port) static void m32r_sio_shutdown(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); /* * Disable interrupts from this port @@ -681,7 +689,8 @@ static unsigned int m32r_sio_get_divisor(struct uart_port *port, static void m32r_sio_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); unsigned char cval = 0; unsigned long flags; unsigned int baud, quot; @@ -780,7 +789,8 @@ static void m32r_sio_set_termios(struct uart_port *port, static void m32r_sio_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); if (up->pm) up->pm(port, state, oldstate); @@ -825,7 +835,8 @@ m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res) static void m32r_sio_release_port(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); unsigned long start, offset = 0, size = 0; size <<= up->port.regshift; @@ -862,7 +873,8 @@ static void m32r_sio_release_port(struct uart_port *port) static int m32r_sio_request_port(struct uart_port *port) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); struct resource *res = NULL; int ret = 0; @@ -889,7 +901,8 @@ static int m32r_sio_request_port(struct uart_port *port) static void m32r_sio_config_port(struct uart_port *port, int unused) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); unsigned long flags; spin_lock_irqsave(&up->port.lock, flags); @@ -1000,7 +1013,8 @@ static inline void wait_for_xmitr(struct uart_sio_port *up) static void m32r_sio_console_putchar(struct uart_port *port, int ch) { - struct uart_sio_port *up = (struct uart_sio_port *)port; + struct uart_sio_port *up = + container_of(port, struct uart_sio_port, port); wait_for_xmitr(up); sio_out(up, SIOTXB, ch); diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index 0041a64cc86e..182549f55904 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c @@ -346,10 +346,13 @@ static int max3109_detect(struct device *dev) unsigned int val = 0; int ret; - ret = regmap_read(s->regmap, MAX310X_REVID_REG, &val); + ret = regmap_write(s->regmap, MAX310X_GLOBALCMD_REG, + MAX310X_EXTREG_ENBL); if (ret) return ret; + regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val); + regmap_write(s->regmap, MAX310X_GLOBALCMD_REG, MAX310X_EXTREG_DSBL); if (((val & MAX310x_REV_MASK) != MAX3109_REV_ID)) { dev_err(dev, "%s ID 0x%02x does not match\n", s->devtype->name, val); @@ -874,55 +877,37 @@ static void max310x_set_termios(struct uart_port *port, uart_update_timeout(port, termios->c_cflag, baud); } -static int max310x_ioctl(struct uart_port *port, unsigned int cmd, - unsigned long arg) +static int max310x_rs485_config(struct uart_port *port, + struct serial_rs485 *rs485) { -#if defined(TIOCSRS485) && defined(TIOCGRS485) - struct serial_rs485 rs485; unsigned int val; - switch (cmd) { - case TIOCSRS485: - if (copy_from_user(&rs485, (void __user *)arg, sizeof(rs485))) - return -EFAULT; - if (rs485.delay_rts_before_send > 0x0f || - rs485.delay_rts_after_send > 0x0f) - return -ERANGE; - val = (rs485.delay_rts_before_send << 4) | - rs485.delay_rts_after_send; - max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val); - if (rs485.flags & SER_RS485_ENABLED) { - max310x_port_update(port, MAX310X_MODE1_REG, - MAX310X_MODE1_TRNSCVCTRL_BIT, - MAX310X_MODE1_TRNSCVCTRL_BIT); - max310x_port_update(port, MAX310X_MODE2_REG, - MAX310X_MODE2_ECHOSUPR_BIT, - MAX310X_MODE2_ECHOSUPR_BIT); - } else { - max310x_port_update(port, MAX310X_MODE1_REG, - MAX310X_MODE1_TRNSCVCTRL_BIT, 0); - max310x_port_update(port, MAX310X_MODE2_REG, - MAX310X_MODE2_ECHOSUPR_BIT, 0); - } - return 0; - case TIOCGRS485: - memset(&rs485, 0, sizeof(rs485)); - val = max310x_port_read(port, MAX310X_MODE1_REG); - rs485.flags = (val & MAX310X_MODE1_TRNSCVCTRL_BIT) ? - SER_RS485_ENABLED : 0; - rs485.flags |= SER_RS485_RTS_ON_SEND; - val = max310x_port_read(port, MAX310X_HDPIXDELAY_REG); - rs485.delay_rts_before_send = val >> 4; - rs485.delay_rts_after_send = val & 0x0f; - if (copy_to_user((void __user *)arg, &rs485, sizeof(rs485))) - return -EFAULT; - return 0; - default: - break; + if (rs485->delay_rts_before_send > 0x0f || + rs485->delay_rts_after_send > 0x0f) + return -ERANGE; + + val = (rs485->delay_rts_before_send << 4) | + rs485->delay_rts_after_send; + max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val); + if (rs485->flags & SER_RS485_ENABLED) { + max310x_port_update(port, MAX310X_MODE1_REG, + MAX310X_MODE1_TRNSCVCTRL_BIT, + MAX310X_MODE1_TRNSCVCTRL_BIT); + max310x_port_update(port, MAX310X_MODE2_REG, + MAX310X_MODE2_ECHOSUPR_BIT, + MAX310X_MODE2_ECHOSUPR_BIT); + } else { + max310x_port_update(port, MAX310X_MODE1_REG, + MAX310X_MODE1_TRNSCVCTRL_BIT, 0); + max310x_port_update(port, MAX310X_MODE2_REG, + MAX310X_MODE2_ECHOSUPR_BIT, 0); } -#endif - return -ENOIOCTLCMD; + rs485->flags &= SER_RS485_RTS_ON_SEND | SER_RS485_ENABLED; + memset(rs485->padding, 0, sizeof(rs485->padding)); + port->rs485 = *rs485; + + return 0; } static int max310x_startup(struct uart_port *port) @@ -1017,7 +1002,6 @@ static const struct uart_ops max310x_ops = { .release_port = max310x_null_void, .config_port = max310x_config_port, .verify_port = max310x_verify_port, - .ioctl = max310x_ioctl, }; static int __maybe_unused max310x_suspend(struct device *dev) @@ -1218,6 +1202,7 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype, s->p[i].port.iobase = i * 0x20; s->p[i].port.membase = (void __iomem *)~0; s->p[i].port.uartclk = uartclk; + s->p[i].port.rs485_config = max310x_rs485_config; s->p[i].port.ops = &max310x_ops; /* Disable all interrupts */ max310x_port_write(&s->p[i].port, MAX310X_IRQEN_REG, 0); diff --git a/drivers/tty/serial/mcf.c b/drivers/tty/serial/mcf.c index bc896dc7d2ed..fdd5c7bd1e8d 100644 --- a/drivers/tty/serial/mcf.c +++ b/drivers/tty/serial/mcf.c @@ -57,7 +57,6 @@ struct mcf_uart { struct uart_port port; unsigned int sigs; /* Local copy of line sigs */ unsigned char imr; /* Local IMR mirror */ - struct serial_rs485 rs485; /* RS485 settings */ }; /****************************************************************************/ @@ -104,7 +103,7 @@ static void mcf_start_tx(struct uart_port *port) { struct mcf_uart *pp = container_of(port, struct mcf_uart, port); - if (pp->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) { /* Enable Transmitter */ writeb(MCFUART_UCR_TXENABLE, port->membase + MCFUART_UCR); /* Manually assert RTS */ @@ -258,12 +257,12 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, mr2 |= MCFUART_MR2_TXCTS; } - if (pp->rs485.flags & SER_RS485_ENABLED) { + spin_lock_irqsave(&port->lock, flags); + if (port->rs485.flags & SER_RS485_ENABLED) { dev_dbg(port->dev, "Setting UART to RS485\n"); mr2 |= MCFUART_MR2_TXRTS; } - spin_lock_irqsave(&port->lock, flags); uart_update_timeout(port, termios->c_cflag, baud); writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR); writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR); @@ -360,7 +359,7 @@ static void mcf_tx_chars(struct mcf_uart *pp) pp->imr &= ~MCFUART_UIR_TXREADY; writeb(pp->imr, port->membase + MCFUART_UIMR); /* Disable TX to negate RTS automatically */ - if (pp->rs485.flags & SER_RS485_ENABLED) + if (port->rs485.flags & SER_RS485_ENABLED) writeb(MCFUART_UCR_TXDISABLE, port->membase + MCFUART_UCR); } @@ -440,13 +439,11 @@ static int mcf_verify_port(struct uart_port *port, struct serial_struct *ser) /****************************************************************************/ /* Enable or disable the RS485 support */ -static void mcf_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) +static int mcf_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) { struct mcf_uart *pp = container_of(port, struct mcf_uart, port); - unsigned long flags; unsigned char mr1, mr2; - spin_lock_irqsave(&port->lock, flags); /* Get mode registers */ mr1 = readb(port->membase + MCFUART_UMR); mr2 = readb(port->membase + MCFUART_UMR); @@ -460,32 +457,8 @@ static void mcf_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) } writeb(mr1, port->membase + MCFUART_UMR); writeb(mr2, port->membase + MCFUART_UMR); - pp->rs485 = *rs485; - spin_unlock_irqrestore(&port->lock, flags); -} + port->rs485 = *rs485; -static int mcf_ioctl(struct uart_port *port, unsigned int cmd, - unsigned long arg) -{ - switch (cmd) { - case TIOCSRS485: { - struct serial_rs485 rs485; - if (copy_from_user(&rs485, (struct serial_rs485 *)arg, - sizeof(struct serial_rs485))) - return -EFAULT; - mcf_config_rs485(port, &rs485); - break; - } - case TIOCGRS485: { - struct mcf_uart *pp = container_of(port, struct mcf_uart, port); - if (copy_to_user((struct serial_rs485 *)arg, &pp->rs485, - sizeof(struct serial_rs485))) - return -EFAULT; - break; - } - default: - return -ENOIOCTLCMD; - } return 0; } @@ -510,7 +483,6 @@ static const struct uart_ops mcf_uart_ops = { .release_port = mcf_release_port, .config_port = mcf_config_port, .verify_port = mcf_verify_port, - .ioctl = mcf_ioctl, }; static struct mcf_uart mcf_ports[4]; @@ -538,6 +510,7 @@ int __init early_mcf_setup(struct mcf_platform_uart *platp) port->irq = platp[i].irq; port->uartclk = MCF_BUSCLK; port->flags = UPF_BOOT_AUTOCONF; + port->rs485_config = mcf_config_rs485; port->ops = &mcf_uart_ops; } @@ -663,6 +636,7 @@ static int mcf_probe(struct platform_device *pdev) port->uartclk = MCF_BUSCLK; port->ops = &mcf_uart_ops; port->flags = UPF_BOOT_AUTOCONF; + port->rs485_config = mcf_config_rs485; uart_add_one_port(&mcf_driver, port); } diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c index 30e9e60bc5cd..517cd073dc08 100644 --- a/drivers/tty/serial/men_z135_uart.c +++ b/drivers/tty/serial/men_z135_uart.c @@ -809,6 +809,7 @@ static void men_z135_remove(struct mcb_device *mdev) static const struct mcb_device_id men_z135_ids[] = { { .device = 0x87 }, + { } }; MODULE_DEVICE_TABLE(mcb, men_z135_ids); diff --git a/drivers/tty/serial/mfd.c b/drivers/tty/serial/mfd.c index 445799dc9846..e1f4fdad02c9 100644 --- a/drivers/tty/serial/mfd.c +++ b/drivers/tty/serial/mfd.c @@ -1371,7 +1371,7 @@ static void hsu_global_init(void) hsu->iolen = 0x1000; if (!(request_mem_region(hsu->paddr, hsu->iolen, "HSU global"))) - pr_warning("HSU: error in request mem region\n"); + pr_warn("HSU: error in request mem region\n"); hsu->reg = ioremap_nocache((unsigned long)hsu->paddr, hsu->iolen); if (!hsu->reg) { diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c index ae49856ef6c7..5d5499bedba0 100644 --- a/drivers/tty/serial/mpsc.c +++ b/drivers/tty/serial/mpsc.c @@ -1246,7 +1246,8 @@ static irqreturn_t mpsc_sdma_intr(int irq, void *dev_id) */ static uint mpsc_tx_empty(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); ulong iflags; uint rc; @@ -1264,7 +1265,8 @@ static void mpsc_set_mctrl(struct uart_port *port, uint mctrl) static uint mpsc_get_mctrl(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); u32 mflags, status; status = (pi->mirror_regs) ? pi->MPSC_CHR_10_m @@ -1281,7 +1283,8 @@ static uint mpsc_get_mctrl(struct uart_port *port) static void mpsc_stop_tx(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); pr_debug("mpsc_stop_tx[%d]\n", port->line); @@ -1290,7 +1293,8 @@ static void mpsc_stop_tx(struct uart_port *port) static void mpsc_start_tx(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); unsigned long iflags; spin_lock_irqsave(&pi->tx_lock, iflags); @@ -1316,7 +1320,8 @@ static void mpsc_start_rx(struct mpsc_port_info *pi) static void mpsc_stop_rx(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); pr_debug("mpsc_stop_rx[%d]: Stopping...\n", port->line); @@ -1338,7 +1343,8 @@ static void mpsc_stop_rx(struct uart_port *port) static void mpsc_break_ctl(struct uart_port *port, int ctl) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); ulong flags; u32 v; @@ -1353,7 +1359,8 @@ static void mpsc_break_ctl(struct uart_port *port, int ctl) static int mpsc_startup(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); u32 flag = 0; int rc; @@ -1383,7 +1390,8 @@ static int mpsc_startup(struct uart_port *port) static void mpsc_shutdown(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); pr_debug("mpsc_shutdown[%d]: Shutting down MPSC\n", port->line); @@ -1394,7 +1402,8 @@ static void mpsc_shutdown(struct uart_port *port) static void mpsc_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); u32 baud; ulong flags; u32 chr_bits, stop_bits, par; @@ -1498,7 +1507,8 @@ static int mpsc_request_port(struct uart_port *port) static void mpsc_release_port(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); if (pi->ready) { mpsc_uninit_rings(pi); @@ -1513,7 +1523,8 @@ static void mpsc_config_port(struct uart_port *port, int flags) static int mpsc_verify_port(struct uart_port *port, struct serial_struct *ser) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); int rc = 0; pr_debug("mpsc_verify_port[%d]: Verifying port data\n", pi->port.line); @@ -1548,7 +1559,8 @@ static void mpsc_put_poll_char(struct uart_port *port, static int mpsc_get_poll_char(struct uart_port *port) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); struct mpsc_rx_desc *rxre; u32 cmdstat, bytes_in, i; u8 *bp; @@ -1648,7 +1660,8 @@ static int mpsc_get_poll_char(struct uart_port *port) static void mpsc_put_poll_char(struct uart_port *port, unsigned char c) { - struct mpsc_port_info *pi = (struct mpsc_port_info *)port; + struct mpsc_port_info *pi = + container_of(port, struct mpsc_port_info, port); u32 data; data = readl(pi->mpsc_base + MPSC_MPCR); diff --git a/drivers/tty/serial/mrst_max3110.c b/drivers/tty/serial/mrst_max3110.c index 1504a14ec1a6..77239d5e620d 100644 --- a/drivers/tty/serial/mrst_max3110.c +++ b/drivers/tty/serial/mrst_max3110.c @@ -27,6 +27,8 @@ * interrupt for a low speed UART device */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #ifdef CONFIG_MAGIC_SYSRQ #define SUPPORT_SYSRQ #endif @@ -47,8 +49,6 @@ #include "mrst_max3110.h" -#define PR_FMT "mrst_max3110: " - #define UART_TX_NEEDED 1 #define CON_TX_NEEDED 2 #define BIT_IRQ_PENDING 3 @@ -127,8 +127,8 @@ static int max3110_out(struct uart_max3110 *max, const u16 out) *obuf = out; ret = max3110_write_then_read(max, obuf, ibuf, 2, 1); if (ret) { - pr_warning(PR_FMT "%s(): get err msg %d when sending 0x%x\n", - __func__, ret, out); + pr_warn("%s: get err msg %d when sending 0x%x\n", + __func__, ret, out); goto exit; } @@ -153,10 +153,8 @@ static int max3110_read_multi(struct uart_max3110 *max) blen = M3110_RX_FIFO_DEPTH * sizeof(u16); buf = kzalloc(blen * 2, GFP_KERNEL | GFP_DMA); - if (!buf) { - pr_warning(PR_FMT "%s(): fail to alloc dma buffer\n", __func__); + if (!buf) return 0; - } /* tx/rx always have the same length */ obuf = buf; @@ -212,13 +210,13 @@ serial_m3110_con_setup(struct console *co, char *options) int parity = 'n'; int flow = 'n'; - pr_info(PR_FMT "setting up console\n"); + pr_info("setting up console\n"); if (co->index == -1) co->index = 0; if (!max) { - pr_err(PR_FMT "pmax is NULL, return"); + pr_err("pmax is NULL, return\n"); return -ENODEV; } @@ -296,8 +294,7 @@ static void send_circ_buf(struct uart_max3110 *max, ret = max3110_write_then_read(max, obuf, ibuf, blen, 0); if (ret) - pr_warning(PR_FMT "%s(): get err msg %d\n", - __func__, ret); + pr_warn("%s: get err msg %d\n", __func__, ret); receive_chars(max, ibuf, len); @@ -411,7 +408,7 @@ static int max3110_main_thread(void *_max) int ret = 0; struct circ_buf *xmit = &max->con_xmit; - pr_info(PR_FMT "start main thread\n"); + pr_info("start main thread\n"); do { wait_event_interruptible(*wq, @@ -455,7 +452,7 @@ static int max3110_read_thread(void *_max) { struct uart_max3110 *max = _max; - pr_info(PR_FMT "start read thread\n"); + pr_info("start read thread\n"); do { /* * If can't acquire the mutex, it means the main thread @@ -481,7 +478,7 @@ static int serial_m3110_startup(struct uart_port *port) int ret = 0; if (port->line != 0) { - pr_err(PR_FMT "uart port startup failed\n"); + pr_err("uart port startup failed\n"); return -1; } @@ -504,7 +501,7 @@ static int serial_m3110_startup(struct uart_port *port) if (IS_ERR(max->read_thread)) { ret = PTR_ERR(max->read_thread); max->read_thread = NULL; - pr_err(PR_FMT "Can't create read thread!\n"); + pr_err("Can't create read thread!\n"); return ret; } } diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c index 4b6c78331a64..d1bc6b6cbc70 100644 --- a/drivers/tty/serial/msm_serial.c +++ b/drivers/tty/serial/msm_serial.c @@ -54,6 +54,7 @@ struct msm_port { unsigned int imr; int is_uartdm; unsigned int old_snap_state; + bool break_detected; }; static inline void wait_for_xmitr(struct uart_port *port) @@ -126,23 +127,38 @@ static void handle_rx_dm(struct uart_port *port, unsigned int misr) while (count > 0) { unsigned char buf[4]; + int sysrq, r_count, i; sr = msm_read(port, UART_SR); if ((sr & UART_SR_RX_READY) == 0) { msm_port->old_snap_state -= count; break; } + ioread32_rep(port->membase + UARTDM_RF, buf, 1); - if (sr & UART_SR_RX_BREAK) { - port->icount.brk++; - if (uart_handle_break(port)) - continue; - } else if (sr & UART_SR_PAR_FRAME_ERR) - port->icount.frame++; + r_count = min_t(int, count, sizeof(buf)); - /* TODO: handle sysrq */ - tty_insert_flip_string(tport, buf, min(count, 4)); - count -= 4; + for (i = 0; i < r_count; i++) { + char flag = TTY_NORMAL; + + if (msm_port->break_detected && buf[i] == 0) { + port->icount.brk++; + flag = TTY_BREAK; + msm_port->break_detected = false; + if (uart_handle_break(port)) + continue; + } + + if (!(port->read_status_mask & UART_SR_RX_BREAK)) + flag = TTY_NORMAL; + + spin_unlock(&port->lock); + sysrq = uart_handle_sysrq_char(port, buf[i]); + spin_lock(&port->lock); + if (!sysrq) + tty_insert_flip_char(tport, buf[i], flag); + } + count -= r_count; } spin_unlock(&port->lock); @@ -174,6 +190,7 @@ static void handle_rx(struct uart_port *port) while ((sr = msm_read(port, UART_SR)) & UART_SR_RX_READY) { unsigned int c; char flag = TTY_NORMAL; + int sysrq; c = msm_read(port, UART_RF); @@ -195,7 +212,10 @@ static void handle_rx(struct uart_port *port) else if (sr & UART_SR_PAR_FRAME_ERR) flag = TTY_FRAME; - if (!uart_handle_sysrq_char(port, c)) + spin_unlock(&port->lock); + sysrq = uart_handle_sysrq_char(port, c); + spin_lock(&port->lock); + if (!sysrq) tty_insert_flip_char(tport, c, flag); } @@ -287,6 +307,11 @@ static irqreturn_t msm_irq(int irq, void *dev_id) misr = msm_read(port, UART_MISR); msm_write(port, 0, UART_IMR); /* disable interrupt */ + if (misr & UART_IMR_RXBREAK_START) { + msm_port->break_detected = true; + msm_write(port, UART_CR_CMD_RESET_RXBREAK_START, UART_CR); + } + if (misr & (UART_IMR_RXLEV | UART_IMR_RXSTALE)) { if (msm_port->is_uartdm) handle_rx_dm(port, misr); @@ -402,9 +427,6 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) entry = msm_find_best_baud(port, baud); - if (msm_port->is_uartdm) - msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); - msm_write(port, entry->code, UART_CSR); /* RX stale watermark */ @@ -421,6 +443,18 @@ static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) /* set TX watermark */ msm_write(port, 10, UART_TFWR); + msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); + msm_reset(port); + + /* Enable RX and TX */ + msm_write(port, UART_CR_TX_ENABLE | UART_CR_RX_ENABLE, UART_CR); + + /* turn on RX and CTS interrupts */ + msm_port->imr = UART_IMR_RXLEV | UART_IMR_RXSTALE | + UART_IMR_CURRENT_CTS | UART_IMR_RXBREAK_START; + + msm_write(port, msm_port->imr, UART_IMR); + if (msm_port->is_uartdm) { msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); msm_write(port, 0xFFFFFF, UARTDM_DMRX); @@ -467,40 +501,6 @@ static int msm_startup(struct uart_port *port) data |= UART_MR1_AUTO_RFR_LEVEL1 & (rfr_level << 2); data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level; msm_write(port, data, UART_MR1); - - /* make sure that RXSTALE count is non-zero */ - data = msm_read(port, UART_IPR); - if (unlikely(!data)) { - data |= UART_IPR_RXSTALE_LAST; - data |= UART_IPR_STALE_LSB; - msm_write(port, data, UART_IPR); - } - - data = 0; - if (!port->cons || (port->cons && !(port->cons->flags & CON_ENABLED))) { - msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); - msm_reset(port); - data = UART_CR_TX_ENABLE; - } - - data |= UART_CR_RX_ENABLE; - msm_write(port, data, UART_CR); /* enable TX & RX */ - - /* Make sure IPR is not 0 to start with*/ - if (msm_port->is_uartdm) - msm_write(port, UART_IPR_STALE_LSB, UART_IPR); - - /* turn on RX and CTS interrupts */ - msm_port->imr = UART_IMR_RXLEV | UART_IMR_RXSTALE | - UART_IMR_CURRENT_CTS; - - if (msm_port->is_uartdm) { - msm_write(port, 0xFFFFFF, UARTDM_DMRX); - msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); - msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); - } - - msm_write(port, msm_port->imr, UART_IMR); return 0; } @@ -1044,17 +1044,22 @@ static int msm_serial_probe(struct platform_device *pdev) struct resource *resource; struct uart_port *port; const struct of_device_id *id; - int irq; + int irq, line; + + if (pdev->dev.of_node) + line = of_alias_get_id(pdev->dev.of_node, "serial"); + else + line = pdev->id; - if (pdev->id == -1) - pdev->id = atomic_inc_return(&msm_uart_next_id) - 1; + if (line < 0) + line = atomic_inc_return(&msm_uart_next_id) - 1; - if (unlikely(pdev->id < 0 || pdev->id >= UART_NR)) + if (unlikely(line < 0 || line >= UART_NR)) return -ENXIO; - dev_info(&pdev->dev, "msm_serial: detected port #%d\n", pdev->id); + dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line); - port = get_port_from_line(pdev->id); + port = get_port_from_line(line); port->dev = &pdev->dev; msm_port = UART_TO_MSM(port); diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h index 73d3abe71e79..3e1c7138d8cd 100644 --- a/drivers/tty/serial/msm_serial.h +++ b/drivers/tty/serial/msm_serial.h @@ -65,6 +65,7 @@ #define UART_CR_TX_ENABLE (1 << 2) #define UART_CR_RX_DISABLE (1 << 1) #define UART_CR_RX_ENABLE (1 << 0) +#define UART_CR_CMD_RESET_RXBREAK_START ((1 << 11) | (2 << 4)) #define UART_IMR 0x0014 #define UART_IMR_TXLEV (1 << 0) @@ -72,6 +73,7 @@ #define UART_IMR_RXLEV (1 << 4) #define UART_IMR_DELTA_CTS (1 << 5) #define UART_IMR_CURRENT_CTS (1 << 6) +#define UART_IMR_RXBREAK_START (1 << 10) #define UART_IPR_RXSTALE_LAST 0x20 #define UART_IPR_STALE_LSB 0x1F diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c index 10c29334fe2f..b7a5aaa6271a 100644 --- a/drivers/tty/serial/mxs-auart.c +++ b/drivers/tty/serial/mxs-auart.c @@ -14,6 +14,10 @@ * http://www.gnu.org/copyleft/gpl.html */ +#if defined(CONFIG_SERIAL_MXS_AUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) +#define SUPPORT_SYSRQ +#endif + #include <linux/kernel.h> #include <linux/errno.h> #include <linux/init.h> @@ -38,6 +42,12 @@ #include <asm/cacheflush.h> +#include <linux/gpio.h> +#include <linux/gpio/consumer.h> +#include <linux/err.h> +#include <linux/irq.h> +#include "serial_mctrl_gpio.h" + #define MXS_AUART_PORTS 5 #define MXS_AUART_FIFO_SIZE 16 @@ -139,7 +149,7 @@ struct mxs_auart_port { #define MXS_AUART_DMA_RX_READY 3 /* bit 3 */ #define MXS_AUART_RTSCTS 4 /* bit 4 */ unsigned long flags; - unsigned int ctrl; + unsigned int mctrl_prev; enum mxs_auart_type devtype; unsigned int irq; @@ -155,6 +165,10 @@ struct mxs_auart_port { struct scatterlist rx_sgl; struct dma_chan *rx_dma_chan; void *rx_dma_buf; + + struct mctrl_gpios *gpios; + int gpio_irq[UART_GPIO_MAX]; + bool ms_irq_enabled; }; static struct platform_device_id mxs_auart_devtype[] = { @@ -414,25 +428,102 @@ static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl) ctrl |= AUART_CTRL2_RTS; } - s->ctrl = mctrl; writel(ctrl, u->membase + AUART_CTRL2); + + mctrl_gpio_set(s->gpios, mctrl); +} + +#define MCTRL_ANY_DELTA (TIOCM_RI | TIOCM_DSR | TIOCM_CD | TIOCM_CTS) +static u32 mxs_auart_modem_status(struct mxs_auart_port *s, u32 mctrl) +{ + u32 mctrl_diff; + + mctrl_diff = mctrl ^ s->mctrl_prev; + s->mctrl_prev = mctrl; + if (mctrl_diff & MCTRL_ANY_DELTA && s->ms_irq_enabled && + s->port.state != NULL) { + if (mctrl_diff & TIOCM_RI) + s->port.icount.rng++; + if (mctrl_diff & TIOCM_DSR) + s->port.icount.dsr++; + if (mctrl_diff & TIOCM_CD) + uart_handle_dcd_change(&s->port, mctrl & TIOCM_CD); + if (mctrl_diff & TIOCM_CTS) + uart_handle_cts_change(&s->port, mctrl & TIOCM_CTS); + + wake_up_interruptible(&s->port.state->port.delta_msr_wait); + } + return mctrl; } static u32 mxs_auart_get_mctrl(struct uart_port *u) { struct mxs_auart_port *s = to_auart_port(u); u32 stat = readl(u->membase + AUART_STAT); - int ctrl2 = readl(u->membase + AUART_CTRL2); - u32 mctrl = s->ctrl; + u32 mctrl = 0; - mctrl &= ~TIOCM_CTS; if (stat & AUART_STAT_CTS) mctrl |= TIOCM_CTS; - if (ctrl2 & AUART_CTRL2_RTS) - mctrl |= TIOCM_RTS; + return mctrl_gpio_get(s->gpios, &mctrl); +} + +/* + * Enable modem status interrupts + */ +static void mxs_auart_enable_ms(struct uart_port *port) +{ + struct mxs_auart_port *s = to_auart_port(port); - return mctrl; + /* + * Interrupt should not be enabled twice + */ + if (s->ms_irq_enabled) + return; + + s->ms_irq_enabled = true; + + if (s->gpio_irq[UART_GPIO_CTS] >= 0) + enable_irq(s->gpio_irq[UART_GPIO_CTS]); + /* TODO: enable AUART_INTR_CTSMIEN otherwise */ + + if (s->gpio_irq[UART_GPIO_DSR] >= 0) + enable_irq(s->gpio_irq[UART_GPIO_DSR]); + + if (s->gpio_irq[UART_GPIO_RI] >= 0) + enable_irq(s->gpio_irq[UART_GPIO_RI]); + + if (s->gpio_irq[UART_GPIO_DCD] >= 0) + enable_irq(s->gpio_irq[UART_GPIO_DCD]); +} + +/* + * Disable modem status interrupts + */ +static void mxs_auart_disable_ms(struct uart_port *port) +{ + struct mxs_auart_port *s = to_auart_port(port); + + /* + * Interrupt should not be disabled twice + */ + if (!s->ms_irq_enabled) + return; + + s->ms_irq_enabled = false; + + if (s->gpio_irq[UART_GPIO_CTS] >= 0) + disable_irq(s->gpio_irq[UART_GPIO_CTS]); + /* TODO: disable AUART_INTR_CTSMIEN otherwise */ + + if (s->gpio_irq[UART_GPIO_DSR] >= 0) + disable_irq(s->gpio_irq[UART_GPIO_DSR]); + + if (s->gpio_irq[UART_GPIO_RI] >= 0) + disable_irq(s->gpio_irq[UART_GPIO_RI]); + + if (s->gpio_irq[UART_GPIO_DCD] >= 0) + disable_irq(s->gpio_irq[UART_GPIO_DCD]); } static int mxs_auart_dma_prep_rx(struct mxs_auart_port *s); @@ -560,6 +651,10 @@ err_out: } +#define RTS_AT_AUART() IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(s->gpios, \ + UART_GPIO_RTS)) +#define CTS_AT_AUART() IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(s->gpios, \ + UART_GPIO_CTS)) static void mxs_auart_settermios(struct uart_port *u, struct ktermios *termios, struct ktermios *old) @@ -636,6 +731,7 @@ static void mxs_auart_settermios(struct uart_port *u, ctrl |= AUART_LINECTRL_STP2; /* figure out the hardware flow control settings */ + ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN); if (cflag & CRTSCTS) { /* * The DMA has a bug(see errata:2836) in mx23. @@ -650,9 +746,11 @@ static void mxs_auart_settermios(struct uart_port *u, ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE | AUART_CTRL2_DMAONERR; } - ctrl2 |= AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN; - } else { - ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN); + /* Even if RTS is GPIO line RTSEN can be enabled because + * the pinctrl configuration decides about RTS pin function */ + ctrl2 |= AUART_CTRL2_RTSEN; + if (CTS_AT_AUART()) + ctrl2 |= AUART_CTRL2_CTSEN; } /* set baud rate */ @@ -678,12 +776,30 @@ static void mxs_auart_settermios(struct uart_port *u, dev_err(s->dev, "We can not start up the DMA.\n"); } } + + /* CTS flow-control and modem-status interrupts */ + if (UART_ENABLE_MS(u, termios->c_cflag)) + mxs_auart_enable_ms(u); + else + mxs_auart_disable_ms(u); +} + +static void mxs_auart_set_ldisc(struct uart_port *port, + struct ktermios *termios) +{ + if (termios->c_line == N_PPS) { + port->flags |= UPF_HARDPPS_CD; + mxs_auart_enable_ms(port); + } else { + port->flags &= ~UPF_HARDPPS_CD; + } } static irqreturn_t mxs_auart_irq_handle(int irq, void *context) { u32 istat; struct mxs_auart_port *s = context; + u32 mctrl_temp = s->mctrl_prev; u32 stat = readl(s->port.membase + AUART_STAT); istat = readl(s->port.membase + AUART_INTR); @@ -695,8 +811,20 @@ static irqreturn_t mxs_auart_irq_handle(int irq, void *context) | AUART_INTR_CTSMIS), s->port.membase + AUART_INTR_CLR); + /* + * Dealing with GPIO interrupt + */ + if (irq == s->gpio_irq[UART_GPIO_CTS] || + irq == s->gpio_irq[UART_GPIO_DCD] || + irq == s->gpio_irq[UART_GPIO_DSR] || + irq == s->gpio_irq[UART_GPIO_RI]) + mxs_auart_modem_status(s, + mctrl_gpio_get(s->gpios, &mctrl_temp)); + if (istat & AUART_INTR_CTSMIS) { - uart_handle_cts_change(&s->port, stat & AUART_STAT_CTS); + if (CTS_AT_AUART() && s->ms_irq_enabled) + uart_handle_cts_change(&s->port, + stat & AUART_STAT_CTS); writel(AUART_INTR_CTSMIS, s->port.membase + AUART_INTR_CLR); istat &= ~AUART_INTR_CTSMIS; @@ -757,6 +885,10 @@ static int mxs_auart_startup(struct uart_port *u) */ writel(AUART_LINECTRL_FEN, u->membase + AUART_LINECTRL_SET); + /* get initial status of modem lines */ + mctrl_gpio_get(s->gpios, &s->mctrl_prev); + + s->ms_irq_enabled = false; return 0; } @@ -764,6 +896,8 @@ static void mxs_auart_shutdown(struct uart_port *u) { struct mxs_auart_port *s = to_auart_port(u); + mxs_auart_disable_ms(u); + if (auart_dma_enabled(s)) mxs_auart_dma_exit(s); @@ -779,10 +913,11 @@ static void mxs_auart_shutdown(struct uart_port *u) static unsigned int mxs_auart_tx_empty(struct uart_port *u) { - if (readl(u->membase + AUART_STAT) & AUART_STAT_TXFE) + if ((readl(u->membase + AUART_STAT) & + (AUART_STAT_TXFE | AUART_STAT_BUSY)) == AUART_STAT_TXFE) return TIOCSER_TEMT; - else - return 0; + + return 0; } static void mxs_auart_start_tx(struct uart_port *u) @@ -820,12 +955,14 @@ static struct uart_ops mxs_auart_ops = { .start_tx = mxs_auart_start_tx, .stop_tx = mxs_auart_stop_tx, .stop_rx = mxs_auart_stop_rx, + .enable_ms = mxs_auart_enable_ms, .break_ctl = mxs_auart_break_ctl, .set_mctrl = mxs_auart_set_mctrl, .get_mctrl = mxs_auart_get_mctrl, .startup = mxs_auart_startup, .shutdown = mxs_auart_shutdown, .set_termios = mxs_auart_settermios, + .set_ldisc = mxs_auart_set_ldisc, .type = mxs_auart_type, .release_port = mxs_auart_release_port, .request_port = mxs_auart_request_port, @@ -1020,6 +1157,71 @@ static int serial_mxs_probe_dt(struct mxs_auart_port *s, return 0; } +static bool mxs_auart_init_gpios(struct mxs_auart_port *s, struct device *dev) +{ + enum mctrl_gpio_idx i; + struct gpio_desc *gpiod; + + s->gpios = mctrl_gpio_init(dev, 0); + if (IS_ERR_OR_NULL(s->gpios)) + return false; + + /* Block (enabled before) DMA option if RTS or CTS is GPIO line */ + if (!RTS_AT_AUART() || !CTS_AT_AUART()) { + if (test_bit(MXS_AUART_RTSCTS, &s->flags)) + dev_warn(dev, + "DMA and flow control via gpio may cause some problems. DMA disabled!\n"); + clear_bit(MXS_AUART_RTSCTS, &s->flags); + } + + for (i = 0; i < UART_GPIO_MAX; i++) { + gpiod = mctrl_gpio_to_gpiod(s->gpios, i); + if (gpiod && (gpiod_get_direction(gpiod) == GPIOF_DIR_IN)) + s->gpio_irq[i] = gpiod_to_irq(gpiod); + else + s->gpio_irq[i] = -EINVAL; + } + + return true; +} + +static void mxs_auart_free_gpio_irq(struct mxs_auart_port *s) +{ + enum mctrl_gpio_idx i; + + for (i = 0; i < UART_GPIO_MAX; i++) + if (s->gpio_irq[i] >= 0) + free_irq(s->gpio_irq[i], s); +} + +static int mxs_auart_request_gpio_irq(struct mxs_auart_port *s) +{ + int *irq = s->gpio_irq; + enum mctrl_gpio_idx i; + int err = 0; + + for (i = 0; (i < UART_GPIO_MAX) && !err; i++) { + if (irq[i] < 0) + continue; + + irq_set_status_flags(irq[i], IRQ_NOAUTOEN); + err = request_irq(irq[i], mxs_auart_irq_handle, + IRQ_TYPE_EDGE_BOTH, dev_name(s->dev), s); + if (err) + dev_err(s->dev, "%s - Can't get %d irq\n", + __func__, irq[i]); + } + + /* + * If something went wrong, rollback. + */ + while (err && (--i >= 0)) + if (irq[i] >= 0) + free_irq(irq[i], s); + + return err; +} + static int mxs_auart_probe(struct platform_device *pdev) { const struct of_device_id *of_id = @@ -1067,7 +1269,7 @@ static int mxs_auart_probe(struct platform_device *pdev) s->port.type = PORT_IMX; s->port.dev = s->dev = &pdev->dev; - s->ctrl = 0; + s->mctrl_prev = 0; s->irq = platform_get_irq(pdev, 0); s->port.irq = s->irq; @@ -1077,13 +1279,24 @@ static int mxs_auart_probe(struct platform_device *pdev) platform_set_drvdata(pdev, s); + if (!mxs_auart_init_gpios(s, &pdev->dev)) + dev_err(&pdev->dev, + "Failed to initialize GPIOs. The serial port may not work as expected\n"); + + /* + * Get the GPIO lines IRQ + */ + ret = mxs_auart_request_gpio_irq(s); + if (ret) + goto out_free_irq; + auart_port[s->port.line] = s; mxs_auart_reset(&s->port); ret = uart_add_one_port(&auart_driver, &s->port); if (ret) - goto out_free_irq; + goto out_free_gpio_irq; version = readl(s->port.membase + AUART_VERSION); dev_info(&pdev->dev, "Found APPUART %d.%d.%d\n", @@ -1092,6 +1305,8 @@ static int mxs_auart_probe(struct platform_device *pdev) return 0; +out_free_gpio_irq: + mxs_auart_free_gpio_irq(s); out_free_irq: auart_port[pdev->id] = NULL; free_irq(s->irq, s); @@ -1111,6 +1326,7 @@ static int mxs_auart_remove(struct platform_device *pdev) auart_port[pdev->id] = NULL; + mxs_auart_free_gpio_irq(s); clk_put(s->clk); free_irq(s->irq, s); kfree(s); diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c index bf355050eab6..6dbd34c4f9e7 100644 --- a/drivers/tty/serial/of_serial.c +++ b/drivers/tty/serial/of_serial.c @@ -9,6 +9,7 @@ * 2 of the License, or (at your option) any later version. * */ +#include <linux/console.h> #include <linux/module.h> #include <linux/slab.h> #include <linux/delay.h> @@ -129,8 +130,15 @@ static int of_platform_serial_setup(struct platform_device *ofdev, port->dev = &ofdev->dev; - if (type == PORT_TEGRA) + switch (type) { + case PORT_TEGRA: port->handle_break = tegra_serial_handle_break; + break; + + case PORT_RT2880: + port->iotype = UPIO_AU; + break; + } return 0; out: @@ -240,6 +248,70 @@ static int of_platform_serial_remove(struct platform_device *ofdev) return 0; } +#ifdef CONFIG_PM_SLEEP +#ifdef CONFIG_SERIAL_8250 +static void of_serial_suspend_8250(struct of_serial_info *info) +{ + struct uart_8250_port *port8250 = serial8250_get_port(info->line); + struct uart_port *port = &port8250->port; + + serial8250_suspend_port(info->line); + if (info->clk && (!uart_console(port) || console_suspend_enabled)) + clk_disable_unprepare(info->clk); +} + +static void of_serial_resume_8250(struct of_serial_info *info) +{ + struct uart_8250_port *port8250 = serial8250_get_port(info->line); + struct uart_port *port = &port8250->port; + + if (info->clk && (!uart_console(port) || console_suspend_enabled)) + clk_prepare_enable(info->clk); + + serial8250_resume_port(info->line); +} +#else +static inline void of_serial_suspend_8250(struct of_serial_info *info) +{ +} + +static inline void of_serial_resume_8250(struct of_serial_info *info) +{ +} +#endif + +static int of_serial_suspend(struct device *dev) +{ + struct of_serial_info *info = dev_get_drvdata(dev); + + switch (info->type) { + case PORT_8250 ... PORT_MAX_8250: + of_serial_suspend_8250(info); + break; + default: + break; + } + + return 0; +} + +static int of_serial_resume(struct device *dev) +{ + struct of_serial_info *info = dev_get_drvdata(dev); + + switch (info->type) { + case PORT_8250 ... PORT_MAX_8250: + of_serial_resume_8250(info); + break; + default: + break; + } + + return 0; +} +#endif +static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume); + /* * A few common types, add more as needed. */ @@ -252,6 +324,7 @@ static struct of_device_id of_platform_serial_table[] = { { .compatible = "ns16850", .data = (void *)PORT_16850, }, { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, }, { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, + { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, }, { .compatible = "altr,16550-FIFO32", .data = (void *)PORT_ALTR_16550_F32, }, { .compatible = "altr,16550-FIFO64", diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 18c30cabe27f..435478a245d3 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -46,7 +46,7 @@ #include <dt-bindings/gpio/gpio.h> -#define OMAP_MAX_HSUART_PORTS 6 +#define OMAP_MAX_HSUART_PORTS 10 #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) @@ -163,7 +163,6 @@ struct uart_omap_port { u8 wakeups_enabled; u32 features; - struct serial_rs485 rs485; int rts_gpio; struct pm_qos_request pm_qos_request; @@ -316,7 +315,7 @@ static void serial_omap_stop_tx(struct uart_port *port) pm_runtime_get_sync(up->dev); /* Handle RS-485 */ - if (up->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) { if (up->scr & OMAP_UART_SCR_TX_EMPTY) { /* THR interrupt is fired when both TX FIFO and TX * shift register are empty. This means there's nothing @@ -327,10 +326,12 @@ static void serial_omap_stop_tx(struct uart_port *port) */ up->scr &= ~OMAP_UART_SCR_TX_EMPTY; serial_out(up, UART_OMAP_SCR, up->scr); - res = (up->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 1 : 0; + res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? + 1 : 0; if (gpio_get_value(up->rts_gpio) != res) { - if (up->rs485.delay_rts_after_send > 0) - mdelay(up->rs485.delay_rts_after_send); + if (port->rs485.delay_rts_after_send > 0) + mdelay( + port->rs485.delay_rts_after_send); gpio_set_value(up->rts_gpio, res); } } else { @@ -353,8 +354,8 @@ static void serial_omap_stop_tx(struct uart_port *port) serial_out(up, UART_IER, up->ier); } - if ((up->rs485.flags & SER_RS485_ENABLED) && - !(up->rs485.flags & SER_RS485_RX_DURING_TX)) { + if ((port->rs485.flags & SER_RS485_ENABLED) && + !(port->rs485.flags & SER_RS485_RX_DURING_TX)) { /* * Empty the RX FIFO, we are not interested in anything * received during the half-duplex transmission. @@ -429,22 +430,22 @@ static void serial_omap_start_tx(struct uart_port *port) pm_runtime_get_sync(up->dev); /* Handle RS-485 */ - if (up->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) { /* Fire THR interrupts when FIFO is below trigger level */ up->scr &= ~OMAP_UART_SCR_TX_EMPTY; serial_out(up, UART_OMAP_SCR, up->scr); /* if rts not already enabled */ - res = (up->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; + res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; if (gpio_get_value(up->rts_gpio) != res) { gpio_set_value(up->rts_gpio, res); - if (up->rs485.delay_rts_before_send > 0) - mdelay(up->rs485.delay_rts_before_send); + if (port->rs485.delay_rts_before_send > 0) + mdelay(port->rs485.delay_rts_before_send); } } - if ((up->rs485.flags & SER_RS485_ENABLED) && - !(up->rs485.flags & SER_RS485_RX_DURING_TX)) + if ((port->rs485.flags & SER_RS485_ENABLED) && + !(port->rs485.flags & SER_RS485_RX_DURING_TX)) serial_omap_stop_rx(port); serial_omap_enable_ier_thri(up); @@ -1355,16 +1356,14 @@ static inline void serial_omap_add_console_port(struct uart_omap_port *up) #endif /* Enable or disable the rs485 support */ -static void +static int serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) { struct uart_omap_port *up = to_uart_omap_port(port); - unsigned long flags; unsigned int mode; int val; pm_runtime_get_sync(up->dev); - spin_lock_irqsave(&up->port.lock, flags); /* Disable interrupts from this port */ mode = up->ier; @@ -1372,7 +1371,7 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) serial_out(up, UART_IER, 0); /* store new config */ - up->rs485 = *rs485conf; + port->rs485 = *rs485conf; /* * Just as a precaution, only allow rs485 @@ -1380,12 +1379,12 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) */ if (gpio_is_valid(up->rts_gpio)) { /* enable / disable rts */ - val = (up->rs485.flags & SER_RS485_ENABLED) ? + val = (port->rs485.flags & SER_RS485_ENABLED) ? SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; - val = (up->rs485.flags & val) ? 1 : 0; + val = (port->rs485.flags & val) ? 1 : 0; gpio_set_value(up->rts_gpio, val); } else - up->rs485.flags &= ~SER_RS485_ENABLED; + port->rs485.flags &= ~SER_RS485_ENABLED; /* Enable interrupts */ up->ier = mode; @@ -1394,45 +1393,18 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) /* If RS-485 is disabled, make sure the THR interrupt is fired when * TX FIFO is below the trigger level. */ - if (!(up->rs485.flags & SER_RS485_ENABLED) && + if (!(port->rs485.flags & SER_RS485_ENABLED) && (up->scr & OMAP_UART_SCR_TX_EMPTY)) { up->scr &= ~OMAP_UART_SCR_TX_EMPTY; serial_out(up, UART_OMAP_SCR, up->scr); } - spin_unlock_irqrestore(&up->port.lock, flags); pm_runtime_mark_last_busy(up->dev); pm_runtime_put_autosuspend(up->dev); -} - -static int -serial_omap_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) -{ - struct serial_rs485 rs485conf; - - switch (cmd) { - case TIOCSRS485: - if (copy_from_user(&rs485conf, (void __user *) arg, - sizeof(rs485conf))) - return -EFAULT; - serial_omap_config_rs485(port, &rs485conf); - break; - - case TIOCGRS485: - if (copy_to_user((void __user *) arg, - &(to_uart_omap_port(port)->rs485), - sizeof(rs485conf))) - return -EFAULT; - break; - - default: - return -ENOIOCTLCMD; - } return 0; } - static struct uart_ops serial_omap_pops = { .tx_empty = serial_omap_tx_empty, .set_mctrl = serial_omap_set_mctrl, @@ -1453,7 +1425,6 @@ static struct uart_ops serial_omap_pops = { .request_port = serial_omap_request_port, .config_port = serial_omap_config_port, .verify_port = serial_omap_verify_port, - .ioctl = serial_omap_ioctl, #ifdef CONFIG_CONSOLE_POLL .poll_put_char = serial_omap_poll_put_char, .poll_get_char = serial_omap_poll_get_char, @@ -1587,7 +1558,7 @@ static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) static int serial_omap_probe_rs485(struct uart_omap_port *up, struct device_node *np) { - struct serial_rs485 *rs485conf = &up->rs485; + struct serial_rs485 *rs485conf = &up->port.rs485; u32 rs485_delay[2]; enum of_gpio_flags flags; int ret; @@ -1682,14 +1653,21 @@ static int serial_omap_probe(struct platform_device *pdev) up->port.ops = &serial_omap_pops; if (pdev->dev.of_node) - up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); + ret = of_alias_get_id(pdev->dev.of_node, "serial"); else - up->port.line = pdev->id; + ret = pdev->id; - if (up->port.line < 0) { + if (ret < 0) { dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", - up->port.line); - ret = -ENODEV; + ret); + goto err_port_line; + } + up->port.line = ret; + + if (up->port.line >= OMAP_MAX_HSUART_PORTS) { + dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, + OMAP_MAX_HSUART_PORTS); + ret = -ENXIO; goto err_port_line; } @@ -1702,6 +1680,7 @@ static int serial_omap_probe(struct platform_device *pdev) up->port.membase = base; up->port.flags = omap_up_info->flags; up->port.uartclk = omap_up_info->uartclk; + up->port.rs485_config = serial_omap_config_rs485; if (!up->port.uartclk) { up->port.uartclk = DEFAULT_CLK_SPEED; dev_warn(&pdev->dev, @@ -1747,8 +1726,6 @@ err_add_port: pm_runtime_disable(&pdev->dev); err_rs485: err_port_line: - dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", - pdev->id, __func__, ret); return ret; } diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c index abbfedb84901..4aca3229b7bb 100644 --- a/drivers/tty/serial/pmac_zilog.c +++ b/drivers/tty/serial/pmac_zilog.c @@ -1352,7 +1352,8 @@ static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser) static int pmz_poll_get_char(struct uart_port *port) { - struct uart_pmac_port *uap = (struct uart_pmac_port *)port; + struct uart_pmac_port *uap = + container_of(port, struct uart_pmac_port, port); int tries = 2; while (tries) { @@ -1367,7 +1368,8 @@ static int pmz_poll_get_char(struct uart_port *port) static void pmz_poll_put_char(struct uart_port *port, unsigned char c) { - struct uart_pmac_port *uap = (struct uart_pmac_port *)port; + struct uart_pmac_port *uap = + container_of(port, struct uart_pmac_port, port); /* Wait for the transmit buffer to empty. */ while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) @@ -1954,7 +1956,8 @@ static void __exit exit_pmz(void) static void pmz_console_putchar(struct uart_port *port, int ch) { - struct uart_pmac_port *uap = (struct uart_pmac_port *)port; + struct uart_pmac_port *uap = + container_of(port, struct uart_pmac_port, port); /* Wait for the transmit buffer to empty. */ while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0) diff --git a/drivers/tty/serial/pnx8xxx_uart.c b/drivers/tty/serial/pnx8xxx_uart.c index 2ba24a45c97f..9fd941460e3c 100644 --- a/drivers/tty/serial/pnx8xxx_uart.c +++ b/drivers/tty/serial/pnx8xxx_uart.c @@ -126,7 +126,8 @@ static void pnx8xxx_timeout(unsigned long data) */ static void pnx8xxx_stop_tx(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); u32 ien; /* Disable TX intr */ @@ -142,7 +143,8 @@ static void pnx8xxx_stop_tx(struct uart_port *port) */ static void pnx8xxx_start_tx(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); u32 ien; /* Clear all pending TX intr */ @@ -158,7 +160,8 @@ static void pnx8xxx_start_tx(struct uart_port *port) */ static void pnx8xxx_stop_rx(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); u32 ien; /* Disable RX intr */ @@ -174,7 +177,8 @@ static void pnx8xxx_stop_rx(struct uart_port *port) */ static void pnx8xxx_enable_ms(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); mod_timer(&sport->timer, jiffies); } @@ -313,14 +317,16 @@ static irqreturn_t pnx8xxx_int(int irq, void *dev_id) */ static unsigned int pnx8xxx_tx_empty(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); return serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA ? 0 : TIOCSER_TEMT; } static unsigned int pnx8xxx_get_mctrl(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); unsigned int mctrl = TIOCM_DSR; unsigned int msr; @@ -347,7 +353,8 @@ static void pnx8xxx_set_mctrl(struct uart_port *port, unsigned int mctrl) */ static void pnx8xxx_break_ctl(struct uart_port *port, int break_state) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); unsigned long flags; unsigned int lcr; @@ -363,7 +370,8 @@ static void pnx8xxx_break_ctl(struct uart_port *port, int break_state) static int pnx8xxx_startup(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); int retval; /* @@ -397,7 +405,8 @@ static int pnx8xxx_startup(struct uart_port *port) static void pnx8xxx_shutdown(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); int lcr; /* @@ -434,7 +443,8 @@ static void pnx8xxx_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); unsigned long flags; unsigned int lcr_fcr, old_ien, baud, quot; unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; @@ -551,7 +561,8 @@ pnx8xxx_set_termios(struct uart_port *port, struct ktermios *termios, static const char *pnx8xxx_type(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); return sport->port.type == PORT_PNX8XXX ? "PNX8XXX" : NULL; } @@ -561,7 +572,8 @@ static const char *pnx8xxx_type(struct uart_port *port) */ static void pnx8xxx_release_port(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); release_mem_region(sport->port.mapbase, UART_PORT_SIZE); } @@ -571,7 +583,8 @@ static void pnx8xxx_release_port(struct uart_port *port) */ static int pnx8xxx_request_port(struct uart_port *port) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); return request_mem_region(sport->port.mapbase, UART_PORT_SIZE, "pnx8xxx-uart") != NULL ? 0 : -EBUSY; } @@ -581,7 +594,8 @@ static int pnx8xxx_request_port(struct uart_port *port) */ static void pnx8xxx_config_port(struct uart_port *port, int flags) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); if (flags & UART_CONFIG_TYPE && pnx8xxx_request_port(&sport->port) == 0) @@ -596,7 +610,8 @@ static void pnx8xxx_config_port(struct uart_port *port, int flags) static int pnx8xxx_verify_port(struct uart_port *port, struct serial_struct *ser) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); int ret = 0; if (ser->type != PORT_UNKNOWN && ser->type != PORT_PNX8XXX) @@ -662,7 +677,8 @@ static void __init pnx8xxx_init_ports(void) static void pnx8xxx_console_putchar(struct uart_port *port, int ch) { - struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port; + struct pnx8xxx_port *sport = + container_of(port, struct pnx8xxx_port, port); int status; do { diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c index 21b7d8b86493..7788d53281a0 100644 --- a/drivers/tty/serial/pxa.c +++ b/drivers/tty/serial/pxa.c @@ -223,6 +223,7 @@ static void serial_pxa_start_tx(struct uart_port *port) } } +/* should hold up->port.lock */ static inline void check_modem_status(struct uart_pxa_port *up) { int status; @@ -255,12 +256,14 @@ static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) iir = serial_in(up, UART_IIR); if (iir & UART_IIR_NO_INT) return IRQ_NONE; + spin_lock(&up->port.lock); lsr = serial_in(up, UART_LSR); if (lsr & UART_LSR_DR) receive_chars(up, &lsr); check_modem_status(up); if (lsr & UART_LSR_THRE) transmit_chars(up); + spin_unlock(&up->port.lock); return IRQ_HANDLED; } diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c index 753d4525b367..4eb24fef4512 100644 --- a/drivers/tty/serial/sa1100.c +++ b/drivers/tty/serial/sa1100.c @@ -142,7 +142,8 @@ static void sa1100_timeout(unsigned long data) */ static void sa1100_stop_tx(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); u32 utcr3; utcr3 = UART_GET_UTCR3(sport); @@ -155,7 +156,8 @@ static void sa1100_stop_tx(struct uart_port *port) */ static void sa1100_start_tx(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); u32 utcr3; utcr3 = UART_GET_UTCR3(sport); @@ -168,7 +170,8 @@ static void sa1100_start_tx(struct uart_port *port) */ static void sa1100_stop_rx(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); u32 utcr3; utcr3 = UART_GET_UTCR3(sport); @@ -180,7 +183,8 @@ static void sa1100_stop_rx(struct uart_port *port) */ static void sa1100_enable_ms(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); mod_timer(&sport->timer, jiffies); } @@ -323,7 +327,8 @@ static irqreturn_t sa1100_int(int irq, void *dev_id) */ static unsigned int sa1100_tx_empty(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT; } @@ -342,7 +347,8 @@ static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl) */ static void sa1100_break_ctl(struct uart_port *port, int break_state) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); unsigned long flags; unsigned int utcr3; @@ -358,7 +364,8 @@ static void sa1100_break_ctl(struct uart_port *port, int break_state) static int sa1100_startup(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); int retval; /* @@ -387,7 +394,8 @@ static int sa1100_startup(struct uart_port *port) static void sa1100_shutdown(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); /* * Stop our timer. @@ -409,7 +417,8 @@ static void sa1100_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); unsigned long flags; unsigned int utcr0, old_utcr3, baud, quot; unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; @@ -512,7 +521,8 @@ sa1100_set_termios(struct uart_port *port, struct ktermios *termios, static const char *sa1100_type(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); return sport->port.type == PORT_SA1100 ? "SA1100" : NULL; } @@ -522,7 +532,8 @@ static const char *sa1100_type(struct uart_port *port) */ static void sa1100_release_port(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); release_mem_region(sport->port.mapbase, UART_PORT_SIZE); } @@ -532,7 +543,8 @@ static void sa1100_release_port(struct uart_port *port) */ static int sa1100_request_port(struct uart_port *port) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); return request_mem_region(sport->port.mapbase, UART_PORT_SIZE, "sa11x0-uart") != NULL ? 0 : -EBUSY; @@ -543,7 +555,8 @@ static int sa1100_request_port(struct uart_port *port) */ static void sa1100_config_port(struct uart_port *port, int flags) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); if (flags & UART_CONFIG_TYPE && sa1100_request_port(&sport->port) == 0) @@ -558,7 +571,8 @@ static void sa1100_config_port(struct uart_port *port, int flags) static int sa1100_verify_port(struct uart_port *port, struct serial_struct *ser) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); int ret = 0; if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100) @@ -691,7 +705,8 @@ void __init sa1100_register_uart(int idx, int port) #ifdef CONFIG_SERIAL_SA1100_CONSOLE static void sa1100_console_putchar(struct uart_port *port, int ch) { - struct sa1100_port *sport = (struct sa1100_port *)port; + struct sa1100_port *sport = + container_of(port, struct sa1100_port, port); while (!(UART_GET_UTSR1(sport) & UTSR1_TNF)) barrier(); diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index c78f43a481ce..7ed76773c274 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -199,12 +199,14 @@ static void s3c24xx_serial_stop_rx(struct uart_port *port) } } -static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port) +static inline struct s3c24xx_uart_info + *s3c24xx_port_to_info(struct uart_port *port) { return to_ourport(port)->info; } -static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) +static inline struct s3c2410_uartcfg + *s3c24xx_port_to_cfg(struct uart_port *port) { struct s3c24xx_uart_port *ourport; @@ -237,7 +239,7 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id) struct uart_port *port = &ourport->port; unsigned int ufcon, ch, flag, ufstat, uerstat; unsigned long flags; - int max_count = 64; + int max_count = port->fifosize; spin_lock_irqsave(&port->lock, flags); @@ -311,14 +313,14 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id) uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch, flag); - ignore_char: +ignore_char: continue; } spin_unlock_irqrestore(&port->lock, flags); tty_flip_buffer_push(&port->state->port); - out: +out: return IRQ_HANDLED; } @@ -328,7 +330,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) struct uart_port *port = &ourport->port; struct circ_buf *xmit = &port->state->xmit; unsigned long flags; - int count = 256; + int count = port->fifosize; spin_lock_irqsave(&port->lock, flags); @@ -368,7 +370,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) if (uart_circ_empty(xmit)) s3c24xx_serial_stop_tx(port); - out: +out: spin_unlock_irqrestore(&port->lock, flags); return IRQ_HANDLED; } @@ -519,7 +521,7 @@ static int s3c24xx_serial_startup(struct uart_port *port) return ret; - err: +err: s3c24xx_serial_shutdown(port); return ret; } @@ -559,11 +561,15 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, unsigned int old) { struct s3c24xx_uart_port *ourport = to_ourport(port); + int timeout = 10000; ourport->pm_level = level; switch (level) { case 3: + while (--timeout && !s3c24xx_serial_txempty_nofifo(port)) + udelay(100); + if (!IS_ERR(ourport->baudclk)) clk_disable_unprepare(ourport->baudclk); @@ -841,8 +847,8 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, */ port->read_status_mask = S3C2410_UERSTAT_OVERRUN; if (termios->c_iflag & INPCK) - port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY; - + port->read_status_mask |= S3C2410_UERSTAT_FRAME | + S3C2410_UERSTAT_PARITY; /* * Which character status flags should we ignore? */ @@ -969,10 +975,13 @@ static struct uart_driver s3c24xx_uart_drv = { .minor = S3C24XX_SERIAL_MINOR, }; -static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = { +#define __PORT_LOCK_UNLOCKED(i) \ + __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[i].port.lock) +static struct s3c24xx_uart_port +s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = { [0] = { .port = { - .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock), + .lock = __PORT_LOCK_UNLOCKED(0), .iotype = UPIO_MEM, .uartclk = 0, .fifosize = 16, @@ -983,7 +992,7 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS }, [1] = { .port = { - .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[1].port.lock), + .lock = __PORT_LOCK_UNLOCKED(1), .iotype = UPIO_MEM, .uartclk = 0, .fifosize = 16, @@ -996,7 +1005,7 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS [2] = { .port = { - .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock), + .lock = __PORT_LOCK_UNLOCKED(2), .iotype = UPIO_MEM, .uartclk = 0, .fifosize = 16, @@ -1009,7 +1018,7 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS #if CONFIG_SERIAL_SAMSUNG_UARTS > 3 [3] = { .port = { - .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[3].port.lock), + .lock = __PORT_LOCK_UNLOCKED(3), .iotype = UPIO_MEM, .uartclk = 0, .fifosize = 16, @@ -1020,6 +1029,7 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS } #endif }; +#undef __PORT_LOCK_UNLOCKED /* s3c24xx_serial_resetport * @@ -1102,11 +1112,12 @@ static int s3c24xx_serial_cpufreq_transition(struct notifier_block *nb, s3c24xx_serial_set_termios(uport, termios, NULL); } - exit: +exit: return 0; } -static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) +static inline int +s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) { port->freq_transition.notifier_call = s3c24xx_serial_cpufreq_transition; @@ -1114,19 +1125,22 @@ static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port CPUFREQ_TRANSITION_NOTIFIER); } -static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) +static inline void +s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) { cpufreq_unregister_notifier(&port->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); } #else -static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) +static inline int +s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) { return 0; } -static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) +static inline void +s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) { } #endif @@ -1226,24 +1240,6 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, return 0; } -#ifdef CONFIG_SAMSUNG_CLOCK -static ssize_t s3c24xx_serial_show_clksrc(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct uart_port *port = s3c24xx_dev_to_port(dev); - struct s3c24xx_uart_port *ourport = to_ourport(port); - - if (IS_ERR(ourport->baudclk)) - return -EINVAL; - - return snprintf(buf, PAGE_SIZE, "* %s\n", - ourport->baudclk->name ?: "(null)"); -} - -static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL); -#endif - /* Device driver serial port probe */ static const struct of_device_id s3c24xx_uart_dt_match[]; @@ -1296,11 +1292,10 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); - if (!ourport->port.fifosize) { - ourport->port.fifosize = (ourport->info->fifosize) ? - ourport->info->fifosize : - ourport->drv_data->fifosize[index]; - } + if (ourport->drv_data->fifosize[index]) + ourport->port.fifosize = ourport->drv_data->fifosize[index]; + else if (ourport->info->fifosize) + ourport->port.fifosize = ourport->info->fifosize; probe_index++; @@ -1329,12 +1324,6 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) */ clk_disable_unprepare(ourport->clk); -#ifdef CONFIG_SAMSUNG_CLOCK - ret = device_create_file(&pdev->dev, &dev_attr_clock_source); - if (ret < 0) - dev_err(&pdev->dev, "failed to add clock source attr.\n"); -#endif - ret = s3c24xx_serial_cpufreq_register(ourport); if (ret < 0) dev_err(&pdev->dev, "failed to add cpufreq notifier\n"); @@ -1348,9 +1337,6 @@ static int s3c24xx_serial_remove(struct platform_device *dev) if (port) { s3c24xx_serial_cpufreq_deregister(to_ourport(port)); -#ifdef CONFIG_SAMSUNG_CLOCK - device_remove_file(&dev->dev, &dev_attr_clock_source); -#endif uart_remove_one_port(&s3c24xx_uart_drv, port); } diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 6246820d7f05..df9a384dfbda 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -304,8 +304,6 @@ struct sc16is7xx_one { struct uart_port port; struct work_struct tx_work; struct work_struct md_work; - - struct serial_rs485 rs485; }; struct sc16is7xx_port { @@ -657,15 +655,15 @@ static void sc16is7xx_stop_tx(struct uart_port* port) struct circ_buf *xmit = &one->port.state->xmit; /* handle rs485 */ - if (one->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) { /* do nothing if current tx not yet completed */ int lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG); if (!(lsr & SC16IS7XX_LSR_TEMT_BIT)) return; if (uart_circ_empty(xmit) && - (one->rs485.delay_rts_after_send > 0)) - mdelay(one->rs485.delay_rts_after_send); + (port->rs485.delay_rts_after_send > 0)) + mdelay(port->rs485.delay_rts_after_send); } sc16is7xx_port_update(port, SC16IS7XX_IER_REG, @@ -688,9 +686,9 @@ static void sc16is7xx_start_tx(struct uart_port *port) struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); /* handle rs485 */ - if ((one->rs485.flags & SER_RS485_ENABLED) && - (one->rs485.delay_rts_before_send > 0)) { - mdelay(one->rs485.delay_rts_before_send); + if ((port->rs485.flags & SER_RS485_ENABLED) && + (port->rs485.delay_rts_before_send > 0)) { + mdelay(port->rs485.delay_rts_before_send); } if (!work_pending(&one->tx_work)) @@ -830,51 +828,20 @@ static void sc16is7xx_set_termios(struct uart_port *port, uart_update_timeout(port, termios->c_cflag, baud); } -#if defined(TIOCSRS485) && defined(TIOCGRS485) -static void sc16is7xx_config_rs485(struct uart_port *port, +static int sc16is7xx_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) { - struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); - - one->rs485 = *rs485; - - if (one->rs485.flags & SER_RS485_ENABLED) { + if (port->rs485.flags & SER_RS485_ENABLED) sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, SC16IS7XX_EFCR_AUTO_RS485_BIT, SC16IS7XX_EFCR_AUTO_RS485_BIT); - } else { + else sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, SC16IS7XX_EFCR_AUTO_RS485_BIT, 0); - } -} -#endif - -static int sc16is7xx_ioctl(struct uart_port *port, unsigned int cmd, - unsigned long arg) -{ -#if defined(TIOCSRS485) && defined(TIOCGRS485) - struct serial_rs485 rs485; + port->rs485 = *rs485; - switch (cmd) { - case TIOCSRS485: - if (copy_from_user(&rs485, (void __user *)arg, sizeof(rs485))) - return -EFAULT; - - sc16is7xx_config_rs485(port, &rs485); - return 0; - case TIOCGRS485: - if (copy_to_user((void __user *)arg, - &(to_sc16is7xx_one(port, port)->rs485), - sizeof(rs485))) - return -EFAULT; - return 0; - default: - break; - } -#endif - - return -ENOIOCTLCMD; + return 0; } static int sc16is7xx_startup(struct uart_port *port) @@ -1000,7 +967,6 @@ static const struct uart_ops sc16is7xx_ops = { .release_port = sc16is7xx_null_void, .config_port = sc16is7xx_config_port, .verify_port = sc16is7xx_verify_port, - .ioctl = sc16is7xx_ioctl, .pm = sc16is7xx_pm, }; @@ -1130,6 +1096,7 @@ static int sc16is7xx_probe(struct device *dev, s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; s->p[i].port.iotype = UPIO_PORT; s->p[i].port.uartclk = freq; + s->p[i].port.rs485_config = sc16is7xx_config_rs485; s->p[i].port.ops = &sc16is7xx_ops; /* Disable all interrupts */ sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index 53d7c31ce098..48e6e41636b2 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -319,16 +319,16 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup, if (unlikely(lsr & TEGRA_UART_LSR_ANY)) { if (lsr & UART_LSR_OE) { /* Overrrun error */ - flag |= TTY_OVERRUN; + flag = TTY_OVERRUN; tup->uport.icount.overrun++; dev_err(tup->uport.dev, "Got overrun errors\n"); } else if (lsr & UART_LSR_PE) { /* Parity error */ - flag |= TTY_PARITY; + flag = TTY_PARITY; tup->uport.icount.parity++; dev_err(tup->uport.dev, "Got Parity errors\n"); } else if (lsr & UART_LSR_FE) { - flag |= TTY_FRAME; + flag = TTY_FRAME; tup->uport.icount.frame++; dev_err(tup->uport.dev, "Got frame errors\n"); } else if (lsr & UART_LSR_BI) { @@ -1034,6 +1034,20 @@ fail_rx_dma: return ret; } +/* + * Flush any TX data submitted for DMA and PIO. Called when the + * TX circular buffer is reset. + */ +static void tegra_uart_flush_buffer(struct uart_port *u) +{ + struct tegra_uart_port *tup = to_tegra_uport(u); + + tup->tx_bytes = 0; + if (tup->tx_dma_chan) + dmaengine_terminate_all(tup->tx_dma_chan); + return; +} + static void tegra_uart_shutdown(struct uart_port *u) { struct tegra_uart_port *tup = to_tegra_uport(u); @@ -1046,6 +1060,8 @@ static void tegra_uart_shutdown(struct uart_port *u) tegra_uart_dma_channel_free(tup, true); tegra_uart_dma_channel_free(tup, false); free_irq(u->irq, tup); + + tegra_uart_flush_buffer(u); } static void tegra_uart_enable_ms(struct uart_port *u) @@ -1174,20 +1190,6 @@ static void tegra_uart_set_termios(struct uart_port *u, return; } -/* - * Flush any TX data submitted for DMA and PIO. Called when the - * TX circular buffer is reset. - */ -static void tegra_uart_flush_buffer(struct uart_port *u) -{ - struct tegra_uart_port *tup = to_tegra_uport(u); - - tup->tx_bytes = 0; - if (tup->tx_dma_chan) - dmaengine_terminate_all(tup->tx_dma_chan); - return; -} - static const char *tegra_uart_type(struct uart_port *u) { return TEGRA_UART_TYPE; diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index eaeb9a02c7fe..57ca61b14670 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -61,7 +61,7 @@ static void uart_port_shutdown(struct tty_port *port); static int uart_dcd_enabled(struct uart_port *uport) { - return uport->status & UPSTAT_DCD_ENABLE; + return !!(uport->status & UPSTAT_DCD_ENABLE); } /* @@ -436,7 +436,7 @@ uart_get_divisor(struct uart_port *port, unsigned int baud) EXPORT_SYMBOL(uart_get_divisor); -/* FIXME: Consistent locking policy */ +/* Caller holds port mutex */ static void uart_change_speed(struct tty_struct *tty, struct uart_state *state, struct ktermios *old_termios) { @@ -537,9 +537,10 @@ static int uart_write(struct tty_struct *tty, count -= c; ret += c; } + + __uart_start(tty); spin_unlock_irqrestore(&port->lock, flags); - uart_start(tty); return ret; } @@ -618,7 +619,7 @@ static void uart_throttle(struct tty_struct *tty) { struct uart_state *state = tty->driver_data; struct uart_port *port = state->uart_port; - uint32_t mask = 0; + upf_t mask = 0; if (I_IXOFF(tty)) mask |= UPF_SOFT_FLOW; @@ -641,7 +642,7 @@ static void uart_unthrottle(struct tty_struct *tty) { struct uart_state *state = tty->driver_data; struct uart_port *port = state->uart_port; - uint32_t mask = 0; + upf_t mask = 0; if (I_IXOFF(tty)) mask |= UPF_SOFT_FLOW; @@ -1151,6 +1152,47 @@ static int uart_get_icount(struct tty_struct *tty, return 0; } +static int uart_get_rs485_config(struct uart_port *port, + struct serial_rs485 __user *rs485) +{ + unsigned long flags; + struct serial_rs485 aux; + + spin_lock_irqsave(&port->lock, flags); + aux = port->rs485; + spin_unlock_irqrestore(&port->lock, flags); + + if (copy_to_user(rs485, &aux, sizeof(aux))) + return -EFAULT; + + return 0; +} + +static int uart_set_rs485_config(struct uart_port *port, + struct serial_rs485 __user *rs485_user) +{ + struct serial_rs485 rs485; + int ret; + unsigned long flags; + + if (!port->rs485_config) + return -ENOIOCTLCMD; + + if (copy_from_user(&rs485, rs485_user, sizeof(*rs485_user))) + return -EFAULT; + + spin_lock_irqsave(&port->lock, flags); + ret = port->rs485_config(port, &rs485); + spin_unlock_irqrestore(&port->lock, flags); + if (ret) + return ret; + + if (copy_to_user(rs485_user, &port->rs485, sizeof(port->rs485))) + return -EFAULT; + + return 0; +} + /* * Called via sys_ioctl. We can use spin_lock_irq() here. */ @@ -1173,11 +1215,15 @@ uart_ioctl(struct tty_struct *tty, unsigned int cmd, break; case TIOCSSERIAL: + down_write(&tty->termios_rwsem); ret = uart_set_info_user(tty, state, uarg); + up_write(&tty->termios_rwsem); break; case TIOCSERCONFIG: + down_write(&tty->termios_rwsem); ret = uart_do_autoconfig(tty, state); + up_write(&tty->termios_rwsem); break; case TIOCSERGWILD: /* obsolete */ @@ -1217,11 +1263,19 @@ uart_ioctl(struct tty_struct *tty, unsigned int cmd, * All these rely on hardware being present and need to be * protected against the tty being hung up. */ + switch (cmd) { case TIOCSERGETLSR: /* Get line status register */ ret = uart_get_lsr_info(tty, state, uarg); break; + case TIOCGRS485: + ret = uart_get_rs485_config(state->uart_port, uarg); + break; + + case TIOCSRS485: + ret = uart_set_rs485_config(state->uart_port, uarg); + break; default: { struct uart_port *uport = state->uart_port; if (uport->ops->ioctl) @@ -1240,8 +1294,11 @@ static void uart_set_ldisc(struct tty_struct *tty) struct uart_state *state = tty->driver_data; struct uart_port *uport = state->uart_port; - if (uport->ops->set_ldisc) - uport->ops->set_ldisc(uport, tty->termios.c_line); + if (uport->ops->set_ldisc) { + mutex_lock(&state->port.mutex); + uport->ops->set_ldisc(uport, &tty->termios); + mutex_unlock(&state->port.mutex); + } } static void uart_set_termios(struct tty_struct *tty, @@ -1278,7 +1335,9 @@ static void uart_set_termios(struct tty_struct *tty, return; } + mutex_lock(&state->port.mutex); uart_change_speed(tty, state, old_termios); + mutex_unlock(&state->port.mutex); /* reload cflag from termios; port driver may have overriden flags */ cflag = tty->termios.c_cflag; @@ -1331,8 +1390,16 @@ static void uart_close(struct tty_struct *tty, struct file *filp) struct uart_port *uport; unsigned long flags; - if (!state) + if (!state) { + struct uart_driver *drv = tty->driver->driver_state; + + state = drv->state + tty->index; + port = &state->port; + spin_lock_irq(&port->lock); + --port->count; + spin_unlock_irq(&port->lock); return; + } uport = state->uart_port; port = &state->port; @@ -1361,10 +1428,6 @@ static void uart_close(struct tty_struct *tty, struct file *filp) mutex_lock(&port->mutex); uart_shutdown(tty, state); - uart_flush_buffer(tty); - - tty_ldisc_flush(tty); - tty_port_tty_set(port, NULL); tty->closing = 0; spin_lock_irqsave(&port->lock, flags); @@ -1372,8 +1435,7 @@ static void uart_close(struct tty_struct *tty, struct file *filp) if (port->blocked_open) { spin_unlock_irqrestore(&port->lock, flags); if (port->close_delay) - msleep_interruptible( - jiffies_to_msecs(port->close_delay)); + msleep_interruptible(jiffies_to_msecs(port->close_delay)); spin_lock_irqsave(&port->lock, flags); } else if (!uart_console(uport)) { spin_unlock_irqrestore(&port->lock, flags); @@ -1391,6 +1453,8 @@ static void uart_close(struct tty_struct *tty, struct file *filp) wake_up_interruptible(&port->close_wait); mutex_unlock(&port->mutex); + + tty_ldisc_flush(tty); } static void uart_wait_until_sent(struct tty_struct *tty, int timeout) @@ -1552,6 +1616,10 @@ static int uart_open(struct tty_struct *tty, struct file *filp) pr_debug("uart_open(%d) called\n", line); + spin_lock_irq(&port->lock); + ++port->count; + spin_unlock_irq(&port->lock); + /* * We take the semaphore here to guarantee that we won't be re-entered * while allocating the state structure, or while we request any IRQs @@ -1564,17 +1632,11 @@ static int uart_open(struct tty_struct *tty, struct file *filp) goto end; } - port->count++; if (!state->uart_port || state->uart_port->flags & UPF_DEAD) { retval = -ENXIO; - goto err_dec_count; + goto err_unlock; } - /* - * Once we set tty->driver_data here, we are guaranteed that - * uart_close() will decrement the driver module use count. - * Any failures from here onwards should not touch the count. - */ tty->driver_data = state; state->uart_port->state = state; state->port.low_latency = @@ -1595,8 +1657,7 @@ static int uart_open(struct tty_struct *tty, struct file *filp) end: return retval; -err_dec_count: - port->count--; +err_unlock: mutex_unlock(&port->mutex); goto end; } @@ -2092,6 +2153,7 @@ uart_report_port(struct uart_driver *drv, struct uart_port *port) break; case UPIO_MEM: case UPIO_MEM32: + case UPIO_MEM32BE: case UPIO_AU: case UPIO_TSI: snprintf(address, sizeof(address), @@ -2339,8 +2401,6 @@ int uart_register_driver(struct uart_driver *drv) tty_port_init(port); port->ops = &uart_port_ops; - port->close_delay = HZ / 2; /* .5 seconds */ - port->closing_wait = 30 * HZ;/* 30 seconds */ } retval = tty_register_driver(normal); @@ -2589,11 +2649,12 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *uport) goto out; } + /* Link the port to the driver state table and vice versa */ state->uart_port = uport; - state->pm_state = UART_PM_STATE_UNDEFINED; + uport->state = state; + state->pm_state = UART_PM_STATE_UNDEFINED; uport->cons = drv->cons; - uport->state = state; /* * If this port is a console, then the spinlock is already @@ -2736,6 +2797,7 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2) (port1->hub6 == port2->hub6); case UPIO_MEM: case UPIO_MEM32: + case UPIO_MEM32BE: case UPIO_AU: case UPIO_TSI: return (port1->mapbase == port2->mapbase); diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index eb17c7124e72..fccebbdf449f 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -1812,9 +1812,6 @@ static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, err = DIV_ROUND_CLOSEST(freq, ((br + 1) * bps * sr * (1 << (2 * c + 1)) / 1000)) - 1000; - if (err < 0) - continue; - /* Calc recv margin * M: Receive margin (%) * N: Ratio of bit rate to clock (N = sampling rate) @@ -1829,7 +1826,7 @@ static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, */ recv_margin = abs((500 - DIV_ROUND_CLOSEST(1000, sr << 1)) / 10); - if (min_err > err) { + if (abs(min_err) > abs(err)) { min_err = err; recv_max_margin = recv_margin; } else if ((min_err == err) && diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c index 4102192687ee..2f6c6b04cc8d 100644 --- a/drivers/tty/serial/sirfsoc_uart.c +++ b/drivers/tty/serial/sirfsoc_uart.c @@ -1032,10 +1032,19 @@ static void sirfsoc_uart_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) { struct sirfsoc_uart_port *sirfport = to_sirfport(port); - if (!state) + if (!state) { + if (sirfport->is_bt_uart) { + clk_prepare_enable(sirfport->clk_noc); + clk_prepare_enable(sirfport->clk_general); + } clk_prepare_enable(sirfport->clk); - else + } else { clk_disable_unprepare(sirfport->clk); + if (sirfport->is_bt_uart) { + clk_disable_unprepare(sirfport->clk_general); + clk_disable_unprepare(sirfport->clk_noc); + } + } } static int sirfsoc_uart_startup(struct uart_port *port) @@ -1378,12 +1387,26 @@ usp_no_flow_control: } port->irq = res->start; - sirfport->clk = clk_get(&pdev->dev, NULL); + sirfport->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(sirfport->clk)) { ret = PTR_ERR(sirfport->clk); goto err; } port->uartclk = clk_get_rate(sirfport->clk); + if (of_device_is_compatible(pdev->dev.of_node, "sirf,marco-bt-uart")) { + sirfport->clk_general = devm_clk_get(&pdev->dev, "general"); + if (IS_ERR(sirfport->clk_general)) { + ret = PTR_ERR(sirfport->clk_general); + goto err; + } + sirfport->clk_noc = devm_clk_get(&pdev->dev, "noc"); + if (IS_ERR(sirfport->clk_noc)) { + ret = PTR_ERR(sirfport->clk_noc); + goto err; + } + sirfport->is_bt_uart = true; + } else + sirfport->is_bt_uart = false; port->ops = &sirfsoc_uart_ops; spin_lock_init(&port->lock); @@ -1392,7 +1415,7 @@ usp_no_flow_control: ret = uart_add_one_port(&sirfsoc_uart_drv, port); if (ret != 0) { dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id); - goto port_err; + goto err; } sirfport->rx_dma_chan = dma_request_slave_channel(port->dev, "rx"); @@ -1421,8 +1444,6 @@ alloc_coherent_err: sirfport->rx_dma_items[j].xmit.buf, sirfport->rx_dma_items[j].dma_addr); dma_release_channel(sirfport->rx_dma_chan); -port_err: - clk_put(sirfport->clk); err: return ret; } @@ -1431,7 +1452,6 @@ static int sirfsoc_uart_remove(struct platform_device *pdev) { struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev); struct uart_port *port = &sirfport->port; - clk_put(sirfport->clk); uart_remove_one_port(&sirfsoc_uart_drv, port); if (sirfport->rx_dma_chan) { int i; diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h index 6a7ebf7ef130..275d03893990 100644 --- a/drivers/tty/serial/sirfsoc_uart.h +++ b/drivers/tty/serial/sirfsoc_uart.h @@ -417,6 +417,10 @@ struct sirfsoc_uart_port { struct uart_port port; struct clk *clk; + /* UART6 for BT usage in A7DA platform need multi-clock source */ + bool is_bt_uart; + struct clk *clk_general; + struct clk *clk_noc; /* for SiRFmarco, there are SET/CLR for UART_INT_EN */ bool is_marco; struct sirfsoc_uart_register *uart_reg; diff --git a/drivers/tty/serial/sunsab.c b/drivers/tty/serial/sunsab.c index b339fe4811cd..e3b43a449d46 100644 --- a/drivers/tty/serial/sunsab.c +++ b/drivers/tty/serial/sunsab.c @@ -345,7 +345,8 @@ static irqreturn_t sunsab_interrupt(int irq, void *dev_id) /* port->lock is not held. */ static unsigned int sunsab_tx_empty(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); int ret; /* Do not need a lock for a state test like this. */ @@ -360,7 +361,8 @@ static unsigned int sunsab_tx_empty(struct uart_port *port) /* port->lock held by caller. */ static void sunsab_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); if (mctrl & TIOCM_RTS) { up->cached_mode &= ~SAB82532_MODE_FRTS; @@ -383,7 +385,8 @@ static void sunsab_set_mctrl(struct uart_port *port, unsigned int mctrl) /* port->lock is held by caller and interrupts are disabled. */ static unsigned int sunsab_get_mctrl(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); unsigned char val; unsigned int result; @@ -404,7 +407,8 @@ static unsigned int sunsab_get_mctrl(struct uart_port *port) /* port->lock held by caller. */ static void sunsab_stop_tx(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); up->interrupt_mask1 |= SAB82532_IMR1_XPR; writeb(up->interrupt_mask1, &up->regs->w.imr1); @@ -432,7 +436,8 @@ static void sunsab_tx_idle(struct uart_sunsab_port *up) /* port->lock held by caller. */ static void sunsab_start_tx(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); struct circ_buf *xmit = &up->port.state->xmit; int i; @@ -465,7 +470,8 @@ static void sunsab_start_tx(struct uart_port *port) /* port->lock is not held. */ static void sunsab_send_xchar(struct uart_port *port, char ch) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); unsigned long flags; if (ch == __DISABLED_CHAR) @@ -482,7 +488,8 @@ static void sunsab_send_xchar(struct uart_port *port, char ch) /* port->lock held by caller. */ static void sunsab_stop_rx(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); up->interrupt_mask0 |= SAB82532_IMR0_TCD; writeb(up->interrupt_mask1, &up->regs->w.imr0); @@ -491,7 +498,8 @@ static void sunsab_stop_rx(struct uart_port *port) /* port->lock is not held. */ static void sunsab_break_ctl(struct uart_port *port, int break_state) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); unsigned long flags; unsigned char val; @@ -514,7 +522,8 @@ static void sunsab_break_ctl(struct uart_port *port, int break_state) /* port->lock is not held. */ static int sunsab_startup(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); unsigned long flags; unsigned char tmp; int err = request_irq(up->port.irq, sunsab_interrupt, @@ -585,7 +594,8 @@ static int sunsab_startup(struct uart_port *port) /* port->lock is not held. */ static void sunsab_shutdown(struct uart_port *port) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); unsigned long flags; spin_lock_irqsave(&up->port.lock, flags); @@ -771,7 +781,8 @@ static void sunsab_convert_to_sab(struct uart_sunsab_port *up, unsigned int cfla static void sunsab_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); unsigned long flags; unsigned int baud = uart_get_baud_rate(port, termios, old, 0, 4000000); unsigned int quot = uart_get_divisor(port, baud); @@ -840,7 +851,8 @@ static struct uart_sunsab_port *sunsab_ports; static void sunsab_console_putchar(struct uart_port *port, int c) { - struct uart_sunsab_port *up = (struct uart_sunsab_port *)port; + struct uart_sunsab_port *up = + container_of(port, struct uart_sunsab_port, port); sunsab_tec_wait(up); writeb(c, &up->regs->w.tic); diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c index 5326ae195e5f..be010f893868 100644 --- a/drivers/tty/serial/sunsu.c +++ b/drivers/tty/serial/sunsu.c @@ -264,7 +264,8 @@ static inline void __stop_tx(struct uart_sunsu_port *p) static void sunsu_stop_tx(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); __stop_tx(up); @@ -279,7 +280,8 @@ static void sunsu_stop_tx(struct uart_port *port) static void sunsu_start_tx(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); if (!(up->ier & UART_IER_THRI)) { up->ier |= UART_IER_THRI; @@ -297,7 +299,8 @@ static void sunsu_start_tx(struct uart_port *port) static void sunsu_stop_rx(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); up->ier &= ~UART_IER_RLSI; up->port.read_status_mask &= ~UART_LSR_DR; @@ -306,7 +309,8 @@ static void sunsu_stop_rx(struct uart_port *port) static void sunsu_enable_ms(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned long flags; spin_lock_irqsave(&up->port.lock, flags); @@ -543,7 +547,8 @@ static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id) static unsigned int sunsu_tx_empty(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned long flags; unsigned int ret; @@ -556,7 +561,8 @@ static unsigned int sunsu_tx_empty(struct uart_port *port) static unsigned int sunsu_get_mctrl(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned char status; unsigned int ret; @@ -576,7 +582,8 @@ static unsigned int sunsu_get_mctrl(struct uart_port *port) static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned char mcr = 0; if (mctrl & TIOCM_RTS) @@ -595,7 +602,8 @@ static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl) static void sunsu_break_ctl(struct uart_port *port, int break_state) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned long flags; spin_lock_irqsave(&up->port.lock, flags); @@ -609,7 +617,8 @@ static void sunsu_break_ctl(struct uart_port *port, int break_state) static int sunsu_startup(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned long flags; int retval; @@ -719,7 +728,8 @@ static int sunsu_startup(struct uart_port *port) static void sunsu_shutdown(struct uart_port *port) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned long flags; /* @@ -767,7 +777,8 @@ static void sunsu_change_speed(struct uart_port *port, unsigned int cflag, unsigned int iflag, unsigned int quot) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); unsigned char cval, fcr = 0; unsigned long flags; @@ -918,7 +929,8 @@ static int sunsu_request_port(struct uart_port *port) static void sunsu_config_port(struct uart_port *port, int flags) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); if (flags & UART_CONFIG_TYPE) { /* @@ -1277,7 +1289,8 @@ static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up) static void sunsu_console_putchar(struct uart_port *port, int ch) { - struct uart_sunsu_port *up = (struct uart_sunsu_port *)port; + struct uart_sunsu_port *up = + container_of(port, struct uart_sunsu_port, port); wait_for_xmitr(up); serial_out(up, UART_TX, ch); diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c index 02df3940b95e..844aae7683cc 100644 --- a/drivers/tty/serial/sunzilog.c +++ b/drivers/tty/serial/sunzilog.c @@ -644,7 +644,8 @@ static unsigned int sunzilog_get_mctrl(struct uart_port *port) /* The port lock is held and interrupts are disabled. */ static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char set_bits, clear_bits; @@ -668,7 +669,8 @@ static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) /* The port lock is held and interrupts are disabled. */ static void sunzilog_stop_tx(struct uart_port *port) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); up->flags |= SUNZILOG_FLAG_TX_STOPPED; } @@ -676,7 +678,8 @@ static void sunzilog_stop_tx(struct uart_port *port) /* The port lock is held and interrupts are disabled. */ static void sunzilog_start_tx(struct uart_port *port) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char status; @@ -736,7 +739,8 @@ static void sunzilog_stop_rx(struct uart_port *port) /* The port lock is held. */ static void sunzilog_enable_ms(struct uart_port *port) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char new_reg; @@ -752,7 +756,8 @@ static void sunzilog_enable_ms(struct uart_port *port) /* The port lock is not held. */ static void sunzilog_break_ctl(struct uart_port *port, int break_state) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); unsigned char set_bits, clear_bits, new_reg; unsigned long flags; @@ -938,7 +943,8 @@ static void sunzilog_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); unsigned long flags; int baud, brg; @@ -998,7 +1004,8 @@ static int sunzilog_verify_port(struct uart_port *port, struct serial_struct *se static int sunzilog_get_poll_char(struct uart_port *port) { unsigned char ch, r1; - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(&up->port); @@ -1032,7 +1039,8 @@ static int sunzilog_get_poll_char(struct uart_port *port) static void sunzilog_put_poll_char(struct uart_port *port, unsigned char ch) { - struct uart_sunzilog_port *up = (struct uart_sunzilog_port *)port; + struct uart_sunzilog_port *up = + container_of(port, struct uart_sunzilog_port, port); sunzilog_putchar(&up->port, ch); } diff --git a/drivers/tty/serial/timbuart.c b/drivers/tty/serial/timbuart.c index 0d11d5032b93..e9e252324fb6 100644 --- a/drivers/tty/serial/timbuart.c +++ b/drivers/tty/serial/timbuart.c @@ -273,6 +273,8 @@ static void timbuart_shutdown(struct uart_port *port) dev_dbg(port->dev, "%s\n", __func__); free_irq(port->irq, uart); iowrite32(0, port->membase + TIMBUART_IER); + + timbuart_flush_buffer(port); } static int get_bindex(int baud) diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index 200c1af2141b..542bab37e502 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -133,6 +133,15 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255"); #define CDNS_UART_IXR_BRK 0x80000000 /* + * Modem Control register: + * The read/write Modem Control register controls the interface with the modem + * or data set, or a peripheral device emulating a modem. + */ +#define CDNS_UART_MODEMCR_FCM 0x00000020 /* Automatic flow control mode */ +#define CDNS_UART_MODEMCR_RTS 0x00000002 /* Request to send output control */ +#define CDNS_UART_MODEMCR_DTR 0x00000001 /* Data Terminal Ready */ + +/* * Channel Status Register: * The channel status register (CSR) is provided to enable the control logic * to monitor the status of bits in the channel interrupt status register, @@ -915,7 +924,18 @@ static unsigned int cdns_uart_get_mctrl(struct uart_port *port) static void cdns_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) { - /* N/A */ + u32 val; + + val = cdns_uart_readl(CDNS_UART_MODEMCR_OFFSET); + + val &= ~(CDNS_UART_MODEMCR_RTS | CDNS_UART_MODEMCR_DTR); + + if (mctrl & TIOCM_RTS) + val |= CDNS_UART_MODEMCR_RTS; + if (mctrl & TIOCM_DTR) + val |= CDNS_UART_MODEMCR_DTR; + + cdns_uart_writel(val, CDNS_UART_MODEMCR_OFFSET); } #ifdef CONFIG_CONSOLE_POLL |