diff options
Diffstat (limited to 'drivers/video/fbdev')
36 files changed, 111 insertions, 1113 deletions
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index 32a2698914c3..b2c9dd4f0cb5 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -272,26 +272,6 @@ config FB_PM2_FIFO_DISCONNECT help Support the Permedia2 FIFO disconnect feature. -config FB_ARMCLCD - tristate "ARM PrimeCell PL110 support" - depends on ARM || ARM64 || COMPILE_TEST - depends on FB && ARM_AMBA && HAS_IOMEM - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - select FB_MODE_HELPERS if OF - select VIDEOMODE_HELPERS if OF - select BACKLIGHT_CLASS_DEVICE if OF - help - This framebuffer device driver is for the ARM PrimeCell PL110 - Colour LCD controller. ARM PrimeCells provide the building - blocks for System on a Chip devices. - - If you want to compile this as a module (=code which can be - inserted into and removed from the running kernel), say M - here and read <file:Documentation/kbuild/modules.rst>. The module - will be called amba-clcd. - config FB_ACORN bool "Acorn VIDC support" depends on (FB = y) && ARM && ARCH_ACORN @@ -844,7 +824,7 @@ config FB_OPENCORES systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs. The source code and specification for the core is available at - <http://opencores.org/project,vga_lcd> + <https://opencores.org/project,vga_lcd> config FB_S1D13XXX tristate "Epson S1D13XXX framebuffer support" @@ -855,7 +835,7 @@ config FB_S1D13XXX help Support for S1D13XXX framebuffer device family (currently only working with S1D13806). Product specs at - <http://vdc.epson.com/> + <https://vdc.epson.com/> config FB_ATMEL tristate "AT91 LCD Controller support" @@ -1213,7 +1193,7 @@ config FB_RADEON don't need to choose this to run the Radeon in plain VGA mode. There is a product page at - http://products.amd.com/en-us/GraphicCardResult.aspx + https://products.amd.com/en-us/GraphicCardResult.aspx config FB_RADEON_I2C bool "DDC/I2C for ATI Radeon support" @@ -1381,7 +1361,7 @@ config FB_SIS help This is the frame buffer device driver for the SiS 300, 315, 330 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets. - Specs available at <http://www.sis.com> and <http://www.xgitech.com>. + Specs available at <https://www.sis.com> and <http://www.xgitech.com>. To compile this driver as a module, choose M here; the module will be called sisfb. diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index a0705b99e643..cad4fb64442a 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -75,7 +75,6 @@ obj-$(CONFIG_FB_HIT) += hitfb.o obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o obj-$(CONFIG_FB_PVR2) += pvr2fb.o obj-$(CONFIG_FB_VOODOO1) += sstfb.o -obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o obj-$(CONFIG_FB_68328) += 68328fb.o obj-$(CONFIG_FB_GBE) += gbefb.o diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c deleted file mode 100644 index c3d55fc6c4e0..000000000000 --- a/drivers/video/fbdev/amba-clcd.c +++ /dev/null @@ -1,989 +0,0 @@ -/* - * linux/drivers/video/amba-clcd.c - * - * Copyright (C) 2001 ARM Limited, by David A Rusling - * Updated to 2.5, Deep Blue Solutions Ltd. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - * - * ARM PrimeCell PL110 Color LCD Controller - */ -#include <linux/amba/bus.h> -#include <linux/amba/clcd.h> -#include <linux/backlight.h> -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/dma-mapping.h> -#include <linux/fb.h> -#include <linux/init.h> -#include <linux/ioport.h> -#include <linux/list.h> -#include <linux/mm.h> -#include <linux/module.h> -#include <linux/of_address.h> -#include <linux/of_graph.h> -#include <linux/slab.h> -#include <linux/string.h> -#include <video/display_timing.h> -#include <video/of_display_timing.h> -#include <video/videomode.h> - -#define to_clcd(info) container_of(info, struct clcd_fb, fb) - -/* This is limited to 16 characters when displayed by X startup */ -static const char *clcd_name = "CLCD FB"; - -/* - * Unfortunately, the enable/disable functions may be called either from - * process or IRQ context, and we _need_ to delay. This is _not_ good. - */ -static inline void clcdfb_sleep(unsigned int ms) -{ - if (in_atomic()) { - mdelay(ms); - } else { - msleep(ms); - } -} - -static inline void clcdfb_set_start(struct clcd_fb *fb) -{ - unsigned long ustart = fb->fb.fix.smem_start; - unsigned long lstart; - - ustart += fb->fb.var.yoffset * fb->fb.fix.line_length; - lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2; - - writel(ustart, fb->regs + CLCD_UBAS); - writel(lstart, fb->regs + CLCD_LBAS); -} - -static void clcdfb_disable(struct clcd_fb *fb) -{ - u32 val; - - if (fb->board->disable) - fb->board->disable(fb); - - if (fb->panel->backlight) { - fb->panel->backlight->props.power = FB_BLANK_POWERDOWN; - backlight_update_status(fb->panel->backlight); - } - - val = readl(fb->regs + fb->off_cntl); - if (val & CNTL_LCDPWR) { - val &= ~CNTL_LCDPWR; - writel(val, fb->regs + fb->off_cntl); - - clcdfb_sleep(20); - } - if (val & CNTL_LCDEN) { - val &= ~CNTL_LCDEN; - writel(val, fb->regs + fb->off_cntl); - } - - /* - * Disable CLCD clock source. - */ - if (fb->clk_enabled) { - fb->clk_enabled = false; - clk_disable(fb->clk); - } -} - -static void clcdfb_enable(struct clcd_fb *fb, u32 cntl) -{ - /* - * Enable the CLCD clock source. - */ - if (!fb->clk_enabled) { - fb->clk_enabled = true; - clk_enable(fb->clk); - } - - /* - * Bring up by first enabling.. - */ - cntl |= CNTL_LCDEN; - writel(cntl, fb->regs + fb->off_cntl); - - clcdfb_sleep(20); - - /* - * and now apply power. - */ - cntl |= CNTL_LCDPWR; - writel(cntl, fb->regs + fb->off_cntl); - - /* - * Turn on backlight - */ - if (fb->panel->backlight) { - fb->panel->backlight->props.power = FB_BLANK_UNBLANK; - backlight_update_status(fb->panel->backlight); - } - - /* - * finally, enable the interface. - */ - if (fb->board->enable) - fb->board->enable(fb); -} - -static int -clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var) -{ - u32 caps; - int ret = 0; - - if (fb->panel->caps && fb->board->caps) - caps = fb->panel->caps & fb->board->caps; - else { - /* Old way of specifying what can be used */ - caps = fb->panel->cntl & CNTL_BGR ? - CLCD_CAP_BGR : CLCD_CAP_RGB; - /* But mask out 444 modes as they weren't supported */ - caps &= ~CLCD_CAP_444; - } - - /* Only TFT panels can do RGB888/BGR888 */ - if (!(fb->panel->cntl & CNTL_LCDTFT)) - caps &= ~CLCD_CAP_888; - - memset(&var->transp, 0, sizeof(var->transp)); - - var->red.msb_right = 0; - var->green.msb_right = 0; - var->blue.msb_right = 0; - - switch (var->bits_per_pixel) { - case 1: - case 2: - case 4: - case 8: - /* If we can't do 5551, reject */ - caps &= CLCD_CAP_5551; - if (!caps) { - ret = -EINVAL; - break; - } - - var->red.length = var->bits_per_pixel; - var->red.offset = 0; - var->green.length = var->bits_per_pixel; - var->green.offset = 0; - var->blue.length = var->bits_per_pixel; - var->blue.offset = 0; - break; - - case 16: - /* If we can't do 444, 5551 or 565, reject */ - if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) { - ret = -EINVAL; - break; - } - - /* - * Green length can be 4, 5 or 6 depending whether - * we're operating in 444, 5551 or 565 mode. - */ - if (var->green.length == 4 && caps & CLCD_CAP_444) - caps &= CLCD_CAP_444; - if (var->green.length == 5 && caps & CLCD_CAP_5551) - caps &= CLCD_CAP_5551; - else if (var->green.length == 6 && caps & CLCD_CAP_565) - caps &= CLCD_CAP_565; - else { - /* - * PL110 officially only supports RGB555, - * but may be wired up to allow RGB565. - */ - if (caps & CLCD_CAP_565) { - var->green.length = 6; - caps &= CLCD_CAP_565; - } else if (caps & CLCD_CAP_5551) { - var->green.length = 5; - caps &= CLCD_CAP_5551; - } else { - var->green.length = 4; - caps &= CLCD_CAP_444; - } - } - - if (var->green.length >= 5) { - var->red.length = 5; - var->blue.length = 5; - } else { - var->red.length = 4; - var->blue.length = 4; - } - break; - case 32: - /* If we can't do 888, reject */ - caps &= CLCD_CAP_888; - if (!caps) { - ret = -EINVAL; - break; - } - - var->red.length = 8; - var->green.length = 8; - var->blue.length = 8; - break; - default: - ret = -EINVAL; - break; - } - - /* - * >= 16bpp displays have separate colour component bitfields - * encoded in the pixel data. Calculate their position from - * the bitfield length defined above. - */ - if (ret == 0 && var->bits_per_pixel >= 16) { - bool bgr, rgb; - - bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0; - rgb = caps & CLCD_CAP_RGB && var->red.offset == 0; - - if (!bgr && !rgb) - /* - * The requested format was not possible, try just - * our capabilities. One of BGR or RGB must be - * supported. - */ - bgr = caps & CLCD_CAP_BGR; - - if (bgr) { - var->blue.offset = 0; - var->green.offset = var->blue.offset + var->blue.length; - var->red.offset = var->green.offset + var->green.length; - } else { - var->red.offset = 0; - var->green.offset = var->red.offset + var->red.length; - var->blue.offset = var->green.offset + var->green.length; - } - } - - return ret; -} - -static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct clcd_fb *fb = to_clcd(info); - int ret = -EINVAL; - - if (fb->board->check) - ret = fb->board->check(fb, var); - - if (ret == 0 && - var->xres_virtual * var->bits_per_pixel / 8 * - var->yres_virtual > fb->fb.fix.smem_len) - ret = -EINVAL; - - if (ret == 0) - ret = clcdfb_set_bitfields(fb, var); - - return ret; -} - -static int clcdfb_set_par(struct fb_info *info) -{ - struct clcd_fb *fb = to_clcd(info); - struct clcd_regs regs; - - fb->fb.fix.line_length = fb->fb.var.xres_virtual * - fb->fb.var.bits_per_pixel / 8; - - if (fb->fb.var.bits_per_pixel <= 8) - fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - else - fb->fb.fix.visual = FB_VISUAL_TRUECOLOR; - - fb->board->decode(fb, ®s); - - clcdfb_disable(fb); - - writel(regs.tim0, fb->regs + CLCD_TIM0); - writel(regs.tim1, fb->regs + CLCD_TIM1); - writel(regs.tim2, fb->regs + CLCD_TIM2); - writel(regs.tim3, fb->regs + CLCD_TIM3); - - clcdfb_set_start(fb); - - clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000); - - fb->clcd_cntl = regs.cntl; - - clcdfb_enable(fb, regs.cntl); - -#ifdef DEBUG - printk(KERN_INFO - "CLCD: Registers set to\n" - " %08x %08x %08x %08x\n" - " %08x %08x %08x %08x\n", - readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1), - readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3), - readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS), - readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl)); -#endif - - return 0; -} - -static inline u32 convert_bitfield(int val, struct fb_bitfield *bf) -{ - unsigned int mask = (1 << bf->length) - 1; - - return (val >> (16 - bf->length) & mask) << bf->offset; -} - -/* - * Set a single color register. The values supplied have a 16 bit - * magnitude. Return != 0 for invalid regno. - */ -static int -clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, - unsigned int blue, unsigned int transp, struct fb_info *info) -{ - struct clcd_fb *fb = to_clcd(info); - - if (regno < 16) - fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) | - convert_bitfield(blue, &fb->fb.var.blue) | - convert_bitfield(green, &fb->fb.var.green) | - convert_bitfield(red, &fb->fb.var.red); - - if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) { - int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3); - u32 val, mask, newval; - - newval = (red >> 11) & 0x001f; - newval |= (green >> 6) & 0x03e0; - newval |= (blue >> 1) & 0x7c00; - - /* - * 3.2.11: if we're configured for big endian - * byte order, the palette entries are swapped. - */ - if (fb->clcd_cntl & CNTL_BEBO) - regno ^= 1; - - if (regno & 1) { - newval <<= 16; - mask = 0x0000ffff; - } else { - mask = 0xffff0000; - } - - val = readl(fb->regs + hw_reg) & mask; - writel(val | newval, fb->regs + hw_reg); - } - - return regno > 255; -} - -/* - * Blank the screen if blank_mode != 0, else unblank. If blank == NULL - * then the caller blanks by setting the CLUT (Color Look Up Table) to all - * black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due - * to e.g. a video mode which doesn't support it. Implements VESA suspend - * and powerdown modes on hardware that supports disabling hsync/vsync: - * blank_mode == 2: suspend vsync - * blank_mode == 3: suspend hsync - * blank_mode == 4: powerdown - */ -static int clcdfb_blank(int blank_mode, struct fb_info *info) -{ - struct clcd_fb *fb = to_clcd(info); - - if (blank_mode != 0) { - clcdfb_disable(fb); - } else { - clcdfb_enable(fb, fb->clcd_cntl); - } - return 0; -} - -static int clcdfb_mmap(struct fb_info *info, - struct vm_area_struct *vma) -{ - struct clcd_fb *fb = to_clcd(info); - unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT; - int ret = -EINVAL; - - len = info->fix.smem_len; - - if (off <= len && vma->vm_end - vma->vm_start <= len - off && - fb->board->mmap) - ret = fb->board->mmap(fb, vma); - - return ret; -} - -static const struct fb_ops clcdfb_ops = { - .owner = THIS_MODULE, - .fb_check_var = clcdfb_check_var, - .fb_set_par = clcdfb_set_par, - .fb_setcolreg = clcdfb_setcolreg, - .fb_blank = clcdfb_blank, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, - .fb_mmap = clcdfb_mmap, -}; - -static int clcdfb_register(struct clcd_fb *fb) -{ - int ret; - - /* - * ARM PL111 always has IENB at 0x1c; it's only PL110 - * which is reversed on some platforms. - */ - if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) { - fb->off_ienb = CLCD_PL111_IENB; - fb->off_cntl = CLCD_PL111_CNTL; - } else { - fb->off_ienb = CLCD_PL110_IENB; - fb->off_cntl = CLCD_PL110_CNTL; - } - - fb->clk = clk_get(&fb->dev->dev, NULL); - if (IS_ERR(fb->clk)) { - ret = PTR_ERR(fb->clk); - goto out; - } - - ret = clk_prepare(fb->clk); - if (ret) - goto free_clk; - - fb->fb.device = &fb->dev->dev; - - fb->fb.fix.mmio_start = fb->dev->res.start; - fb->fb.fix.mmio_len = resource_size(&fb->dev->res); - - fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len); - if (!fb->regs) { - printk(KERN_ERR "CLCD: unable to remap registers\n"); - ret = -ENOMEM; - goto clk_unprep; - } - - fb->fb.fbops = &clcdfb_ops; - fb->fb.flags = FBINFO_FLAG_DEFAULT; - fb->fb.pseudo_palette = fb->cmap; - - strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id)); - fb->fb.fix.type = FB_TYPE_PACKED_PIXELS; - fb->fb.fix.type_aux = 0; - fb->fb.fix.xpanstep = 0; - fb->fb.fix.ypanstep = 0; - fb->fb.fix.ywrapstep = 0; - fb->fb.fix.accel = FB_ACCEL_NONE; - - fb->fb.var.xres = fb->panel->mode.xres; - fb->fb.var.yres = fb->panel->mode.yres; - fb->fb.var.xres_virtual = fb->panel->mode.xres; - fb->fb.var.yres_virtual = fb->panel->mode.yres; - fb->fb.var.bits_per_pixel = fb->panel->bpp; - fb->fb.var.grayscale = fb->panel->grayscale; - fb->fb.var.pixclock = fb->panel->mode.pixclock; - fb->fb.var.left_margin = fb->panel->mode.left_margin; - fb->fb.var.right_margin = fb->panel->mode.right_margin; - fb->fb.var.upper_margin = fb->panel->mode.upper_margin; - fb->fb.var.lower_margin = fb->panel->mode.lower_margin; - fb->fb.var.hsync_len = fb->panel->mode.hsync_len; - fb->fb.var.vsync_len = fb->panel->mode.vsync_len; - fb->fb.var.sync = fb->panel->mode.sync; - fb->fb.var.vmode = fb->panel->mode.vmode; - fb->fb.var.activate = FB_ACTIVATE_NOW; - fb->fb.var.nonstd = 0; - fb->fb.var.height = fb->panel->height; - fb->fb.var.width = fb->panel->width; - fb->fb.var.accel_flags = 0; - - fb->fb.monspecs.hfmin = 0; - fb->fb.monspecs.hfmax = 100000; - fb->fb.monspecs.vfmin = 0; - fb->fb.monspecs.vfmax = 400; - fb->fb.monspecs.dclkmin = 1000000; - fb->fb.monspecs.dclkmax = 100000000; - - /* - * Make sure that the bitfields are set appropriately. - */ - clcdfb_set_bitfields(fb, &fb->fb.var); - - /* - * Allocate colourmap. - */ - ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0); - if (ret) - goto unmap; - - /* - * Ensure interrupts are disabled. - */ - writel(0, fb->regs + fb->off_ienb); - - fb_set_var(&fb->fb, &fb->fb.var); - - dev_info(&fb->dev->dev, "%s hardware, %s display\n", - fb->board->name, fb->panel->mode.name); - - ret = register_framebuffer(&fb->fb); - if (ret == 0) - goto out; - - printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret); - - fb_dealloc_cmap(&fb->fb.cmap); - unmap: - iounmap(fb->regs); - clk_unprep: - clk_unprepare(fb->clk); - free_clk: - clk_put(fb->clk); - out: - return ret; -} - -#ifdef CONFIG_OF -static int clcdfb_of_get_dpi_panel_mode(struct device_node *node, - struct clcd_panel *clcd_panel) -{ - int err; - struct display_timing timing; - struct videomode video; - - err = of_get_display_timing(node, "panel-timing", &timing); - if (err) { - pr_err("%pOF: problems parsing panel-timing (%d)\n", node, err); - return err; - } - - videomode_from_timing(&timing, &video); - - err = fb_videomode_from_videomode(&video, &clcd_panel->mode); - if (err) - return err; - - /* Set up some inversion flags */ - if (timing.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) - clcd_panel->tim2 |= TIM2_IPC; - else if (!(timing.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)) - /* - * To preserve backwards compatibility, the IPC (inverted - * pixel clock) flag needs to be set on any display that - * doesn't explicitly specify that the pixel clock is - * active on the negative or positive edge. - */ - clcd_panel->tim2 |= TIM2_IPC; - - if (timing.flags & DISPLAY_FLAGS_HSYNC_LOW) - clcd_panel->tim2 |= TIM2_IHS; - - if (timing.flags & DISPLAY_FLAGS_VSYNC_LOW) - clcd_panel->tim2 |= TIM2_IVS; - - if (timing.flags & DISPLAY_FLAGS_DE_LOW) - clcd_panel->tim2 |= TIM2_IOE; - - return 0; -} - -static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode) -{ - return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres, - mode->refresh); -} - -static int clcdfb_of_get_backlight(struct device_node *panel, - struct clcd_panel *clcd_panel) -{ - struct device_node *backlight; - - /* Look up the optional backlight phandle */ - backlight = of_parse_phandle(panel, "backlight", 0); - if (backlight) { - clcd_panel->backlight = of_find_backlight_by_node(backlight); - of_node_put(backlight); - - if (!clcd_panel->backlight) - return -EPROBE_DEFER; - } - return 0; -} - -static int clcdfb_of_get_mode(struct device *dev, struct device_node *panel, - struct clcd_panel *clcd_panel) -{ - int err; - struct fb_videomode *mode; - char *name; - int len; - - /* Only directly connected DPI panels supported for now */ - if (of_device_is_compatible(panel, "panel-dpi")) - err = clcdfb_of_get_dpi_panel_mode(panel, clcd_panel); - else - err = -ENOENT; - if (err) - return err; - mode = &clcd_panel->mode; - - len = clcdfb_snprintf_mode(NULL, 0, mode); - name = devm_kzalloc(dev, len + 1, GFP_KERNEL); - if (!name) - return -ENOMEM; - - clcdfb_snprintf_mode(name, len + 1, mode); - mode->name = name; - - return 0; -} - -static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0) -{ - static struct { - unsigned int part; - u32 r0, g0, b0; - u32 caps; - } panels[] = { - { 0x110, 1, 7, 13, CLCD_CAP_5551 }, - { 0x110, 0, 8, 16, CLCD_CAP_888 }, - { 0x110, 16, 8, 0, CLCD_CAP_888 }, - { 0x111, 4, 14, 20, CLCD_CAP_444 }, - { 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 }, - { 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 | - CLCD_CAP_565 }, - { 0x111, 0, 8, 16, CLCD_CAP_444 | CLCD_CAP_5551 | - CLCD_CAP_565 | CLCD_CAP_888 }, - }; - int i; - - /* Bypass pixel clock divider */ - fb->panel->tim2 |= TIM2_BCD; - - /* TFT display, vert. comp. interrupt at the start of the back porch */ - fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1); - - fb->panel->caps = 0; - - /* Match the setup with known variants */ - for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) { - if (amba_part(fb->dev) != panels[i].part) - continue; - if (g0 != panels[i].g0) - continue; - if (r0 == panels[i].r0 && b0 == panels[i].b0) - fb->panel->caps = panels[i].caps; - } - - /* - * If we actually physically connected the R lines to B and - * vice versa - */ - if (r0 != 0 && b0 == 0) - fb->panel->bgr_connection = true; - - return fb->panel->caps ? 0 : -EINVAL; -} - -static int clcdfb_of_init_display(struct clcd_fb *fb) -{ - struct device_node *endpoint, *panel; - int err; - unsigned int bpp; - u32 max_bandwidth; - u32 tft_r0b0g0[3]; - - fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL); - if (!fb->panel) - return -ENOMEM; - - /* - * Fetch the panel endpoint. - */ - endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL); - if (!endpoint) - return -ENODEV; - - panel = of_graph_get_remote_port_parent(endpoint); - if (!panel) - return -ENODEV; - - err = clcdfb_of_get_backlight(panel, fb->panel); - if (err) - return err; - - err = clcdfb_of_get_mode(&fb->dev->dev, panel, fb->panel); - if (err) - return err; - - err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth", - &max_bandwidth); - if (!err) { - /* - * max_bandwidth is in bytes per second and pixclock in - * pico-seconds, so the maximum allowed bits per pixel is - * 8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000) - * Rearrange this calculation to avoid overflow and then ensure - * result is a valid format. - */ - bpp = max_bandwidth / (1000 / 8) - / PICOS2KHZ(fb->panel->mode.pixclock); - bpp = rounddown_pow_of_two(bpp); - if (bpp > 32) - bpp = 32; - } else - bpp = 32; - fb->panel->bpp = bpp; - -#ifdef CONFIG_CPU_BIG_ENDIAN - fb->panel->cntl |= CNTL_BEBO; -#endif - fb->panel->width = -1; - fb->panel->height = -1; - - if (of_property_read_u32_array(endpoint, - "arm,pl11x,tft-r0g0b0-pads", - tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) != 0) - return -ENOENT; - - return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0], - tft_r0b0g0[1], tft_r0b0g0[2]); -} - -static int clcdfb_of_vram_setup(struct clcd_fb *fb) -{ - int err; - struct device_node *memory; - u64 size; - - err = clcdfb_of_init_display(fb); - if (err) - return err; - - memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0); - if (!memory) - return -ENODEV; - - fb->fb.screen_base = of_iomap(memory, 0); - if (!fb->fb.screen_base) - return -ENOMEM; - - fb->fb.fix.smem_start = of_translate_address(memory, - of_get_address(memory, 0, &size, NULL)); - fb->fb.fix.smem_len = size; - - return 0; -} - -static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - unsigned long off, user_size, kernel_size; - - - off = vma->vm_pgoff << PAGE_SHIFT; - user_size = vma->vm_end - vma->vm_start; - kernel_size = fb->fb.fix.smem_len; - - if (off >= kernel_size || user_size > (kernel_size - off)) - return -ENXIO; - - return remap_pfn_range(vma, vma->vm_start, - __phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff, - user_size, - pgprot_writecombine(vma->vm_page_prot)); -} - -static void clcdfb_of_vram_remove(struct clcd_fb *fb) -{ - iounmap(fb->fb.screen_base); -} - -static int clcdfb_of_dma_setup(struct clcd_fb *fb) -{ - unsigned long framesize; - dma_addr_t dma; - int err; - - err = clcdfb_of_init_display(fb); - if (err) - return err; - - framesize = PAGE_ALIGN(fb->panel->mode.xres * fb->panel->mode.yres * - fb->panel->bpp / 8); - fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize, - &dma, GFP_KERNEL); - if (!fb->fb.screen_base) - return -ENOMEM; - - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = framesize; - - return 0; -} - -static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base, - fb->fb.fix.smem_start, fb->fb.fix.smem_len); -} - -static void clcdfb_of_dma_remove(struct clcd_fb *fb) -{ - dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len, - fb->fb.screen_base, fb->fb.fix.smem_start); -} - -static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev) -{ - struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board), - GFP_KERNEL); - struct device_node *node = dev->dev.of_node; - - if (!board) - return NULL; - - board->name = of_node_full_name(node); - board->caps = CLCD_CAP_ALL; - board->check = clcdfb_check; - board->decode = clcdfb_decode; - if (of_find_property(node, "memory-region", NULL)) { - board->setup = clcdfb_of_vram_setup; - board->mmap = clcdfb_of_vram_mmap; - board->remove = clcdfb_of_vram_remove; - } else { - board->setup = clcdfb_of_dma_setup; - board->mmap = clcdfb_of_dma_mmap; - board->remove = clcdfb_of_dma_remove; - } - - return board; -} -#else -static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev) -{ - return NULL; -} -#endif - -static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id) -{ - struct clcd_board *board = dev_get_platdata(&dev->dev); - struct clcd_fb *fb; - int ret; - - if (!board) - board = clcdfb_of_get_board(dev); - - if (!board) - return -EINVAL; - - ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); - if (ret) - goto out; - - ret = amba_request_regions(dev, NULL); - if (ret) { - printk(KERN_ERR "CLCD: unable to reserve regs region\n"); - goto out; - } - - fb = kzalloc(sizeof(*fb), GFP_KERNEL); - if (!fb) { - ret = -ENOMEM; - goto free_region; - } - - fb->dev = dev; - fb->board = board; - - dev_info(&fb->dev->dev, "PL%03x designer %02x rev%u at 0x%08llx\n", - amba_part(dev), amba_manf(dev), amba_rev(dev), - (unsigned long long)dev->res.start); - - ret = fb->board->setup(fb); - if (ret) - goto free_fb; - - ret = clcdfb_register(fb); - if (ret == 0) { - amba_set_drvdata(dev, fb); - goto out; - } - - fb->board->remove(fb); - free_fb: - kfree(fb); - free_region: - amba_release_regions(dev); - out: - return ret; -} - -static int clcdfb_remove(struct amba_device *dev) -{ - struct clcd_fb *fb = amba_get_drvdata(dev); - - clcdfb_disable(fb); - unregister_framebuffer(&fb->fb); - if (fb->fb.cmap.len) - fb_dealloc_cmap(&fb->fb.cmap); - iounmap(fb->regs); - clk_unprepare(fb->clk); - clk_put(fb->clk); - - fb->board->remove(fb); - - kfree(fb); - - amba_release_regions(dev); - - return 0; -} - -static const struct amba_id clcdfb_id_table[] = { - { - .id = 0x00041110, - .mask = 0x000ffffe, - }, - { 0, 0 }, -}; - -MODULE_DEVICE_TABLE(amba, clcdfb_id_table); - -static struct amba_driver clcd_driver = { - .drv = { - .name = "clcd-pl11x", - }, - .probe = clcdfb_probe, - .remove = clcdfb_remove, - .id_table = clcdfb_id_table, -}; - -static int __init amba_clcdfb_init(void) -{ - if (fb_get_options("ambafb", NULL)) - return -ENODEV; - - return amba_driver_register(&clcd_driver); -} - -module_init(amba_clcdfb_init); - -static void __exit amba_clcdfb_exit(void) -{ - amba_driver_unregister(&clcd_driver); -} - -module_exit(amba_clcdfb_exit); - -MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/amifb.c b/drivers/video/fbdev/amifb.c index 6062104f3afb..226682550b4b 100644 --- a/drivers/video/fbdev/amifb.c +++ b/drivers/video/fbdev/amifb.c @@ -575,6 +575,12 @@ static u_short maxfmode, chipset; #define downx(x, v) ((v) & -(x)) #define modx(x, v) ((v) & ((x) - 1)) +/* + * FIXME: Use C variants of the code marked with #ifdef __mc68000__ + * in the driver. It shouldn't negatively affect the performance and + * is required for APUS support (once it is re-added to the kernel). + * Needs to be tested on the hardware though.. + */ /* if x1 is not a constant, this macro won't make real sense :-) */ #ifdef __mc68000__ #define DIVUL(x1, x2) ({int res; asm("divul %1,%2,%3": "=d" (res): \ @@ -1884,6 +1890,7 @@ static int ami_get_var_cursorinfo(struct fb_var_cursorinfo *var, | ((datawords >> 15) & 1)); datawords <<= 1; #endif + /* FIXME: check the return value + test the change */ put_user(color, data++); } if (bits > 0) { @@ -1952,6 +1959,7 @@ static int ami_set_var_cursorinfo(struct fb_var_cursorinfo *var, bits = 16; words = delta; datawords = 0; for (width = (short)var->width - 1; width >= 0; width--) { unsigned long tdata = 0; + /* FIXME: check the return value + test the change */ get_user(tdata, data); data++; #ifdef __mc68000__ diff --git a/drivers/video/fbdev/aty/aty128fb.c b/drivers/video/fbdev/aty/aty128fb.c index d05d4195acad..6fae6ad6cb77 100644 --- a/drivers/video/fbdev/aty/aty128fb.c +++ b/drivers/video/fbdev/aty/aty128fb.c @@ -384,11 +384,7 @@ static int default_lcd_on = 1; static bool mtrr = true; #ifdef CONFIG_FB_ATY128_BACKLIGHT -#ifdef CONFIG_PMAC_BACKLIGHT -static int backlight = 1; -#else -static int backlight = 0; -#endif +static int backlight = IS_BUILTIN(CONFIG_PMAC_BACKLIGHT); #endif /* PLL constants */ diff --git a/drivers/video/fbdev/aty/atyfb_base.c b/drivers/video/fbdev/aty/atyfb_base.c index b0ac895e5ac9..ad9cfe34c9ff 100644 --- a/drivers/video/fbdev/aty/atyfb_base.c +++ b/drivers/video/fbdev/aty/atyfb_base.c @@ -317,12 +317,7 @@ static int mclk; static int xclk; static int comp_sync = -1; static char *mode; - -#ifdef CONFIG_PMAC_BACKLIGHT -static int backlight = 1; -#else -static int backlight = 0; -#endif +static int backlight = IS_BUILTIN(CONFIG_PMAC_BACKLIGHT); #ifdef CONFIG_PPC static int default_vmode = VMODE_CHOOSE; diff --git a/drivers/video/fbdev/aty/radeon_base.c b/drivers/video/fbdev/aty/radeon_base.c index e116a3f9ad56..3fe509cb9b87 100644 --- a/drivers/video/fbdev/aty/radeon_base.c +++ b/drivers/video/fbdev/aty/radeon_base.c @@ -269,11 +269,7 @@ static bool force_measure_pll = 0; static bool nomtrr = 0; static bool force_sleep; static bool ignore_devlist; -#ifdef CONFIG_PMAC_BACKLIGHT -static int backlight = 1; -#else -static int backlight = 0; -#endif +static int backlight = IS_BUILTIN(CONFIG_PMAC_BACKLIGHT); /* Note about this function: we have some rare cases where we must not schedule, * this typically happen with our special "wake up early" hook which allows us to diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c index e2a490c5ae08..af9f5ab96f74 100644 --- a/drivers/video/fbdev/core/fbcon.c +++ b/drivers/video/fbdev/core/fbcon.c @@ -639,7 +639,7 @@ static void fbcon_prepare_logo(struct vc_data *vc, struct fb_info *info, GFP_KERNEL); if (save) { int i = cols < new_cols ? cols : new_cols; - scr_memsetw(save, erase, logo_lines * new_cols * 2); + scr_memsetw(save, erase, array3_size(logo_lines, new_cols, 2)); r = q - step; for (cnt = 0; cnt < logo_lines; cnt++, r += i) scr_memcpyw(save + cnt * new_cols, r, 2 * i); @@ -676,7 +676,7 @@ static void fbcon_prepare_logo(struct vc_data *vc, struct fb_info *info, q = (unsigned short *) (vc->vc_origin + vc->vc_size_row * rows); - scr_memcpyw(q, save, logo_lines * new_cols * 2); + scr_memcpyw(q, save, array3_size(logo_lines, new_cols, 2)); vc->vc_y += logo_lines; vc->vc_pos += logo_lines * vc->vc_size_row; kfree(save); diff --git a/drivers/video/fbdev/core/fbmon.c b/drivers/video/fbdev/core/fbmon.c index d62a1e43864e..1bf82dbc9e3c 100644 --- a/drivers/video/fbdev/core/fbmon.c +++ b/drivers/video/fbdev/core/fbmon.c @@ -19,7 +19,7 @@ * Generalized Timing Formula is derived from: * * GTF Spreadsheet by Andy Morrish (1/5/97) - * available at http://www.vesa.org + * available at https://www.vesa.org * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive @@ -1201,7 +1201,7 @@ static void fb_timings_dclk(struct __fb_timings *timings) * ignored and @var will be filled with the calculated timings. * * All calculations are based on the VESA GTF Spreadsheet - * available at VESA's public ftp (http://www.vesa.org). + * available at VESA's public ftp (https://www.vesa.org). * * NOTES: * The timings generated by the GTF will be different from VESA diff --git a/drivers/video/fbdev/da8xx-fb.c b/drivers/video/fbdev/da8xx-fb.c index 73c3c4c8cc12..e38c0e3f9c61 100644 --- a/drivers/video/fbdev/da8xx-fb.c +++ b/drivers/video/fbdev/da8xx-fb.c @@ -1402,14 +1402,14 @@ static int fb_probe(struct platform_device *device) if (IS_ERR(par->lcd_supply)) { if (PTR_ERR(par->lcd_supply) == -EPROBE_DEFER) { ret = -EPROBE_DEFER; - goto err_pm_runtime_disable; + goto err_release_fb; } par->lcd_supply = NULL; } else { ret = regulator_enable(par->lcd_supply); if (ret) - goto err_pm_runtime_disable; + goto err_release_fb; } fb_videomode_to_var(&da8xx_fb_var, lcdc_info); diff --git a/drivers/video/fbdev/ep93xx-fb.c b/drivers/video/fbdev/ep93xx-fb.c index cda2ef337423..ba33b4dce0df 100644 --- a/drivers/video/fbdev/ep93xx-fb.c +++ b/drivers/video/fbdev/ep93xx-fb.c @@ -430,7 +430,7 @@ static int ep93xxfb_alloc_videomem(struct fb_info *info) /* * There is a bug in the ep93xx framebuffer which causes problems * if bit 27 of the physical address is set. - * See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2 + * See: https://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2 * There does not seem to be any official errata for this, but I * have confirmed the problem exists on my hardware (ep9315) at * least. diff --git a/drivers/video/fbdev/grvga.c b/drivers/video/fbdev/grvga.c index 07dda03e0957..24818b276241 100644 --- a/drivers/video/fbdev/grvga.c +++ b/drivers/video/fbdev/grvga.c @@ -5,7 +5,7 @@ * 2011 (c) Aeroflex Gaisler AB * * Full documentation of the core can be found here: - * http://www.gaisler.com/products/grlib/grip.pdf + * https://www.gaisler.com/products/grlib/grip.pdf * * Contributors: Kristoffer Glembo <kristoffer@gaisler.com> */ diff --git a/drivers/video/fbdev/macfb.c b/drivers/video/fbdev/macfb.c index e05a97662ca8..312e35c9aa6c 100644 --- a/drivers/video/fbdev/macfb.c +++ b/drivers/video/fbdev/macfb.c @@ -478,7 +478,7 @@ static int macfb_setcolreg(unsigned regno, unsigned red, unsigned green, break; /* * 24-bit colour almost doesn't exist on 68k Macs -- - * http://support.apple.com/kb/TA28634 (Old Article: 10992) + * https://support.apple.com/kb/TA28634 (Old Article: 10992) */ case 24: case 32: diff --git a/drivers/video/fbdev/metronomefb.c b/drivers/video/fbdev/metronomefb.c index a42e2eceee48..952826557a0c 100644 --- a/drivers/video/fbdev/metronomefb.c +++ b/drivers/video/fbdev/metronomefb.c @@ -10,7 +10,7 @@ * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven. * * This work was made possible by help and equipment support from E-Ink - * Corporation. http://www.eink.com/ + * Corporation. https://www.eink.com/ * * This driver is written to be used with the Metronome display controller. * It is intended to be architecture independent. A board specific driver diff --git a/drivers/video/fbdev/neofb.c b/drivers/video/fbdev/neofb.c index f5a676bfd67a..09a20d4ab35f 100644 --- a/drivers/video/fbdev/neofb.c +++ b/drivers/video/fbdev/neofb.c @@ -1819,6 +1819,7 @@ static int neo_scan_monitor(struct fb_info *info) #else printk(KERN_ERR "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n"); + kfree(info->monspecs.modedb); return -1; #endif default: diff --git a/drivers/video/fbdev/nvidia/nvidia.c b/drivers/video/fbdev/nvidia/nvidia.c index c24de9107958..c6820e21875d 100644 --- a/drivers/video/fbdev/nvidia/nvidia.c +++ b/drivers/video/fbdev/nvidia/nvidia.c @@ -74,11 +74,7 @@ static int vram = 0; static int bpp = 8; static int reverse_i2c; static bool nomtrr = false; -#ifdef CONFIG_PMAC_BACKLIGHT -static int backlight = 1; -#else -static int backlight = 0; -#endif +static int backlight = IS_BUILTIN(CONFIG_PMAC_BACKLIGHT); static char *mode_option = NULL; diff --git a/drivers/video/fbdev/omap/omapfb_main.c b/drivers/video/fbdev/omap/omapfb_main.c index 1a9d6242916e..0cbcc74fa943 100644 --- a/drivers/video/fbdev/omap/omapfb_main.c +++ b/drivers/video/fbdev/omap/omapfb_main.c @@ -34,11 +34,7 @@ static unsigned long def_vyres; static unsigned int def_rotate; static unsigned int def_mirror; -#ifdef CONFIG_FB_OMAP_MANUAL_UPDATE -static bool manual_update = 1; -#else -static bool manual_update; -#endif +static bool manual_update = IS_BUILTIN(CONFIG_FB_OMAP_MANUAL_UPDATE); static struct platform_device *fbdev_pdev; static struct lcd_panel *fbdev_panel; diff --git a/drivers/video/fbdev/omap2/omapfb/dss/Kconfig b/drivers/video/fbdev/omap2/omapfb/dss/Kconfig index 36b97fee2d57..cc81a19537d2 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/Kconfig +++ b/drivers/video/fbdev/omap2/omapfb/dss/Kconfig @@ -60,7 +60,7 @@ config FB_OMAP5_DSS_HDMI select FB_OMAP2_DSS_HDMI_COMMON help HDMI Interface for OMAP5 and similar cores. This adds the High - Definition Multimedia Interface. See http://www.hdmi.org/ for HDMI + Definition Multimedia Interface. See https://www.hdmi.org/ for HDMI specification. config FB_OMAP2_DSS_SDI @@ -79,7 +79,7 @@ config FB_OMAP2_DSS_DSI DSI is a high speed half-duplex serial interface between the host processor and a peripheral, such as a display or a framebuffer chip. - See http://www.mipi.org/ for DSI specifications. + See https://www.mipi.org/ for DSI specifications. config FB_OMAP2_DSS_MIN_FCK_PER_PCK int "Minimum FCK/PCK ratio (for scaling)" diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dispc.c b/drivers/video/fbdev/omap2/omapfb/dss/dispc.c index 4a16798b2ecd..3920a0db0390 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dispc.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc.c @@ -520,8 +520,11 @@ int dispc_runtime_get(void) DSSDBG("dispc_runtime_get\n"); r = pm_runtime_get_sync(&dispc.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; + if (WARN_ON(r < 0)) { + pm_runtime_put_sync(&dispc.pdev->dev); + return r; + } + return 0; } EXPORT_SYMBOL(dispc_runtime_get); @@ -888,7 +891,7 @@ static void dispc_ovl_set_color_mode(enum omap_plane plane, static void dispc_ovl_configure_burst_type(enum omap_plane plane, enum omap_dss_rotation_type rotation_type) { - if (dss_has_feature(FEAT_BURST_2D) == 0) + if (!dss_has_feature(FEAT_BURST_2D)) return; if (rotation_type == OMAP_DSS_ROT_TILER) diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dsi.c b/drivers/video/fbdev/omap2/omapfb/dss/dsi.c index d620376216e1..6f9c25fec994 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dsi.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/dsi.c @@ -1137,8 +1137,11 @@ static int dsi_runtime_get(struct platform_device *dsidev) DSSDBG("dsi_runtime_get\n"); r = pm_runtime_get_sync(&dsi->pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; + if (WARN_ON(r < 0)) { + pm_runtime_put_sync(&dsi->pdev->dev); + return r; + } + return 0; } static void dsi_runtime_put(struct platform_device *dsidev) diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dss.c b/drivers/video/fbdev/omap2/omapfb/dss/dss.c index 7252d22dd117..a6b1c1598040 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dss.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.c @@ -768,8 +768,11 @@ int dss_runtime_get(void) DSSDBG("dss_runtime_get\n"); r = pm_runtime_get_sync(&dss.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; + if (WARN_ON(r < 0)) { + pm_runtime_put_sync(&dss.pdev->dev); + return r; + } + return 0; } void dss_runtime_put(void) @@ -833,7 +836,7 @@ static const struct dss_features omap34xx_dss_feats = { }; static const struct dss_features omap3630_dss_feats = { - .fck_div_max = 32, + .fck_div_max = 31, .dss_fck_multiplier = 1, .parent_clk_name = "dpll4_ck", .dpi_select_source = &dss_dpi_select_source_omap2_omap3, diff --git a/drivers/video/fbdev/omap2/omapfb/dss/hdmi.h b/drivers/video/fbdev/omap2/omapfb/dss/hdmi.h index b9d4480ecfad..9a7253355f6d 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/hdmi.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi.h @@ -2,7 +2,7 @@ /* * HDMI driver definition for TI OMAP4 Processor. * - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _HDMI_H diff --git a/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c index 7060ae56c062..22f1d37a968a 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * HDMI interface DSS driver for TI's OMAP4 family of SoCs. - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/ * Authors: Yong Zhi * Mythri pk <mythripk@ti.com> */ @@ -39,9 +39,10 @@ static int hdmi_runtime_get(void) DSSDBG("hdmi_runtime_get\n"); r = pm_runtime_get_sync(&hdmi.pdev->dev); - WARN_ON(r < 0); - if (r < 0) + if (WARN_ON(r < 0)) { + pm_runtime_put_sync(&hdmi.pdev->dev); return r; + } return 0; } @@ -455,11 +456,9 @@ static void hdmi_disconnect(struct omap_dss_device *dssdev, static int hdmi_read_edid(struct omap_dss_device *dssdev, u8 *edid, int len) { - bool need_enable; + bool need_enable = !hdmi.core_enabled; int r; - need_enable = hdmi.core_enabled == false; - if (need_enable) { r = hdmi_core_enable(dssdev); if (r) diff --git a/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c index 6b79b52d5fad..7ca1803bf161 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c @@ -3,7 +3,7 @@ * ti_hdmi_4xxx_ip.c * * HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/ * Authors: Yong Zhi * Mythri pk <mythripk@ti.com> */ diff --git a/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h index f066d1f69132..b5c35277f06e 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h @@ -2,7 +2,7 @@ /* * HDMI header definition for OMAP4 HDMI core IP * - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _HDMI4_CORE_H_ diff --git a/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c index ac49531e4732..a06b6f1355bd 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c @@ -43,9 +43,10 @@ static int hdmi_runtime_get(void) DSSDBG("hdmi_runtime_get\n"); r = pm_runtime_get_sync(&hdmi.pdev->dev); - WARN_ON(r < 0); - if (r < 0) + if (WARN_ON(r < 0)) { + pm_runtime_put_sync(&hdmi.pdev->dev); return r; + } return 0; } diff --git a/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h index f10b8a283011..192c9b6e2f7b 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h @@ -2,7 +2,7 @@ /* * HDMI driver definition for TI OMAP5 processors. * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _HDMI5_CORE_H_ diff --git a/drivers/video/fbdev/omap2/omapfb/dss/venc.c b/drivers/video/fbdev/omap2/omapfb/dss/venc.c index d5404d56c922..0b0ad20afd63 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/venc.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/venc.c @@ -348,8 +348,11 @@ static int venc_runtime_get(void) DSSDBG("venc_runtime_get\n"); r = pm_runtime_get_sync(&venc.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; + if (WARN_ON(r < 0)) { + pm_runtime_put_sync(&venc.pdev->dev); + return r; + } + return 0; } static void venc_runtime_put(void) diff --git a/drivers/video/fbdev/pvr2fb.c b/drivers/video/fbdev/pvr2fb.c index f18d457175d9..2d9f69b93392 100644 --- a/drivers/video/fbdev/pvr2fb.c +++ b/drivers/video/fbdev/pvr2fb.c @@ -652,10 +652,24 @@ static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, if (!pages) return -ENOMEM; - ret = get_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages); + ret = pin_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages); if (ret < nr_pages) { - nr_pages = ret; - ret = -EINVAL; + if (ret < 0) { + /* + * Clamp the unsigned nr_pages to zero so that the + * error handling works. And leave ret at whatever + * -errno value was returned from GUP. + */ + nr_pages = 0; + } else { + nr_pages = ret; + /* + * Use -EINVAL to represent a mildly desperate guess at + * why we got fewer pages (maybe even zero pages) than + * requested. + */ + ret = -EINVAL; + } goto out_unmap; } @@ -698,9 +712,7 @@ out: ret = count; out_unmap: - for (i = 0; i < nr_pages; i++) - put_page(pages[i]); - + unpin_user_pages(pages, nr_pages); kfree(pages); return ret; diff --git a/drivers/video/fbdev/pxafb.c b/drivers/video/fbdev/pxafb.c index 00b96a78676e..a53d24fb7183 100644 --- a/drivers/video/fbdev/pxafb.c +++ b/drivers/video/fbdev/pxafb.c @@ -2305,7 +2305,7 @@ static int pxafb_probe(struct platform_device *dev) fbi->mmio_base = devm_platform_ioremap_resource(dev, 0); if (IS_ERR(fbi->mmio_base)) { dev_err(&dev->dev, "failed to get I/O memory\n"); - ret = -EBUSY; + ret = PTR_ERR(fbi->mmio_base); goto failed; } @@ -2417,8 +2417,8 @@ static int pxafb_remove(struct platform_device *dev) free_pages_exact(fbi->video_mem, fbi->video_mem_size); - dma_free_wc(&dev->dev, fbi->dma_buff_size, fbi->dma_buff, - fbi->dma_buff_phys); + dma_free_coherent(&dev->dev, fbi->dma_buff_size, fbi->dma_buff, + fbi->dma_buff_phys); return 0; } diff --git a/drivers/video/fbdev/riva/fbdev.c b/drivers/video/fbdev/riva/fbdev.c index 764ec3285e62..9b3493846f4d 100644 --- a/drivers/video/fbdev/riva/fbdev.c +++ b/drivers/video/fbdev/riva/fbdev.c @@ -202,11 +202,7 @@ static int flatpanel = -1; /* Autodetect later */ static int forceCRTC = -1; static bool noaccel = 0; static bool nomtrr = 0; -#ifdef CONFIG_PMAC_BACKLIGHT -static int backlight = 1; -#else -static int backlight = 0; -#endif +static int backlight = IS_BUILTIN(CONFIG_PMAC_BACKLIGHT); static char *mode_option = NULL; static bool strictmode = 0; diff --git a/drivers/video/fbdev/s3c2410fb.c b/drivers/video/fbdev/s3c2410fb.c index 2fb15a540167..6f8fa501583f 100644 --- a/drivers/video/fbdev/s3c2410fb.c +++ b/drivers/video/fbdev/s3c2410fb.c @@ -44,11 +44,7 @@ #include "s3c2410fb.h" /* Debugging stuff */ -#ifdef CONFIG_FB_S3C2410_DEBUG -static int debug = 1; -#else -static int debug; -#endif +static int debug = IS_BUILTIN(CONFIG_FB_S3C2410_DEBUG); #define dprintk(msg...) \ do { \ diff --git a/drivers/video/fbdev/sa1100fb.c b/drivers/video/fbdev/sa1100fb.c index 3e6e13f7a831..bda6cc313c8b 100644 --- a/drivers/video/fbdev/sa1100fb.c +++ b/drivers/video/fbdev/sa1100fb.c @@ -18,7 +18,7 @@ * Clean patches should be sent to the ARM Linux Patch System. Please see the * following web page for more information: * - * http://www.arm.linux.org.uk/developer/patches/info.shtml + * https://www.arm.linux.org.uk/developer/patches/info.shtml * * Thank you. * diff --git a/drivers/video/fbdev/savage/savagefb_driver.c b/drivers/video/fbdev/savage/savagefb_driver.c index 3c8ae87f0ea7..3fd87aeb6c79 100644 --- a/drivers/video/fbdev/savage/savagefb_driver.c +++ b/drivers/video/fbdev/savage/savagefb_driver.c @@ -2157,6 +2157,8 @@ static int savage_init_fb_info(struct fb_info *info, struct pci_dev *dev, info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_IMAGEBLIT; + else + kfree(info->pixmap.addr); } #endif return err; diff --git a/drivers/video/fbdev/sm712fb.c b/drivers/video/fbdev/sm712fb.c index 6a1b4a853d9e..bdbe9c68e274 100644 --- a/drivers/video/fbdev/sm712fb.c +++ b/drivers/video/fbdev/sm712fb.c @@ -1429,6 +1429,8 @@ static int smtc_map_smem(struct smtcfb_info *sfb, static void smtc_unmap_smem(struct smtcfb_info *sfb) { if (sfb && sfb->fb->screen_base) { + if (sfb->chip_id == 0x720) + sfb->fb->screen_base -= 0x00200000; iounmap(sfb->fb->screen_base); sfb->fb->screen_base = NULL; } @@ -1614,7 +1616,7 @@ static int smtcfb_pci_probe(struct pci_dev *pdev, default: dev_err(&pdev->dev, "No valid Silicon Motion display chip was detected!\n"); - + err = -ENODEV; goto failed_fb; } diff --git a/drivers/video/fbdev/vt8623fb.c b/drivers/video/fbdev/vt8623fb.c index 7b3eef1b893f..98ff8235c9e9 100644 --- a/drivers/video/fbdev/vt8623fb.c +++ b/drivers/video/fbdev/vt8623fb.c @@ -62,24 +62,24 @@ static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, /* CRT timing register sets */ -static struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; -static struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; -static struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; -static struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; -static struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; -static struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; - -static struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; -static struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; -static struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; -static struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; -static struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; -static struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; - -static struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; -static struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; -static struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; -static struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; +static const struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; +static const struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; +static const struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; +static const struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; +static const struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; +static const struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; + +static const struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; +static const struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; +static const struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; +static const struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; +static const struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; +static const struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; + +static const struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; +static const struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; +static const struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; +static const struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; static const struct svga_timing_regs vt8623_timing_regs = { vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, |