diff options
Diffstat (limited to 'include/asm-i386')
30 files changed, 283 insertions, 139 deletions
diff --git a/include/asm-i386/acpi.h b/include/asm-i386/acpi.h index c976c1dadece..cf828ace13f9 100644 --- a/include/asm-i386/acpi.h +++ b/include/asm-i386/acpi.h @@ -28,6 +28,8 @@ #ifdef __KERNEL__ +#include <acpi/pdc_intel.h> + #include <asm/system.h> /* defines cmpxchg */ #define COMPILER_DEPENDENT_INT64 long long @@ -101,12 +103,6 @@ __acpi_release_global_lock (unsigned int *lock) :"=r"(n_hi), "=r"(n_lo) \ :"0"(n_hi), "1"(n_lo)) -/* - * Refer Intel ACPI _PDC support document for bit definitions - */ -#define ACPI_PDC_EST_CAPABILITY_SMP 0xa -#define ACPI_PDC_EST_CAPABILITY_MSR 0x1 - #ifdef CONFIG_ACPI_BOOT extern int acpi_lapic; extern int acpi_ioapic; @@ -185,6 +181,8 @@ extern void acpi_reserve_bootmem(void); extern u8 x86_acpiid_to_apicid[]; +#define ARCH_HAS_POWER_PDC_INIT 1 + #endif /*__KERNEL__*/ #endif /*_ASM_ACPI_H*/ diff --git a/include/asm-i386/agp.h b/include/asm-i386/agp.h index b82f5f3ab887..9075083bab76 100644 --- a/include/asm-i386/agp.h +++ b/include/asm-i386/agp.h @@ -19,7 +19,7 @@ int unmap_page_from_agp(struct page *page); /* Could use CLFLUSH here if the cpu supports it. But then it would need to be called for each cacheline of the whole page so it may not be worth it. Would need a page for it. */ -#define flush_agp_cache() asm volatile("wbinvd":::"memory") +#define flush_agp_cache() wbinvd() /* Convert a physical address to an address suitable for the GART. */ #define phys_to_gart(x) (x) diff --git a/include/asm-i386/apicdef.h b/include/asm-i386/apicdef.h index 0fed5e3c699c..03185cef8e0a 100644 --- a/include/asm-i386/apicdef.h +++ b/include/asm-i386/apicdef.h @@ -16,6 +16,7 @@ #define GET_APIC_VERSION(x) ((x)&0xFF) #define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF) #define APIC_INTEGRATED(x) ((x)&0xF0) +#define APIC_XAPIC(x) ((x) >= 0x14) #define APIC_TASKPRI 0x80 #define APIC_TPRI_MASK 0xFF #define APIC_ARBPRI 0x90 @@ -109,11 +110,7 @@ #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) -#ifdef CONFIG_NUMA - #define MAX_IO_APICS 32 -#else - #define MAX_IO_APICS 8 -#endif +#define MAX_IO_APICS 64 /* * the local APIC register structure, memory mapped. Not terribly well diff --git a/include/asm-i386/bitops.h b/include/asm-i386/bitops.h index 9db0b712d57a..ddf1739dc7fd 100644 --- a/include/asm-i386/bitops.h +++ b/include/asm-i386/bitops.h @@ -311,6 +311,20 @@ static inline int find_first_zero_bit(const unsigned long *addr, unsigned size) int find_next_zero_bit(const unsigned long *addr, int size, int offset); /** + * __ffs - find first bit in word. + * @word: The word to search + * + * Undefined if no bit exists, so code should check against 0 first. + */ +static inline unsigned long __ffs(unsigned long word) +{ + __asm__("bsfl %1,%0" + :"=r" (word) + :"rm" (word)); + return word; +} + +/** * find_first_bit - find the first set bit in a memory region * @addr: The address to start the search at * @size: The maximum size to search @@ -320,22 +334,15 @@ int find_next_zero_bit(const unsigned long *addr, int size, int offset); */ static inline int find_first_bit(const unsigned long *addr, unsigned size) { - int d0, d1; - int res; - - /* This looks at memory. Mark it volatile to tell gcc not to move it around */ - __asm__ __volatile__( - "xorl %%eax,%%eax\n\t" - "repe; scasl\n\t" - "jz 1f\n\t" - "leal -4(%%edi),%%edi\n\t" - "bsfl (%%edi),%%eax\n" - "1:\tsubl %%ebx,%%edi\n\t" - "shll $3,%%edi\n\t" - "addl %%edi,%%eax" - :"=a" (res), "=&c" (d0), "=&D" (d1) - :"1" ((size + 31) >> 5), "2" (addr), "b" (addr) : "memory"); - return res; + int x = 0; + + while (x < size) { + unsigned long val = *addr++; + if (val) + return __ffs(val) + x; + x += (sizeof(*addr)<<3); + } + return x; } /** @@ -360,20 +367,6 @@ static inline unsigned long ffz(unsigned long word) return word; } -/** - * __ffs - find first bit in word. - * @word: The word to search - * - * Undefined if no bit exists, so code should check against 0 first. - */ -static inline unsigned long __ffs(unsigned long word) -{ - __asm__("bsfl %1,%0" - :"=r" (word) - :"rm" (word)); - return word; -} - /* * fls: find last bit set. */ diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h index 6789fc275da3..ea54540638d2 100644 --- a/include/asm-i386/bugs.h +++ b/include/asm-i386/bugs.h @@ -118,7 +118,10 @@ static void __init check_hlt(void) printk("disabled\n"); return; } - __asm__ __volatile__("hlt ; hlt ; hlt ; hlt"); + halt(); + halt(); + halt(); + halt(); printk("OK.\n"); } diff --git a/include/asm-i386/checksum.h b/include/asm-i386/checksum.h index f949e44c2a35..67d3630c4e89 100644 --- a/include/asm-i386/checksum.h +++ b/include/asm-i386/checksum.h @@ -83,7 +83,7 @@ static inline unsigned short ip_fast_csum(unsigned char * iph, "adcl $0, %0 ;\n" "notl %0 ;\n" "2: ;\n" - /* Since the input registers which are loaded with iph and ipl + /* Since the input registers which are loaded with iph and ihl are modified, we must also specify them as outputs, or gcc will assume they contain their original values. */ : "=r" (sum), "=r" (iph), "=r" (ihl) diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h index 11e67811a990..6df1a53c190e 100644 --- a/include/asm-i386/desc.h +++ b/include/asm-i386/desc.h @@ -27,8 +27,18 @@ struct Xgt_desc_struct { extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; -#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) -#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) +#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) +#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)) + +#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr)) +#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr)) +#define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr)) +#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt)) + +#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr)) +#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr)) +#define store_tr(tr) __asm__ ("str %0":"=mr" (tr)) +#define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt)) /* * This is the ldt that every process will get unless we need @@ -39,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr); #define _set_tssldt_desc(n,addr,limit,type) \ __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ - "movw %%ax,2(%2)\n\t" \ - "rorl $16,%%eax\n\t" \ - "movb %%al,4(%2)\n\t" \ + "movw %w1,2(%2)\n\t" \ + "rorl $16,%1\n\t" \ + "movb %b1,4(%2)\n\t" \ "movb %4,5(%2)\n\t" \ "movb $0,6(%2)\n\t" \ - "movb %%ah,7(%2)\n\t" \ - "rorl $16,%%eax" \ - : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) + "movb %h1,7(%2)\n\t" \ + "rorl $16,%1" \ + : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type)) static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) { @@ -86,6 +96,13 @@ static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size) (info)->seg_not_present == 1 && \ (info)->useable == 0 ) +static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b) +{ + __u32 *lp = (__u32 *)((char *)ldt + entry*8); + *lp = entry_a; + *(lp+1) = entry_b; +} + #if TLS_SIZE != 24 # error update this code. #endif diff --git a/include/asm-i386/emergency-restart.h b/include/asm-i386/emergency-restart.h new file mode 100644 index 000000000000..680c39563345 --- /dev/null +++ b/include/asm-i386/emergency-restart.h @@ -0,0 +1,6 @@ +#ifndef _ASM_EMERGENCY_RESTART_H +#define _ASM_EMERGENCY_RESTART_H + +extern void machine_emergency_restart(void); + +#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h index f6feb98a9397..6747006743f9 100644 --- a/include/asm-i386/i387.h +++ b/include/asm-i386/i387.h @@ -19,10 +19,21 @@ extern void mxcsr_feature_mask_init(void); extern void init_fpu(struct task_struct *); + /* * FPU lazy state save handling... */ -extern void restore_fpu( struct task_struct *tsk ); + +/* + * The "nop" is needed to make the instructions the same + * length. + */ +#define restore_fpu(tsk) \ + alternative_input( \ + "nop ; frstor %1", \ + "fxrstor %1", \ + X86_FEATURE_FXSR, \ + "m" ((tsk)->thread.i387.fxsave)) extern void kernel_fpu_begin(void); #define kernel_fpu_end() do { stts(); preempt_enable(); } while(0) @@ -32,13 +43,12 @@ extern void kernel_fpu_begin(void); */ static inline void __save_init_fpu( struct task_struct *tsk ) { - if ( cpu_has_fxsr ) { - asm volatile( "fxsave %0 ; fnclex" - : "=m" (tsk->thread.i387.fxsave) ); - } else { - asm volatile( "fnsave %0 ; fwait" - : "=m" (tsk->thread.i387.fsave) ); - } + alternative_input( + "fnsave %1 ; fwait ;" GENERIC_NOP2, + "fxsave %1 ; fnclex", + X86_FEATURE_FXSR, + "m" (tsk->thread.i387.fxsave) + :"memory"); tsk->thread_info->status &= ~TS_USEDFPU; } diff --git a/include/asm-i386/kdebug.h b/include/asm-i386/kdebug.h index b3f8d5f59d5d..316138e89910 100644 --- a/include/asm-i386/kdebug.h +++ b/include/asm-i386/kdebug.h @@ -41,9 +41,16 @@ enum die_val { DIE_PAGE_FAULT, }; -static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig) +static inline int notify_die(enum die_val val, const char *str, + struct pt_regs *regs, long err, int trap, int sig) { - struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig }; + struct die_args args = { + .regs = regs, + .str = str, + .err = err, + .trapnr = trap, + .signr = sig + }; return notifier_call_chain(&i386die_chain, val, &args); } diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-i386/mach-es7000/mach_mpparse.h index 85809e0898d7..28a84f6185a7 100644 --- a/include/asm-i386/mach-es7000/mach_mpparse.h +++ b/include/asm-i386/mach-es7000/mach_mpparse.h @@ -1,6 +1,8 @@ #ifndef __ASM_MACH_MPPARSE_H #define __ASM_MACH_MPPARSE_H +#include <linux/acpi.h> + static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, struct mpc_config_translation *translation) { @@ -12,8 +14,9 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, { } -extern int parse_unisys_oem (char *oemptr, int oem_entries); -extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length); +extern int parse_unisys_oem (char *oemptr); +extern int find_unisys_acpi_oem_table(unsigned long *oem_addr); +extern void setup_unisys(); static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid) @@ -22,18 +25,33 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, struct mp_config_oemtable *oem_table = (struct mp_config_oemtable *)mpc->mpc_oemptr; if (!strncmp(oem, "UNISYS", 6)) - return parse_unisys_oem((char *)oem_table, oem_table->oem_length); + return parse_unisys_oem((char *)oem_table); } return 0; } +static inline int es7000_check_dsdt() +{ + struct acpi_table_header *header = NULL; + if(!acpi_get_table_header_early(ACPI_DSDT, &header)) + acpi_table_print(header, 0); + if (!strncmp(header->oem_id, "UNISYS", 6)) + return 1; + return 0; +} + /* Hook from generic ACPI tables.c */ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { unsigned long oem_addr; - int oem_entries; - if (!find_unisys_acpi_oem_table(&oem_addr, &oem_entries)) - return parse_unisys_oem((char *)oem_addr, oem_entries); + if (!find_unisys_acpi_oem_table(&oem_addr)) { + if (es7000_check_dsdt()) + return parse_unisys_oem((char *)oem_addr); + else { + setup_unisys(); + return 1; + } + } return 0; } diff --git a/include/asm-i386/mach-generic/mach_apic.h b/include/asm-i386/mach-generic/mach_apic.h index b13767a4e934..d9dc039da94a 100644 --- a/include/asm-i386/mach-generic/mach_apic.h +++ b/include/asm-i386/mach-generic/mach_apic.h @@ -28,4 +28,6 @@ #define enable_apic_mode (genapic->enable_apic_mode) #define phys_pkg_id (genapic->phys_pkg_id) +extern void generic_bigsmp_probe(void); + #endif /* __ASM_MACH_APIC_H */ diff --git a/include/asm-i386/mach-visws/do_timer.h b/include/asm-i386/mach-visws/do_timer.h index 33acd50fd9a8..92d638fc8b11 100644 --- a/include/asm-i386/mach-visws/do_timer.h +++ b/include/asm-i386/mach-visws/do_timer.h @@ -1,6 +1,7 @@ /* defines for inline arch setup functions */ #include <asm/fixmap.h> +#include <asm/i8259.h> #include "cobalt.h" static inline void do_timer_interrupt_hook(struct pt_regs *regs) diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h index d9fafba075bc..d84a9c326c22 100644 --- a/include/asm-i386/mpspec.h +++ b/include/asm-i386/mpspec.h @@ -11,6 +11,7 @@ extern int mp_bus_id_to_local [MAX_MP_BUSSES]; extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES]; +extern unsigned int def_to_bigsmp; extern unsigned int boot_cpu_physical_apicid; extern int smp_found_config; extern void find_smp_config (void); diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h index c76fce8badbb..62b76cd96957 100644 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h @@ -47,6 +47,21 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\ ret__; }) +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ int ret__; \ + asm volatile("2: rdmsr ; xorl %0,%0\n" \ + "1:\n\t" \ + ".section .fixup,\"ax\"\n\t" \ + "3: movl %4,%0 ; jmp 1b\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n\t" \ + " .long 2b,3b\n\t" \ + ".previous" \ + : "=r" (ret__), "=a" (*(a)), "=d" (*(b)) \ + : "c" (msr), "i" (-EFAULT));\ + ret__; }) + #define rdtsc(low,high) \ __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h index 8d93f732d72d..73296d9924fb 100644 --- a/include/asm-i386/page.h +++ b/include/asm-i386/page.h @@ -68,7 +68,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define HPAGE_MASK (~(HPAGE_SIZE - 1)) #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA -#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE #endif #define pgd_val(x) ((x).pgd) @@ -104,20 +103,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; */ extern unsigned int __VMALLOC_RESERVE; -/* Pure 2^n version of get_order */ -static __inline__ int get_order(unsigned long size) -{ - int order; - - size = (size-1) >> (PAGE_SHIFT-1); - order = -1; - do { - size >>= 1; - order++; - } while (size); - return order; -} - extern int sysctl_legacy_va_layout; extern int page_is_ram(unsigned long pagenr); @@ -156,4 +141,6 @@ extern int page_is_ram(unsigned long pagenr); #endif /* __KERNEL__ */ +#include <asm-generic/page.h> + #endif /* _I386_PAGE_H */ diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index 3561899eb826..78c85985aee3 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -27,7 +27,7 @@ void pcibios_config_init(void); struct pci_bus * pcibios_scan_root(int bus); void pcibios_set_master(struct pci_dev *dev); -void pcibios_penalize_isa_irq(int irq); +void pcibios_penalize_isa_irq(int irq, int active); struct irq_routing_table *pcibios_get_irq_routing_table(void); int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h index d609f9c2c1f0..2e3f4a344a2d 100644 --- a/include/asm-i386/pgtable-3level.h +++ b/include/asm-i386/pgtable-3level.h @@ -64,7 +64,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte) #define set_pmd(pmdptr,pmdval) \ set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval)) #define set_pud(pudptr,pudval) \ - set_64bit((unsigned long long *)(pudptr),pud_val(pudval)) + (*(pudptr) = (pudval)) /* * Pentium-II erratum A13: in PAE mode we explicitly have to flush diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index 77c6497f416e..47bc1ffa3d4c 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -86,9 +86,7 @@ void paging_init(void); #endif /* - * The 4MB page is guessing.. Detailed in the infamous "Chapter H" - * of the Pentium details, but assuming intel did the straightforward - * thing, this bit set in the page directory entry just means that + * _PAGE_PSE set in the page directory entry just means that * the page directory entry points directly to a 4MB-aligned block of * memory. */ @@ -119,8 +117,10 @@ void paging_init(void); #define _PAGE_UNUSED2 0x400 #define _PAGE_UNUSED3 0x800 -#define _PAGE_FILE 0x040 /* set:pagecache unset:swap */ -#define _PAGE_PROTNONE 0x080 /* If not present */ +/* If _PAGE_PRESENT is clear, we use these: */ +#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */ +#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE; + pte_present gives true */ #ifdef CONFIG_X86_PAE #define _PAGE_NX (1ULL<<_PAGE_BIT_NX) #else @@ -215,11 +215,13 @@ extern unsigned long pg0[]; * The following only work if pte_present() is true. * Undefined behaviour if not.. */ +#define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT) static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; } static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; } static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; } static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; } +static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; } /* * The following only works if pte_present() is not true. @@ -236,7 +238,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; } static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; } static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; } -static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; } +static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= __LARGE_PTE; return pte; } #ifdef CONFIG_X86_PAE # include <asm/pgtable-3level.h> @@ -258,12 +260,39 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low); } +static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full) +{ + pte_t pte; + if (full) { + pte = *ptep; + *ptep = __pte(0); + } else { + pte = ptep_get_and_clear(mm, addr, ptep); + } + return pte; +} + static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { clear_bit(_PAGE_BIT_RW, &ptep->pte_low); } /* + * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); + * + * dst - pointer to pgd range anwhere on a pgd page + * src - "" + * count - the number of pgds to copy. + * + * dst and src can be on the same page, but the range must not overlap, + * and must not cross a page boundary. + */ +static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) +{ + memcpy(dst, src, count * sizeof(pgd_t)); +} + +/* * Macro to mark a page protection value as "uncacheable". On processors which do not support * it, this is a no-op. */ @@ -415,6 +444,7 @@ extern void noexec_setup(const char *str); #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY #define __HAVE_ARCH_PTEP_GET_AND_CLEAR +#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL #define __HAVE_ARCH_PTEP_SET_WRPROTECT #define __HAVE_ARCH_PTE_SAME #include <asm-generic/pgtable.h> diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index 5d06e6bd6ba0..37bef8ed7bed 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h @@ -29,7 +29,7 @@ struct desc_struct { }; #define desc_empty(desc) \ - (!((desc)->a + (desc)->b)) + (!((desc)->a | (desc)->b)) #define desc_equal(desc1, desc2) \ (((desc1)->a == (desc2)->a) && ((desc1)->b == (desc2)->b)) @@ -203,9 +203,7 @@ static inline unsigned int cpuid_edx(unsigned int op) return edx; } -#define load_cr3(pgdir) \ - asm volatile("movl %0,%%cr3": :"r" (__pa(pgdir))) - +#define load_cr3(pgdir) write_cr3(__pa(pgdir)) /* * Intel CPU features in CR4 @@ -232,22 +230,20 @@ extern unsigned long mmu_cr4_features; static inline void set_in_cr4 (unsigned long mask) { + unsigned cr4; mmu_cr4_features |= mask; - __asm__("movl %%cr4,%%eax\n\t" - "orl %0,%%eax\n\t" - "movl %%eax,%%cr4\n" - : : "irg" (mask) - :"ax"); + cr4 = read_cr4(); + cr4 |= mask; + write_cr4(cr4); } static inline void clear_in_cr4 (unsigned long mask) { + unsigned cr4; mmu_cr4_features &= ~mask; - __asm__("movl %%cr4,%%eax\n\t" - "andl %0,%%eax\n\t" - "movl %%eax,%%cr4\n" - : : "irg" (~mask) - :"ax"); + cr4 = read_cr4(); + cr4 &= ~mask; + write_cr4(cr4); } /* @@ -281,6 +277,11 @@ static inline void clear_in_cr4 (unsigned long mask) outb((data), 0x23); \ } while (0) +static inline void serialize_cpu(void) +{ + __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); +} + static inline void __monitor(const void *eax, unsigned long ecx, unsigned long edx) { @@ -454,6 +455,7 @@ struct thread_struct { unsigned int saved_fs, saved_gs; /* IO permissions */ unsigned long *io_bitmap_ptr; + unsigned long iopl; /* max allowed port in the bitmap, in bytes: */ unsigned long io_bitmap_max; }; @@ -474,7 +476,6 @@ struct thread_struct { .esp0 = sizeof(init_stack) + (long)&init_stack, \ .ss0 = __KERNEL_DS, \ .ss1 = __KERNEL_CS, \ - .ldt = GDT_ENTRY_LDT, \ .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \ .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \ } @@ -511,6 +512,21 @@ static inline void load_esp0(struct tss_struct *tss, struct thread_struct *threa : /* no output */ \ :"r" (value)) +/* + * Set IOPL bits in EFLAGS from given mask + */ +static inline void set_iopl_mask(unsigned mask) +{ + unsigned int reg; + __asm__ __volatile__ ("pushfl;" + "popl %0;" + "andl %1, %0;" + "orl %2, %0;" + "pushl %0;" + "popfl" + : "=&r" (reg) + : "i" (~X86_EFLAGS_IOPL), "r" (mask)); +} /* Forward declaration, a strange C thing */ struct task_struct; diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h index eef9f93870d4..7e0f2945d17d 100644 --- a/include/asm-i386/ptrace.h +++ b/include/asm-i386/ptrace.h @@ -55,16 +55,33 @@ struct pt_regs { #define PTRACE_SET_THREAD_AREA 26 #ifdef __KERNEL__ + +#include <asm/vm86.h> + struct task_struct; extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code); -#define user_mode(regs) (3 & (regs)->xcs) -#define user_mode_vm(regs) ((VM_MASK & (regs)->eflags) || user_mode(regs)) + +/* + * user_mode_vm(regs) determines whether a register set came from user mode. + * This is true if V8086 mode was enabled OR if the register set was from + * protected mode with RPL-3 CS value. This tricky test checks that with + * one comparison. Many places in the kernel can bypass this full check + * if they have already ruled out V8086 mode, so user_mode(regs) can be used. + */ +static inline int user_mode(struct pt_regs *regs) +{ + return (regs->xcs & 3) != 0; +} +static inline int user_mode_vm(struct pt_regs *regs) +{ + return ((regs->xcs & 3) | (regs->eflags & VM_MASK)) != 0; +} #define instruction_pointer(regs) ((regs)->eip) #if defined(CONFIG_SMP) && defined(CONFIG_FRAME_POINTER) extern unsigned long profile_pc(struct pt_regs *regs); #else #define profile_pc(regs) instruction_pointer(regs) #endif -#endif +#endif /* __KERNEL__ */ #endif diff --git a/include/asm-i386/setup.h b/include/asm-i386/setup.h index 7a32184d54bf..826a8ca50ac8 100644 --- a/include/asm-i386/setup.h +++ b/include/asm-i386/setup.h @@ -44,7 +44,7 @@ extern unsigned char boot_params[PARAM_SIZE]; #define EFI_SYSTAB ((efi_system_table_t *) *((unsigned long *)(PARAM+0x1c4))) #define EFI_MEMDESC_SIZE (*((unsigned long *) (PARAM+0x1c8))) #define EFI_MEMDESC_VERSION (*((unsigned long *) (PARAM+0x1cc))) -#define EFI_MEMMAP ((efi_memory_desc_t *) *((unsigned long *)(PARAM+0x1d0))) +#define EFI_MEMMAP ((void *) *((unsigned long *)(PARAM+0x1d0))) #define EFI_MEMMAP_SIZE (*((unsigned long *) (PARAM+0x1d4))) #define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2)) #define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8)) diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h index edad9b4712fa..13250199976d 100644 --- a/include/asm-i386/smp.h +++ b/include/asm-i386/smp.h @@ -37,9 +37,6 @@ extern int smp_num_siblings; extern cpumask_t cpu_sibling_map[]; extern cpumask_t cpu_core_map[]; -extern void smp_flush_tlb(void); -extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs); -extern void smp_invalidate_rcv(void); /* Process an NMI */ extern void (*mtrr_hook) (void); extern void zap_low_mappings (void); extern void lock_ipi_call_lock(void); @@ -62,7 +59,7 @@ extern void cpu_uninit(void); extern cpumask_t cpu_callout_map; extern cpumask_t cpu_callin_map; -#define cpu_possible_map cpu_callout_map +extern cpumask_t cpu_possible_map; /* We don't mark CPUs online until __cpu_up(), so we need another measure */ static inline int num_booting_cpus(void) diff --git a/include/asm-i386/socket.h b/include/asm-i386/socket.h index 07f6b38ad140..802ae76195b7 100644 --- a/include/asm-i386/socket.h +++ b/include/asm-i386/socket.h @@ -14,6 +14,8 @@ #define SO_BROADCAST 6 #define SO_SNDBUF 7 #define SO_RCVBUF 8 +#define SO_SNDBUFFORCE 32 +#define SO_RCVBUFFORCE 33 #define SO_KEEPALIVE 9 #define SO_OOBINLINE 10 #define SO_NO_CHECK 11 diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h index 3db717a244f0..acd5c26b69ba 100644 --- a/include/asm-i386/system.h +++ b/include/asm-i386/system.h @@ -14,8 +14,7 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc #define switch_to(prev,next,last) do { \ unsigned long esi,edi; \ - asm volatile("pushfl\n\t" \ - "pushl %%ebp\n\t" \ + asm volatile("pushl %%ebp\n\t" \ "movl %%esp,%0\n\t" /* save ESP */ \ "movl %5,%%esp\n\t" /* restore ESP */ \ "movl $1f,%1\n\t" /* save EIP */ \ @@ -23,7 +22,6 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc "jmp __switch_to\n" \ "1:\t" \ "popl %%ebp\n\t" \ - "popfl" \ :"=m" (prev->thread.esp),"=m" (prev->thread.eip), \ "=a" (last),"=S" (esi),"=D" (edi) \ :"m" (next->thread.esp),"m" (next->thread.eip), \ @@ -93,13 +91,13 @@ static inline unsigned long _get_base(char * addr) ".align 4\n\t" \ ".long 1b,3b\n" \ ".previous" \ - : :"m" (value)) + : :"rm" (value)) /* * Save a segment register away */ #define savesegment(seg, value) \ - asm volatile("mov %%" #seg ",%0":"=m" (value)) + asm volatile("mov %%" #seg ",%0":"=rm" (value)) /* * Clear and set 'TS' bit respectively @@ -107,13 +105,33 @@ static inline unsigned long _get_base(char * addr) #define clts() __asm__ __volatile__ ("clts") #define read_cr0() ({ \ unsigned int __dummy; \ - __asm__( \ + __asm__ __volatile__( \ "movl %%cr0,%0\n\t" \ :"=r" (__dummy)); \ __dummy; \ }) #define write_cr0(x) \ - __asm__("movl %0,%%cr0": :"r" (x)); + __asm__ __volatile__("movl %0,%%cr0": :"r" (x)); + +#define read_cr2() ({ \ + unsigned int __dummy; \ + __asm__ __volatile__( \ + "movl %%cr2,%0\n\t" \ + :"=r" (__dummy)); \ + __dummy; \ +}) +#define write_cr2(x) \ + __asm__ __volatile__("movl %0,%%cr2": :"r" (x)); + +#define read_cr3() ({ \ + unsigned int __dummy; \ + __asm__ ( \ + "movl %%cr3,%0\n\t" \ + :"=r" (__dummy)); \ + __dummy; \ +}) +#define write_cr3(x) \ + __asm__ __volatile__("movl %0,%%cr3": :"r" (x)); #define read_cr4() ({ \ unsigned int __dummy; \ @@ -123,7 +141,7 @@ static inline unsigned long _get_base(char * addr) __dummy; \ }) #define write_cr4(x) \ - __asm__("movl %0,%%cr4": :"r" (x)); + __asm__ __volatile__("movl %0,%%cr4": :"r" (x)); #define stts() write_cr0(8 | read_cr0()) #endif /* __KERNEL__ */ @@ -447,6 +465,8 @@ struct alt_instr { #define local_irq_enable() __asm__ __volatile__("sti": : :"memory") /* used in the idle loop; sti takes one instruction cycle to complete */ #define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") +/* used when interrupts are already enabled or to shutdown the processor */ +#define halt() __asm__ __volatile__("hlt": : :"memory") #define irqs_disabled() \ ({ \ diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h index 95add81237ea..e2cb9fa6f563 100644 --- a/include/asm-i386/thread_info.h +++ b/include/asm-i386/thread_info.h @@ -139,6 +139,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__; #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ #define TIF_IRET 5 /* return with iret */ +#define TIF_SYSCALL_EMU 6 /* syscall emulation active */ #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ #define TIF_SECCOMP 8 /* secure computing */ #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ @@ -150,13 +151,15 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__; #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) #define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) #define _TIF_IRET (1<<TIF_IRET) +#define _TIF_SYSCALL_EMU (1<<TIF_SYSCALL_EMU) #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) #define _TIF_SECCOMP (1<<TIF_SECCOMP) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) /* work to do on interrupt/exception return */ #define _TIF_WORK_MASK \ - (0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|_TIF_SECCOMP)) + (0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|\ + _TIF_SECCOMP|_TIF_SYSCALL_EMU)) /* work to do on any return to u-space */ #define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP) diff --git a/include/asm-i386/timer.h b/include/asm-i386/timer.h index dcf1e07db08a..aed16437479d 100644 --- a/include/asm-i386/timer.h +++ b/include/asm-i386/timer.h @@ -1,6 +1,7 @@ #ifndef _ASMi386_TIMER_H #define _ASMi386_TIMER_H #include <linux/init.h> +#include <linux/pm.h> /** * struct timer_ops - used to define a timer source @@ -23,6 +24,8 @@ struct timer_opts { unsigned long long (*monotonic_clock)(void); void (*delay)(unsigned long); unsigned long (*read_timer)(void); + int (*suspend)(pm_message_t state); + int (*resume)(void); }; struct init_timer_opts { diff --git a/include/asm-i386/types.h b/include/asm-i386/types.h index 901b77c42b8a..ced00fe8fe61 100644 --- a/include/asm-i386/types.h +++ b/include/asm-i386/types.h @@ -63,8 +63,6 @@ typedef u64 sector_t; #define HAVE_SECTOR_T #endif -typedef unsigned short kmem_bufctl_t; - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index e25e4c71a879..a7cb377745bf 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -296,8 +296,11 @@ #define __NR_keyctl 288 #define __NR_ioprio_set 289 #define __NR_ioprio_get 290 +#define __NR_inotify_init 291 +#define __NR_inotify_add_watch 292 +#define __NR_inotify_rm_watch 293 -#define NR_syscalls 291 +#define NR_syscalls 294 /* * user-visible error numbers are in the range -1 - -128: see diff --git a/include/asm-i386/xor.h b/include/asm-i386/xor.h index f80e2dbe1b56..23c86cef3b25 100644 --- a/include/asm-i386/xor.h +++ b/include/asm-i386/xor.h @@ -535,14 +535,14 @@ static struct xor_block_template xor_block_p5_mmx = { #define XMMS_SAVE do { \ preempt_disable(); \ + cr0 = read_cr0(); \ + clts(); \ __asm__ __volatile__ ( \ - "movl %%cr0,%0 ;\n\t" \ - "clts ;\n\t" \ - "movups %%xmm0,(%1) ;\n\t" \ - "movups %%xmm1,0x10(%1) ;\n\t" \ - "movups %%xmm2,0x20(%1) ;\n\t" \ - "movups %%xmm3,0x30(%1) ;\n\t" \ - : "=&r" (cr0) \ + "movups %%xmm0,(%0) ;\n\t" \ + "movups %%xmm1,0x10(%0) ;\n\t" \ + "movups %%xmm2,0x20(%0) ;\n\t" \ + "movups %%xmm3,0x30(%0) ;\n\t" \ + : \ : "r" (xmm_save) \ : "memory"); \ } while(0) @@ -550,14 +550,14 @@ static struct xor_block_template xor_block_p5_mmx = { #define XMMS_RESTORE do { \ __asm__ __volatile__ ( \ "sfence ;\n\t" \ - "movups (%1),%%xmm0 ;\n\t" \ - "movups 0x10(%1),%%xmm1 ;\n\t" \ - "movups 0x20(%1),%%xmm2 ;\n\t" \ - "movups 0x30(%1),%%xmm3 ;\n\t" \ - "movl %0,%%cr0 ;\n\t" \ + "movups (%0),%%xmm0 ;\n\t" \ + "movups 0x10(%0),%%xmm1 ;\n\t" \ + "movups 0x20(%0),%%xmm2 ;\n\t" \ + "movups 0x30(%0),%%xmm3 ;\n\t" \ : \ - : "r" (cr0), "r" (xmm_save) \ + : "r" (xmm_save) \ : "memory"); \ + write_cr0(cr0); \ preempt_enable(); \ } while(0) |