summaryrefslogtreecommitdiffstats
path: root/include/dt-bindings/reset
diff options
context:
space:
mode:
Diffstat (limited to 'include/dt-bindings/reset')
-rw-r--r--include/dt-bindings/reset/altr,rst-mgr-s10.h108
-rw-r--r--include/dt-bindings/reset/cortina,gemini-reset.h36
-rw-r--r--include/dt-bindings/reset/sun8i-a83t-ccu.h98
-rw-r--r--include/dt-bindings/reset/sun8i-de2.h14
4 files changed, 256 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h
new file mode 100644
index 000000000000..7978c21e4fad
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2016 Intel Corporation. All rights reserved
+ * Copyright (C) 2016 Altera Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h"
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
+
+/* MPUMODRST */
+#define CPU0_RESET 0
+#define CPU1_RESET 1
+#define CPU2_RESET 2
+#define CPU3_RESET 3
+
+/* PER0MODRST */
+#define EMAC0_RESET 32
+#define EMAC1_RESET 33
+#define EMAC2_RESET 34
+#define USB0_RESET 35
+#define USB1_RESET 36
+#define NAND_RESET 37
+/* 38 is empty */
+#define SDMMC_RESET 39
+#define EMAC0_OCP_RESET 40
+#define EMAC1_OCP_RESET 41
+#define EMAC2_OCP_RESET 42
+#define USB0_OCP_RESET 43
+#define USB1_OCP_RESET 44
+#define NAND_OCP_RESET 45
+/* 46 is empty */
+#define SDMMC_OCP_RESET 47
+#define DMA_RESET 48
+#define SPIM0_RESET 49
+#define SPIM1_RESET 50
+#define SPIS0_RESET 51
+#define SPIS1_RESET 52
+#define DMA_OCP_RESET 53
+#define EMAC_PTP_RESET 54
+/* 55 is empty*/
+#define DMAIF0_RESET 56
+#define DMAIF1_RESET 57
+#define DMAIF2_RESET 58
+#define DMAIF3_RESET 59
+#define DMAIF4_RESET 60
+#define DMAIF5_RESET 61
+#define DMAIF6_RESET 62
+#define DMAIF7_RESET 63
+
+/* PER1MODRST */
+#define WATCHDOG0_RESET 64
+#define WATCHDOG1_RESET 65
+#define WATCHDOG2_RESET 66
+#define WATCHDOG3_RESET 67
+#define L4SYSTIMER0_RESET 68
+#define L4SYSTIMER1_RESET 69
+#define SPTIMER0_RESET 70
+#define SPTIMER1_RESET 71
+#define I2C0_RESET 72
+#define I2C1_RESET 73
+#define I2C2_RESET 74
+#define I2C3_RESET 75
+#define I2C4_RESET 76
+/* 77-79 is empty */
+#define UART0_RESET 80
+#define UART1_RESET 81
+/* 82-87 is empty */
+#define GPIO0_RESET 88
+#define GPIO1_RESET 89
+
+/* BRGMODRST */
+#define SOC2FPGA_RESET 96
+#define LWHPS2FPGA_RESET 97
+#define FPGA2SOC_RESET 98
+#define F2SSDRAM0_RESET 99
+#define F2SSDRAM1_RESET 100
+#define F2SSDRAM2_RESET 101
+#define DDRSCH_RESET 102
+
+/* COLDMODRST */
+#define CPUPO0_RESET 160
+#define CPUPO1_RESET 161
+#define CPUPO2_RESET 162
+#define CPUPO3_RESET 163
+/* 164-167 is empty */
+#define L2_RESET 168
+
+/* DBGMODRST */
+#define DBG_RESET 224
+#define CSDAP_RESET 225
+
+/* TAPMODRST */
+#define TAP_RESET 256
+
+#endif
diff --git a/include/dt-bindings/reset/cortina,gemini-reset.h b/include/dt-bindings/reset/cortina,gemini-reset.h
new file mode 100644
index 000000000000..0b886aee65e3
--- /dev/null
+++ b/include/dt-bindings/reset/cortina,gemini-reset.h
@@ -0,0 +1,36 @@
+#ifndef _DT_BINDINGS_RESET_CORTINA_GEMINI_H
+#define _DT_BINDINGS_RESET_CORTINA_GEMINI_H
+
+#define GEMINI_RESET_DRAM 0
+#define GEMINI_RESET_FLASH 1
+#define GEMINI_RESET_IDE 2
+#define GEMINI_RESET_RAID 3
+#define GEMINI_RESET_SECURITY 4
+#define GEMINI_RESET_GMAC0 5
+#define GEMINI_RESET_GMAC1 6
+#define GEMINI_RESET_PCI 7
+#define GEMINI_RESET_USB0 8
+#define GEMINI_RESET_USB1 9
+#define GEMINI_RESET_DMAC 10
+#define GEMINI_RESET_APB 11
+#define GEMINI_RESET_LPC 12
+#define GEMINI_RESET_LCD 13
+#define GEMINI_RESET_INTCON0 14
+#define GEMINI_RESET_INTCON1 15
+#define GEMINI_RESET_RTC 16
+#define GEMINI_RESET_TIMER 17
+#define GEMINI_RESET_UART 18
+#define GEMINI_RESET_SSP 19
+#define GEMINI_RESET_GPIO0 20
+#define GEMINI_RESET_GPIO1 21
+#define GEMINI_RESET_GPIO2 22
+#define GEMINI_RESET_WDOG 23
+#define GEMINI_RESET_EXTERN 24
+#define GEMINI_RESET_CIR 25
+#define GEMINI_RESET_SATA0 26
+#define GEMINI_RESET_SATA1 27
+#define GEMINI_RESET_TVC 28
+#define GEMINI_RESET_CPU1 30
+#define GEMINI_RESET_GLOBAL 31
+
+#endif
diff --git a/include/dt-bindings/reset/sun8i-a83t-ccu.h b/include/dt-bindings/reset/sun8i-a83t-ccu.h
new file mode 100644
index 000000000000..784f6e11664e
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-a83t-ccu.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_
+#define _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_
+
+#define RST_USB_PHY0 0
+#define RST_USB_PHY1 1
+#define RST_USB_HSIC 2
+
+#define RST_DRAM 3
+#define RST_MBUS 4
+
+#define RST_BUS_MIPI_DSI 5
+#define RST_BUS_SS 6
+#define RST_BUS_DMA 7
+#define RST_BUS_MMC0 8
+#define RST_BUS_MMC1 9
+#define RST_BUS_MMC2 10
+#define RST_BUS_NAND 11
+#define RST_BUS_DRAM 12
+#define RST_BUS_EMAC 13
+#define RST_BUS_HSTIMER 14
+#define RST_BUS_SPI0 15
+#define RST_BUS_SPI1 16
+#define RST_BUS_OTG 17
+#define RST_BUS_EHCI0 18
+#define RST_BUS_EHCI1 19
+#define RST_BUS_OHCI0 20
+
+#define RST_BUS_VE 21
+#define RST_BUS_TCON0 22
+#define RST_BUS_TCON1 23
+#define RST_BUS_CSI 24
+#define RST_BUS_HDMI0 25
+#define RST_BUS_HDMI1 26
+#define RST_BUS_DE 27
+#define RST_BUS_GPU 28
+#define RST_BUS_MSGBOX 29
+#define RST_BUS_SPINLOCK 30
+
+#define RST_BUS_LVDS 31
+
+#define RST_BUS_SPDIF 32
+#define RST_BUS_I2S0 33
+#define RST_BUS_I2S1 34
+#define RST_BUS_I2S2 35
+#define RST_BUS_TDM 36
+
+#define RST_BUS_I2C0 37
+#define RST_BUS_I2C1 38
+#define RST_BUS_I2C2 39
+#define RST_BUS_UART0 40
+#define RST_BUS_UART1 41
+#define RST_BUS_UART2 42
+#define RST_BUS_UART3 43
+#define RST_BUS_UART4 44
+
+#endif /* _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ */
diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h
new file mode 100644
index 000000000000..9526017432f0
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-de2.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _DT_BINDINGS_RESET_SUN8I_DE2_H_
+#define _DT_BINDINGS_RESET_SUN8I_DE2_H_
+
+#define RST_MIXER0 0
+#define RST_MIXER1 1
+#define RST_WB 2
+
+#endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */