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-rw-r--r--include/video/mach64.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/include/video/mach64.h b/include/video/mach64.h
index a8332e528ec1..89e91c0cb737 100644
--- a/include/video/mach64.h
+++ b/include/video/mach64.h
@@ -103,7 +103,7 @@
#define CUR_HORZ_VERT_OFF 0x0070 /* Dword offset 0_1C */
#define CUR2_HORZ_VERT_OFF 0x0070 /* Dword offset 0_1C */
-#define CONFIG_PANEL_LG 0x0074 /* Dword offset 0_1D (LG) */
+#define CNFG_PANEL_LG 0x0074 /* Dword offset 0_1D (LG) */
/* General I/O Control */
#define GP_IO 0x0078 /* Dword offset 0_1E */
@@ -146,8 +146,8 @@
#define CLOCK_SEL_CNTL 0x0090 /* Dword offset 0_24 */
/* Configuration */
-#define CONFIG_STAT1 0x0094 /* Dword offset 0_25 */
-#define CONFIG_STAT2 0x0098 /* Dword offset 0_26 */
+#define CNFG_STAT1 0x0094 /* Dword offset 0_25 */
+#define CNFG_STAT2 0x0098 /* Dword offset 0_26 */
/* Bus Control */
#define BUS_CNTL 0x00A0 /* Dword offset 0_28 */
@@ -190,9 +190,9 @@
#define POWER_MANAGEMENT_LG 0x00D8 /* Dword offset 0_36 (LG) */
/* Configuration */
-#define CONFIG_CNTL 0x00DC /* Dword offset 0_37 (CT, ET, VT) */
-#define CONFIG_CHIP_ID 0x00E0 /* Dword offset 0_38 */
-#define CONFIG_STAT0 0x00E4 /* Dword offset 0_39 */
+#define CNFG_CNTL 0x00DC /* Dword offset 0_37 (CT, ET, VT) */
+#define CNFG_CHIP_ID 0x00E0 /* Dword offset 0_38 */
+#define CNFG_STAT0 0x00E4 /* Dword offset 0_39 */
/* Test and Debug */
#define CRC_SIG 0x00E8 /* Dword offset 0_3A */
@@ -851,17 +851,17 @@
#define PLL_YCLK_CNTL 0x29
#define PM_DYN_CLK_CNTL 0x2A
-/* CONFIG_CNTL register constants */
+/* CNFG_CNTL register constants */
#define APERTURE_4M_ENABLE 1
#define APERTURE_8M_ENABLE 2
#define VGA_APERTURE_ENABLE 4
-/* CONFIG_STAT0 register constants (GX, CX) */
+/* CNFG_STAT0 register constants (GX, CX) */
#define CFG_BUS_TYPE 0x00000007
#define CFG_MEM_TYPE 0x00000038
#define CFG_INIT_DAC_TYPE 0x00000e00
-/* CONFIG_STAT0 register constants (CT, ET, VT) */
+/* CNFG_STAT0 register constants (CT, ET, VT) */
#define CFG_MEM_TYPE_xT 0x00000007
#define ISA 0
@@ -942,7 +942,7 @@
#define PCI_ATI_VENDOR_ID 0x1002
-/* CONFIG_CHIP_ID register constants */
+/* CNFG_CHIP_ID register constants */
#define CFG_CHIP_TYPE 0x0000FFFF
#define CFG_CHIP_CLASS 0x00FF0000
#define CFG_CHIP_REV 0xFF000000
@@ -951,7 +951,7 @@
#define CFG_CHIP_MINOR 0xC0000000
-/* Chip IDs read from CONFIG_CHIP_ID */
+/* Chip IDs read from CNFG_CHIP_ID */
/* mach64GX family */
#define GX_CHIP_ID 0xD7 /* mach64GX (ATI888GX00) */
@@ -1254,7 +1254,7 @@
#define CRTC2_DISPLAY_DIS 0x00000400
/* LCD register indices */
-#define CONFIG_PANEL 0x00
+#define CNFG_PANEL 0x00
#define LCD_GEN_CNTL 0x01
#define DSTN_CONTROL 0x02
#define HFB_PITCH_ADDR 0x03