diff options
Diffstat (limited to 'tools/perf/pmu-events')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/westmereep-sp/other.json | 66 | ||||
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json | 66 |
2 files changed, 66 insertions, 66 deletions
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/other.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/other.json index 23dcd554728c..67bc34984fa8 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/other.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/other.json @@ -1,29 +1,5 @@ [ { - "BriefDescription": "Early Branch Prediciton Unit clears", - "Counter": "0,1,2,3", - "EventCode": "0xE8", - "EventName": "BPU_CLEARS.EARLY", - "SampleAfterValue": "2000000", - "UMask": "0x1" - }, - { - "BriefDescription": "Late Branch Prediction Unit clears", - "Counter": "0,1,2,3", - "EventCode": "0xE8", - "EventName": "BPU_CLEARS.LATE", - "SampleAfterValue": "2000000", - "UMask": "0x2" - }, - { - "BriefDescription": "Branch prediction unit missed call or return", - "Counter": "0,1,2,3", - "EventCode": "0xE5", - "EventName": "BPU_MISSED_CALL_RET", - "SampleAfterValue": "2000000", - "UMask": "0x1" - }, - { "BriefDescription": "ES segment renames", "Counter": "0,1,2,3", "EventCode": "0xD5", @@ -128,46 +104,6 @@ "UMask": "0x1" }, { - "BriefDescription": "All RAT stall cycles", - "Counter": "0,1,2,3", - "EventCode": "0xD2", - "EventName": "RAT_STALLS.ANY", - "SampleAfterValue": "2000000", - "UMask": "0xf" - }, - { - "BriefDescription": "Flag stall cycles", - "Counter": "0,1,2,3", - "EventCode": "0xD2", - "EventName": "RAT_STALLS.FLAGS", - "SampleAfterValue": "2000000", - "UMask": "0x1" - }, - { - "BriefDescription": "Partial register stall cycles", - "Counter": "0,1,2,3", - "EventCode": "0xD2", - "EventName": "RAT_STALLS.REGISTERS", - "SampleAfterValue": "2000000", - "UMask": "0x2" - }, - { - "BriefDescription": "ROB read port stalls cycles", - "Counter": "0,1,2,3", - "EventCode": "0xD2", - "EventName": "RAT_STALLS.ROB_READ_PORT", - "SampleAfterValue": "2000000", - "UMask": "0x4" - }, - { - "BriefDescription": "Scoreboard stall cycles", - "Counter": "0,1,2,3", - "EventCode": "0xD2", - "EventName": "RAT_STALLS.SCOREBOARD", - "SampleAfterValue": "2000000", - "UMask": "0x8" - }, - { "BriefDescription": "All Store buffer stall cycles", "Counter": "0,1,2,3", "EventCode": "0x4", @@ -284,4 +220,4 @@ "SampleAfterValue": "2000000", "UMask": "0x1" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json index 10140f460fbb..403fb2b87fc4 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json @@ -51,6 +51,30 @@ "UMask": "0x1" }, { + "BriefDescription": "Early Branch Prediciton Unit clears", + "Counter": "0,1,2,3", + "EventCode": "0xE8", + "EventName": "BPU_CLEARS.EARLY", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Late Branch Prediction Unit clears", + "Counter": "0,1,2,3", + "EventCode": "0xE8", + "EventName": "BPU_CLEARS.LATE", + "SampleAfterValue": "2000000", + "UMask": "0x2" + }, + { + "BriefDescription": "Branch prediction unit missed call or return", + "Counter": "0,1,2,3", + "EventCode": "0xE5", + "EventName": "BPU_MISSED_CALL_RET", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { "BriefDescription": "Branch instructions decoded", "Counter": "0,1,2,3", "EventCode": "0xE0", @@ -495,6 +519,46 @@ "UMask": "0x4" }, { + "BriefDescription": "All RAT stall cycles", + "Counter": "0,1,2,3", + "EventCode": "0xD2", + "EventName": "RAT_STALLS.ANY", + "SampleAfterValue": "2000000", + "UMask": "0xf" + }, + { + "BriefDescription": "Flag stall cycles", + "Counter": "0,1,2,3", + "EventCode": "0xD2", + "EventName": "RAT_STALLS.FLAGS", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Partial register stall cycles", + "Counter": "0,1,2,3", + "EventCode": "0xD2", + "EventName": "RAT_STALLS.REGISTERS", + "SampleAfterValue": "2000000", + "UMask": "0x2" + }, + { + "BriefDescription": "ROB read port stalls cycles", + "Counter": "0,1,2,3", + "EventCode": "0xD2", + "EventName": "RAT_STALLS.ROB_READ_PORT", + "SampleAfterValue": "2000000", + "UMask": "0x4" + }, + { + "BriefDescription": "Scoreboard stall cycles", + "Counter": "0,1,2,3", + "EventCode": "0xD2", + "EventName": "RAT_STALLS.SCOREBOARD", + "SampleAfterValue": "2000000", + "UMask": "0x8" + }, + { "BriefDescription": "Resource related stall cycles", "Counter": "0,1,2,3", "EventCode": "0xA2", @@ -896,4 +960,4 @@ "SampleAfterValue": "2000000", "UMask": "0x1" } -]
\ No newline at end of file +] |