linux - linux

	Commit message (Expand)	Author	Files	Lines
2021-07-27	clk: mediatek: Add MT8192 vdecsys clock support	Chun-Jie Chen	3	-0/+101
2021-07-27	clk: mediatek: Add MT8192 scp adsp clock support	Chun-Jie Chen	3	-0/+57
2021-07-27	clk: mediatek: Add MT8192 msdc clock support	Chun-Jie Chen	3	-0/+92
2021-07-27	clk: mediatek: Add MT8192 mmsys clock support	Chun-Jie Chen	3	-0/+115
2021-07-27	clk: mediatek: Add MT8192 mfgcfg clock support	Chun-Jie Chen	3	-0/+57
2021-07-27	clk: mediatek: Add MT8192 mdpsys clock support	Chun-Jie Chen	3	-0/+89
2021-07-27	clk: mediatek: Add MT8192 ipesys clock support	Chun-Jie Chen	3	-0/+64
2021-07-27	clk: mediatek: Add MT8192 imp i2c wrapper clock support	Chun-Jie Chen	3	-0/+126
2021-07-27	clk: mediatek: Add MT8192 imgsys clock support	Chun-Jie Chen	3	-0/+77
2021-07-27	clk: mediatek: Add MT8192 camsys clock support	Chun-Jie Chen	3	-0/+114
2021-07-27	clk: mediatek: Add MT8192 audio clock support	Chun-Jie Chen	3	-0/+125
2021-07-27	clk: mediatek: Add MT8192 basic clocks support	Chun-Jie Chen	5	-4/+1358
2021-07-27	clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers	Chun-Jie Chen	2	-0/+31
2021-07-27	clk: mediatek: Add configurable enable control to mtk_pll_data	Chun-Jie Chen	2	-14/+21
2021-07-27	clk: mediatek: Fix asymmetrical PLL enable and disable control	Chun-Jie Chen	1	-4/+16
2021-07-27	clk: mediatek: Get regmap without syscon compatible check	Chun-Jie Chen	4	-4/+4