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* clk: cs2000: select 12.20 High Accuracy on LFRatioCfgKuninori Morimoto2017-04-191-0/+11
* clk: cs2000: tidyup DEVICE_CFG2 settingsKuninori Morimoto2017-04-191-3/+5
* clk: cs2000: enable clock skipping modeKuninori Morimoto2017-04-191-0/+6
* clk: qcom: add parent for venus core0 and core1 gdsc'sStanimir Varbanov2017-04-191-0/+2
* clk: x86: add "mclk" alias for Baytrail/CherrytrailPierre-Louis Bossart2017-04-191-0/+7
* clk: ns2: Correct SDIO bitsBharat Kumar Reddy Gooty2017-04-191-1/+1
* clk: qcom: clk-smd-rpm: fix rate for branch clks during handoffSrinivas Kandagatla2017-04-191-1/+1
* clk: imx7d: fix USDHC NAND clockStefan Agner2017-04-191-2/+1
* clk: spear: fix ADC clock definition on SPEAr600Thomas Petazzoni2017-04-191-1/+1
* clk: mediatek: add clk support for MT6797Kevin-CW Chen2017-04-197-0/+1134
* dt-bindings: arm: mediatek: document clk bindings for MT6797Kevin-CW Chen2017-04-197-1/+8
* Merge branch 'clk-mt6797' into clk-nextStephen Boyd2017-04-191-0/+281
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| * clk: mediatek: add mt6797 clock IDsMars Cheng2017-04-191-0/+281
* | clk: imx7d: add the missing ipg_root_clkDong Aisheng2017-04-191-1/+2
* | clk: clk-imx7d: fix ahb clk definitionDong Aisheng2017-04-191-3/+2
* | clk: vc5: Add support for IDT VersaClock 5P49V5935Alexey Firago2017-04-191-2/+13
* | clk: vc5: Add bindings for IDT VersaClock 5P49V5935Alexey Firago2017-04-191-3/+13
* | clk: vc5: Add structure to describe particular chip featuresAlexey Firago2017-04-191-18/+47
* | Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd2017-04-1918-40/+832
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| * | clk: sunxi-ng: Display index when clock registration failsPriit Laes2017-04-061-2/+2
| * | clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factorChen-Yu Tsai2017-04-051-7/+11
| * | clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocksChen-Yu Tsai2017-04-051-18/+52
| * | clk: sunxi-ng: mult: Support PLL lock detectionChen-Yu Tsai2017-04-052-0/+4
| * | clk: sunxi-ng: add support for PRCM CCUsIcenowy Zheng2017-04-046-0/+359
| * | dt-bindings: update device tree binding for Allwinner PRCM CCUsIcenowy Zheng2017-04-041-1/+16
| * | clk: sunxi-ng: sun5i: Fix mux width for csi clockPriit Laes2017-03-061-1/+1
| * | clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCsPeter Robinson2017-03-061-0/+8
| * | clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driverIcenowy Zheng2017-03-066-11/+332
| * | clk: sunxi-ng: gate: Support common pre-dividersChen-Yu Tsai2017-03-061-0/+47
* | | Merge branch 'clk-fixes' into clk-nextStephen Boyd2017-04-174-0/+74
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| * \ \ Merge tag 'sunxi-clk-fixes-for-4.11-2-bis' of https://git.kernel.org/pub/scm/...Stephen Boyd2017-04-174-0/+74
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| | * | | clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai2017-04-131-0/+11
| | * | | clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocksChen-Yu Tsai2017-04-132-0/+61
| | * | | clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driverTobias Regnery2017-04-131-0/+1
| | * | | clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLERTobias Regnery2017-04-131-0/+1
| * | | | clk: stm32f4: fix: exclude values 0 and 1 for PLLQGabriel Fernandez2017-04-041-3/+10
* | | | | clk: cs2000: use existing priv_to_dev() to getting struct deviceKuninori Morimoto2017-04-121-5/+3
* | | | | Merge tag 'meson-clk-for-4.12' of git://github.com/BayLibre/clk-meson into cl...Michael Turquette2017-04-127-13/+332
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| * | | | | clk: meson: mpll: use 64bit math in rate_from_paramsMartin Blumenstingl2017-04-071-1/+1
| * | | | | clk: meson: mpll: fix division by zero in rate_from_paramsMartin Blumenstingl2017-04-071-11/+15
| * | | | | clk: meson: gxbb: add cts_i958 clockJerome Brunet2017-04-072-1/+23
| * | | | | clk: meson: gxbb: add cts_mclk_i958Jerome Brunet2017-04-072-1/+56
| * | | | | clk: meson: gxbb: add cts_amclkJerome Brunet2017-04-072-1/+71
| * | | | | clk: meson: add audio clock divider supportJerome Brunet2017-04-073-1/+155
| * | | | | clk: meson: gxbb: protect against holes in the onecell_data arrayJerome Brunet2017-04-071-0/+4
| * | | | | MAINTAINERS: Add maintainers for the meson clock driverJerome Brunet2017-04-071-0/+10
* | | | | | Merge tag 'amlogic-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/khil...Michael Turquette2017-04-129-56/+867
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| * | | | | Merge branch 'v4.12/clk-drivers' into v4.12/clkKevin Hilman2017-04-057-48/+840
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| | * | | | | clk: meson-gxbb: Add GXL/GXM GP0 VariantNeil Armstrong2017-04-042-28/+275
| | * | | | | clk: meson-gxbb: Add GP0 PLL init parametersNeil Armstrong2017-04-041-0/+13
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 19:34:27 +0100