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* Merge tag 'vfio-v5.3-rc1' of git://github.com/awilliam/linux-vfioLinus Torvalds2019-07-174-28/+34
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| * mdev: Send uevents around parent device registrationAlex Williamson2019-07-111-0/+9
| * sample/mdev/mbochs: remove set but not used variable 'mdev_state'YueHaibing2019-07-021-3/+0
| * vfio: vfio_pci_nvlink2: use a vma helper functionPeng Hao2019-07-021-2/+1
| * vfio-mdev/samples: make some symbols staticKefeng Wang2019-07-021-23/+24
* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-17148-3216/+7732
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| *-----. \ Merge branches 'clk-bcm63xx', 'clk-silabs', 'clk-lochnagar' and 'clk-rockchip...Stephen Boyd2019-07-1221-175/+1997
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| | | | | * \ Merge tag 'v5.3-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Stephen Boyd2019-07-1210-46/+29
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| | | | | | * | clk: rockchip: export HDMIPHY clock on rk3228Heiko Stuebner2019-06-271-1/+1
| | | | | | * | clk: rockchip: add watchdog pclk on rk3328Heiko Stuebner2019-06-271-0/+3
| | | | | | * | Merge branch 'v5.3-shared/clk-ids' into v5.3-clk/nextHeiko Stuebner2019-06-272-0/+2
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| | | | | | | * | clk: rockchip: add clock id for hdmi_phy special clock on rk3228Heiko Stuebner2019-06-271-0/+1
| | | | | | | * | clk: rockchip: add clock id for watchdog pclk on rk3328Heiko Stuebner2019-06-271-0/+1
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| | | | | | * | clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macroHeiko Stuebner2019-06-154-36/+12
| | | | | | * | clk: rockchip: add a type from SGRF-controlled gate clocksHeiko Stuebner2019-06-141-0/+4
| | | | | | * | clk: rockchip: Remove 48 MHz PLL rate from rk3288Douglas Anderson2019-06-061-1/+0
| | | | | | * | clk: rockchip: add 1.464GHz cpu-clock rate to rk3228Justin Swartz2019-05-201-0/+1
| | | | | | * | clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase()Douglas Anderson2019-05-201-3/+3
| | | | | | * | clk: rockchip: Don't yell about bad mmc phases when gettingDouglas Anderson2019-05-201-3/+1
| | | | | | * | clk: rockchip: Use clk_hw_get_rate() in MMC phase calculationDouglas Anderson2019-05-201-2/+2
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| | | | * | | clk: lochnagar: Update DT binding doc to include the primary SPDIF MCLKCharles Keepax2019-06-271-0/+1
| | | | * | | clk: lochnagar: Use new parent_data approach to register clock parentsCharles Keepax2019-06-261-119/+86
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| | | * | | clk: Add Si5341/Si5340 driverMike Looijmans2019-06-273-0/+1358
| | | * | | dt-bindings: clock: Add silabs,si5341Mike Looijmans2019-06-271-0/+162
| | | * | | clk: clk-si544: Implement small frequency change supportMike Looijmans2019-06-271-10/+92
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| | * | | clk: add BCM63XX gated clock controller driverJonas Gorski2019-06-273-0/+247
| | * | | devicetree: document the BCM63XX gated clock bindingsJonas Gorski2019-06-271-0/+22
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| *-------. \ \ Merge branches 'clk-rpi-cpufreq', 'clk-tegra', 'clk-simplify-provider.h', 'cl...Stephen Boyd2019-07-1219-116/+592
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| | | | | | * | | clk: at91: sckc: use dedicated functions to unregister clockClaudiu Beznea2019-06-271-2/+2
| | | | | | * | | clk: at91: sckc: improve error path for sama5d4 sck registrationClaudiu Beznea2019-06-271-15/+28
| | | | | | * | | clk: at91: sckc: remove unnecessary lineClaudiu Beznea2019-06-271-1/+0
| | | | | | * | | clk: at91: sckc: improve error path for sam9x5 sck registerClaudiu Beznea2019-06-271-18/+32
| | | | | | * | | clk: at91: sckc: add support to free slow clock osclillatorClaudiu Beznea2019-06-271-0/+8
| | | | | | * | | clk: at91: sckc: add support to free slow rc oscillatorClaudiu Beznea2019-06-271-0/+8
| | | | | | * | | clk: at91: sckc: add support to free slow oscillatorClaudiu Beznea2019-06-271-0/+8
| | | | | | * | | clk: at91: sckc: add support for SAM9X60Claudiu Beznea2019-06-261-0/+74
| | | | | | * | | dt-bindings: clk: at91: add bindings for SAM9X60's slow clock controllerClaudiu Beznea2019-06-261-3/+4
| | | | | | * | | clk: at91: sckc: add support to specify registers bit offsetsClaudiu Beznea2019-06-261-32/+61
| | | | | | * | | clk: at91: sckc: sama5d4 has no bypass supportClaudiu Beznea2019-06-261-6/+0
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| | | | | * | | clk: sprd: Add check for return value of sprd_clk_regmap_init()Chunyan Zhang2019-06-281-1/+4
| | | | | * | | clk: sprd: Check error only for devm_regmap_init_mmio()Chunyan Zhang2019-06-261-1/+1
| | | | | * | | clk: sprd: Switch from of_iomap() to devm_ioremap_resource()Chunyan Zhang2019-06-261-1/+6
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| | | | * | | clk: consoldiate the __clk_get_hw() declarationsStephen Rothwell2019-07-128-4/+13
| | | | * | | clk: Unexport __clk_of_tableStephen Boyd2019-05-242-4/+1
| | | | * | | clk: Remove ifdef for COMMON_CLK in clk-provider.hStephen Boyd2019-05-241-3/+0
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| | | * | | clk: tegra: Do not enable PLL_RE_VCO on Tegra210Thierry Reding2019-06-261-1/+0
| | | * | | clk: tegra: Warn if an enabled PLL is in IDDQThierry Reding2019-06-261-1/+5
| | | * | | clk: tegra: Do not warn unnecessarilyThierry Reding2019-06-261-2/+3
| | | * | | clk: tegra210: fix PLLU and PLLU_OUT1JC Kuo2019-06-261-4/+4
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| | * | | clk: raspberrypi: register platform device for raspberrypi-cpufreqNicolas Saenz Julienne2019-06-261-0/+15
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 22:21:38 +0100