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* drm/i915/bdw: Remove the HDMI/DVI entry from the DP/eDP/FDI tablesDamien Lespiau2014-08-081-3/+0
* drm/i915/bdw: Provide the BDW specific HDMI buffer translation tableDamien Lespiau2014-08-081-5/+23
* drm/i915: Gather the HDMI level shifter logic into one placeDamien Lespiau2014-08-083-9/+24
* drm/i915: Introduce FBC False Color for debug purposes.Rodrigo Vivi2014-08-084-0/+48
* drm/i915: Align intel_dsi*.c files a bitDaniel Vetter2014-08-083-17/+17
* drm/i915: Add support for Video Burst Mode for MIPI DSIShobhit Kumar2014-08-085-17/+57
* drm/i915: Clarify CHV swing margin/deemph bitsVille Syrjälä2014-08-083-6/+10
* drm/i915: Call intel_{dp, hdmi}_prepare for chvVille Syrjälä2014-08-082-0/+4
* drm/i915: Split chv_update_pll() apartVille Syrjälä2014-08-081-11/+19
* drm/i915: Leave DPLL ref clocks onVille Syrjälä2014-08-081-1/+1
* drm/i915: Disable cdclk changes for chv until Punit is readyVille Syrjälä2014-08-081-0/+8
* drm/i915: Add cdclk change support for chvVille Syrjälä2014-08-082-2/+52
* d rm/i915: freeze display before the interrupts and GTPaulo Zanoni2014-08-081-1/+1
* drm/i915: Make ddi_clock_gate() HSW/BDW specificDaniel Vetter2014-08-081-3/+9
* drm/i915: Split the CDCLK retrieval per-platformDamien Lespiau2014-08-081-17/+38
* drm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW specificDamien Lespiau2014-08-081-7/+8
* drm/i915: Split the BDW/HSW specific shared pll selectionDamien Lespiau2014-08-081-16/+23
* drm/i915: Fix stale comment for intel_ddi_pll_select()Damien Lespiau2014-08-081-4/+5
* drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDWDamien Lespiau2014-08-081-1/+1
* drm/i915: Extract the HSW/BDW shared dpll init codeDamien Lespiau2014-08-081-3/+9
* drm/i915: Extract the HSW DDI selection code into its own functionDamien Lespiau2014-08-081-10/+17
* drm/i915: Add a space to the shared DPLL debug messageDamien Lespiau2014-08-081-1/+1
* drm/i915: Specify when the PLL hw state fields are validDamien Lespiau2014-08-081-0/+3
* drm/i915: Add DP training pattern 3 for CHVVille Syrjälä2014-08-082-4/+16
* drm/i915: Split a few long debug printsVille Syrjälä2014-08-081-2/+4
* drm/i915: Fix read back of plane stride registerRafael Barbalho2014-08-081-2/+2
* drm/i915: Add chv port D TX wellsVille Syrjälä2014-08-082-0/+27
* drm/i915: Add chv port B and C TX wellsVille Syrjälä2014-08-081-0/+30
* drm/i915: Add per-pipe power wells for chvVille Syrjälä2014-08-082-0/+138
* drm/i915: Add disp2d power well for chvVille Syrjälä2014-08-081-0/+8
* drm/i915: Kill intel_reset_dpio()Ville Syrjälä2014-08-081-31/+0
* drm/i915: Add chv cmnlane power wellsVille Syrjälä2014-08-082-0/+90
* drm/i915: Add chv_power_wells[]Ville Syrjälä2014-08-081-0/+11
* drm/i915: Kill intel_crtc->vbl_waitVille Syrjälä2014-08-084-11/+3
* drm: Add drm_crtc_vblank_waitqueue()Ville Syrjälä2014-08-082-0/+12
* drm/i915: State readout and cross-checking for dp_m2_n2Vandana Kannan2014-08-081-8/+67
* drm/i915: Set M2_N2 registers during mode setVandana Kannan2014-08-083-23/+26
* Revert "drm/i915: Enable semaphores on BDW"Rodrigo Vivi2014-08-081-0/+4
* drm/i915: read HEAD register back in init_ring_common() to enforce orderingJiri Kosina2014-08-081-0/+3
* drm/i915: Fix crash when failing to parse MIPI VBTRafael Barbalho2014-08-081-1/+1
* drm/i915: Bring GPU Freq to min while suspending.Deepak S2014-08-071-1/+1
* drm/i915: Fix DEIER and GTIER collecting for BDW.Rodrigo Vivi2014-08-072-6/+15
* drm/i915: Don't accumulate hangcheck score on forward progressMika Kuoppala2014-08-073-3/+16
* drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround.Kenneth Graunke2014-08-071-0/+9
* drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.Kenneth Graunke2014-08-071-15/+22
* drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL valuesVille Syrjälä2014-08-071-5/+4
* drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang2014-08-072-31/+31
* drm/i915: Collect gtier properly on HSW.Rodrigo Vivi2014-08-072-10/+12
* drm/i915: Tune down MCH_SSKPD values warningDaniel Vetter2014-08-071-5/+3
* drm/i915: Tune done rc6 enabling outputDaniel Vetter2014-08-071-6/+6
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