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* mtd: m25p80: Add support for serial flash STM/Micron N25Q032Knut Wohlrab2012-07-171-0/+1
| | | | | Signed-off-by: Knut Wohlrab <knut.wohlrab@de.bosch.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: gpmi: update the bitflip_thresholdHuang Shijie2012-07-171-0/+1
| | | | | | | | | | | The origin code misses to update the bitflip_threshold when we have already get the right ecc_strength. The patch fixes it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: gpmi: add on-flash BBT support for gpmi nandHuang Shijie2012-07-162-0/+7
| | | | | | | | add the on flash bbt support for gpmi nand driver. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: fix typo in commentHuang Shijie2012-07-161-1/+1
| | | | | | | | fix the comment for nand_bbt.c Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: use MTD_OPS_PLACE_OOB macro consistentlyHuang Shijie2012-07-161-3/+3
| | | | | | | | | | Use the MTD_OPS_PLACE_OOB to replace the hard code "0". Make the code more readable. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: cfi_cmdset_0002: Micron M29EW bugfixes as per TN-13-07Gerlando Falauto2012-07-161-0/+67
| | | | | | | | | | | Fix the following issues with Micron's (formerly Numonyx) M29EW NOR flash chips, as documented on TN-13-07: - Correcting Erase Suspend Hang Ups (page 20) - Resolving the Delay After Resume Issue (page 22) Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: mxc_nand: Select the driver via ARCH_MXCFabio Estevam2012-07-161-1/+1
| | | | | | | | | | | | | | With device tree support in place, we should not use IMX_HAVE_PLATFORM_MXC_NAND as a dependency for selecting the mxc_nand driver. Use ARCH_MXC symbol instead, so that the driver can be even selected when a single device-tree machine is selected. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: lpc32xx_mlc: Adjust to pl08x DMA interface changesRoland Stigge2012-07-131-12/+1
| | | | | | | | | This patch adjusts the LPC32xx MLC NAND driver to the new pl08x DMA interface, fixing the compile error resulting from changed pl08x structures. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: lpc32xx_slc: Adjust to pl08x DMA interface changesRoland Stigge2012-07-131-12/+1
| | | | | | | | | This patch adjusts the LPC32xx SLC NAND driver to the new pl08x DMA interface, fixing the compile error resulting from changed pl08x structures. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: spear_smi: handle return value of timeouts properlyVipin Kumar2012-07-061-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | Handle timouts in general and return value of 'wait_event_interruptible_timeout' in particular, to capture all conditions. 'wait_event_interruptible_timeout' returns either of the following three values :- * 0 - time out occurred. * negative * -ERESTARTSYS - return because of a signal * other - for a real error * positive - time remaining Fix particularly 'ERESTARTSYS' condition which is not properly handled by the smi driver at a couple of places leading to an erroneous situation. Signed-off-by: Antonio BORNEO <antonio.borneo@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: spear_smi: clear status register on initShiraz Hashim2012-07-061-0/+3
| | | | | | | | | | | | It was observed that sometimes smi returned errors while resume from suspend. For safety reasons clear status register for any errors during init. In absence of it smi can return failures during command transmissions. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: spear_smi: Move suspend/resume to follow dev_pm_opsViresh Kumar2012-07-061-11/+17
| | | | | | | | Use dev_pm_ops to support PM specific callbacks. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: add LPC32xx MLC NAND driverRoland Stigge2012-07-064-0/+998
| | | | | | | | | This patch adds a driver for the MLC NAND controller of the LPC32xx SoC. [dwmw2: 21st century pedantry] Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: lpc32xx_slc: Make probe() return -EPROBE_DEFER if necessaryRoland Stigge2012-07-061-0/+2
| | | | | | | | | | | Via of_get_named_gpio(), wp_gpio can become -EPROBE_DEFER which now makes probe() return -EPROBE_DEFER as well to wait until the gpio controller is probed before trying to probe lpc32xx_slc again. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: lpc32xx_slc: Use of_get_named_gpio()Roland Stigge2012-07-061-1/+1
| | | | | | | | | | This patch makes the lpc32xx_slc driver use of_get_named_gpio() instead of of_get_named_gpio_flags() whose flags are discarded anyway. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: lpc32xx_slc: Make wp gpio optionalAlexandre Pereira da Silva2012-07-061-4/+7
| | | | | | | | This patch supports missing wp gpio. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
* mtd: at91: atmel_nand: add Programmable Multibit ECC controller supportJosh Wu2012-07-062-7/+864
| | | | | | | | | | | | | | | | | | | | | The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the address and size of PMECC, PMECC error location controllers and ROM. And also needs to pass the correction capability, the sector size and ROM lookup table offsets via dt. This driver has been tested on AT91SAM9X5-EK and AT91SAM9N12-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: at91: add dt parameters for Atmel PMECCJosh Wu2012-07-062-2/+90
| | | | | | | | | | Add DT support for PMECC parameters. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: delete SBC82xx/SBC8560 MTD mapping supportPaul Gortmaker2012-07-063-187/+0
| | | | | | | | | | | | | The SBC8260 support was dropped back when we moved from ppc to powerpc. We are now also dropping the support for the EOL SBC8560, so we can also delete this mapping support, as they were the only users of it. Artem: also remove the symbol from the Makefile. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: Better comment NAND_BBT_NO_OOBShmulik Ladkani2012-07-061-1/+4
| | | | | | | | | Amend the comment to reflect the fact NAND_BBT_NO_OOB refers to the location of the bad block table marker. Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: fix bogus inequationMarek Vasut2012-07-061-1/+1
| | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand_bbt: refactor check_pattern_no_oob()Brian Norris2012-07-061-6/+3
| | | | | | | | This function only returns 0 or -1, so make that clear. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: rename "no_bbt" descriptors to "no_oob"Brian Norris2012-07-061-4/+4
| | | | | | | | | These descriptors are for BBT's that don't use OOB; the "no_bbt" name doesn't really make sense. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: remove stale config optionsRichard Genoud2012-07-061-40/+0
| | | | | | | | | | | | The commit bf4289cba02b8cf770ecd7959ca70839f0dd9d3c removed the use of CONFIG_MTD_NAND_ATMEL_ECC_NONE and CONFIG_MTD_NAND_ATMEL_ECC_HW but the Kconfig file was forgotten. This patch remove those inoperative options. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: change "AMD" manuf. ID to "AMD/Spansion"Brian Norris2012-07-061-1/+1
| | | | | | | | This manufacturer ID is used under the name Spansion. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: chips: reorganize Kconfig help on swappingPaul Bolle2012-07-061-9/+2
| | | | | | | | | | | | | | | | The Kconfig help on "Flash cmd/query data swapping" still mentions LART_ENDIAN_BYTE. That option used to be relevant for setting CONFIG_MTD_CFI_LART_BIT_SWAP. That option and macro got both removed in v2.4.11-pre4. So, although LART endianness sounds intriguing, that part of the help text can be removed. And, while we're touching this choice, move the help text up one level. Currently it's available under the "NO" option, while it's relevant for all three options. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: m25p80: Add support for Atmel at45db081dChunhe Lan2012-07-061-0/+2
| | | | | | Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: add LPC32xx SLC NAND driverRoland Stigge2012-07-064-0/+1129
| | | | | | | | | | This patch adds support for the SLC NAND controller inside the LPC32xx SoC. [dwmw2: 21st century pedantry] Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: teach write_page and write_page_raw return an error codeJosh Wu2012-07-0612-31/+64
| | | | | | | | | | | | | | | | | | | | | | | | | There is an implemention of hardware ECC write page function which may return an error indication. For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware engine will compute the BCH ecc code for this page. so we need read a the status register to theck whether the ecc code is generated. But we cannot assume the status register always can be ready, for example, incorrect hardware configuration or hardware issue, in such case we need write_page() to return a error code. Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'. So this patch will: 1. add return 'int' value for 'write_page' function. 2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too. 3. add code to test the return value, and if negative, indicate an error happend when write page with ECC. 4. fix the compile warning in all impacted nand flash driver. Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: at91: extract hw ecc initialization to one functionJosh Wu2012-07-061-61/+66
| | | | | | | | | This patch moves hw ecc initialization code to one function. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: m25p80: Add support for n25q064Alexandre Pereira da Silva2012-07-061-0/+1
| | | | | | Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: m25p80: Add support for m25pe20Alexandre Pereira da Silva2012-07-061-0/+1
| | | | | | Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: Use the mirror BBT descriptor when reading its versionShmulik Ladkani2012-07-061-1/+1
| | | | | | | | | | | | | | The code responsible for reading the version of the mirror bbt was incorrectly using the descriptor of the main bbt. Pass the mirror bbt descriptor to 'scan_read_raw' when reading the version of the mirror bbt. Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: stable@vger.kernel.org [v2.6.37+] Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* ARM: i.MX5: Add nand oftree supportSascha Hauer2012-07-063-0/+16
| | | | | | | | | | This adds snippets to the i.MX51/53 devicetrees for the nand flash controller. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: mxc_nand: add i.MX53 supportSascha Hauer2012-07-061-6/+42
| | | | | | | | | | The only relevant change between i.MX51 and i.MX53 is that a bitfield is shifted one bit to the left. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: mxc_nand: swap iomem resource orderSascha Hauer2012-07-062-22/+24
| | | | | | | | | | | | | The i.MX v3 nand controller (i.MX5) needs two memory resources. Traditionally we have the AXI resource first. For sorting in this driver into the devicetree it feels much more natural to have the IP resource first. This patch swaps the ordering of these two resources. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: mxc_nand: Use managed resourcesSascha Hauer2012-07-061-47/+23
| | | | | | | | | | To make the error path simpler and to make subsequent patches easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: elbc nand: use drvdata to only remove the relevant chipScott Wood2012-07-061-5/+5
| | | | | | | | | | | | | | | | Previously the remove method was looping and removing all chips, which is obviously not the right thing to do — left over from when the driver was organized differently and that was the remove method for the entire controller. This would result in bad things happening if you have more than one NAND chip, and remove the module. This also fixes priv->dev to properly point to the chip's device rather than the controller's. Until now priv->dev was only used for error/debug prints (and it's an improvement there), so this shouldn't break anything. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: add JEDEC ID for w25q32dw to chip tableing. Federico Fuga2012-07-061-0/+1
| | | | | | | | Adds JEDEC ID for the 1.8V version of WinBond w25q32. Signed-off-by: Federico Fuga <fuga@studiofuga.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* nand: mxc_nand: Use clk_prepare_enable/clk_disable_unprepareFabio Estevam2012-07-061-2/+2
| | | | | | | | Prepare the clock before enabling it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: kill NAND_NO_READRDYBrian Norris2012-07-066-28/+2
| | | | | | | | | | | According to its documentation, the NAND_NO_READRDY option is always used when autoincrement is not supported. Autoincrement support was recently dropped, so we can drop this options as well (defaulting to "no read ready check"). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: remove NAND_BBT_SEARCH optionBrian Norris2012-07-062-4/+0
| | | | | | | | This option was never used and isn't currently used. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: nand: add Eon Silicon Solutions manufacturer IDBrian Norris2012-07-062-0/+2
| | | | | | | | Eon's new NAND flash: EN27LN1G08. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: tests: use random32 instead of home-brewed generatorArtem Bityutskiy2012-07-062-44/+11
| | | | | | | | | | | This is a clean-up patch which removes the own pseudo-random numbers generator from the speed- and stress-tests and makes them use the 'random32()' generator instead. [dwmw2: Merge later fix for negative offsets] Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: sh_flctl: Use user oob data in hardware ECC modeBastian Hecht2012-07-061-8/+17
| | | | | | | | | | | In hardware ecc mode, the flctl now writes and reads the oob data provided by the user. Additionally the ECC is now returned in normal page reads, not only when using the explicit NAND_CMD_READOOB command. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: sh_flctl: Restructure the hardware ECC handlingBastian Hecht2012-07-062-43/+88
| | | | | | | | | | | | | | | | There are multiple reasons for a rewrite: - a race exists: when _4ECCEND is set, _4ECCFA may become true too meanwhile, which is lost and a non-correctable error is treated as correctable. - the ECC statistics don't get properly propagated to the base code. - empty pages would get marked as corrupted The rewrite resolves the issues and I hope it gives a more explicit code flow structure. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: sh_flctl: Group sector accesses into a single transferBastian Hecht2012-07-061-25/+19
| | | | | | | | | | When we use hardware ecc, the flctl is run in so-called "sector access mode". We can bundle 4 sector accesses when using 2KiB page sizes to read a whole page at once and speed up things. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: sh_flctl: Simplify the hardware ecc page read/writeBastian Hecht2012-07-061-23/+2
| | | | | | | | | | As the equation mtd->writesize == eccsteps * eccsize holds, we can simplify the code. The second loop of the 1st hunk is never entered, so we delete it. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: sh_flctl: Fix hardware ECC behaviourBastian Hecht2012-07-061-23/+7
| | | | | | | | | The flctl uses 10 bytes ECC data for every 512 bytes sector. This patch makes the controller write all 40 bytes instead of 10 bytes only. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* mtd: sh_flctl: Use different OOB layoutBastian Hecht2012-07-062-10/+12
| | | | | | | | | | | | The flctl hardware has changed and a new OOB layout must be adapted for 2KiB page size NAND chips when using hardware ECC. The related bit fields ECCPOS[0-2] are gone — the bits are marked as reserved now in the datasheet. As there are no official users of the hardware ECC so far, they are completely removed. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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