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* ASoC: atmel-classd: remove aclk clock from DT bindingQuentin Schulz2017-09-021-6/+3
* clk: at91: clk-generated: make gclk determine audio_pll rateQuentin Schulz2017-09-021-6/+57
* clk: at91: clk-generated: create function to find best_diffQuentin Schulz2017-09-021-14/+27
* clk: at91: add audio pll clock driversQuentin Schulz2017-09-024-0/+566
* dt-bindings: clk: at91: add audio plls to the compatible listQuentin Schulz2017-09-021-0/+10
* clk: at91: clk-generated: remove useless divisor loopQuentin Schulz2017-09-021-13/+12
* clk: mb86s7x: Drop non-building driverAndreas Färber2017-09-012-391/+0
* clk: ti: check for null return in strrchr to avoid null dereferencingColin Ian King2017-09-011-1/+1
* clk: Don't write error code into divider registerAlex Frid2017-09-011-2/+4
* clk: uniphier: add video input subsystem clockKatsuhiro Suzuki2017-09-011-0/+6
* clk: uniphier: add audio system clockKatsuhiro Suzuki2017-09-011-0/+12
* clk: stm32h7: Add stm32h743 clock driverGabriel Fernandez2017-09-015-0/+1783
* clk: gate: expose clk_gate_ops::is_enabledGabriel Fernandez2017-09-012-1/+3
* clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled()Gabriel Fernandez2017-09-011-6/+6
* clk: uniphier: add PXs3 clock dataMasahiro Yamada2017-09-014-0/+46
* clk: hi6220: change watchdog clock sourceLeo Yan2017-09-011-3/+3
* clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808Elaine Zhang2017-09-011-2/+2
* clk: cs2000: Add cs2000_set_saved_rateGaku Inami2017-08-311-4/+10
* clk: imx51: propagate rate across ipu_di*_selLucas Stach2017-08-311-4/+4
* Merge tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd2017-08-318-0/+1855
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| * clk: sunxi-ng: Add sun4i/sun7i CCU driverPriit Laes2017-08-247-0/+1853
| * dt-bindings: List devicetree binding for the CCU of Allwinner A10Priit Laes2017-08-241-0/+1
| * dt-bindings: List devicetree binding for the CCU of Allwinner A20Priit Laes2017-08-241-0/+1
* | clk: sunxi: fix uninitialized accessArnd Bergmann2017-08-311-0/+4
* | clk: versatile: make clk_ops constBhumika Goyal2017-08-311-1/+1
* | ARC: clk: introduce HSDK pll driverEugeniy Paltsev2017-08-315-0/+473
* | clk: zte: constify clk_div_tableArvind Yadav2017-08-311-3/+3
* | clk: imx: constify clk_div_tableArvind Yadav2017-08-315-12/+12
* | clk: uniphier: add ethernet clock control supportKunihiko Hayashi2017-08-311-0/+10
* | clk: gemini: hands off PCI OE bitLinus Walleij2017-08-311-7/+0
* | clk: ux500: prcc: constify clk_ops.Arvind Yadav2017-08-311-3/+3
* | clk: ux500: sysctrl: constify clk_ops.Arvind Yadav2017-08-311-4/+4
* | clk: ux500: prcmu: constify clk_ops.Arvind Yadav2017-08-311-7/+7
* | clk: msm8996-gcc: add missing smmu clksSrinivas Kandagatla2017-08-242-0/+30
* | clk: tegra: Fix Tegra210 PLLU initializationAlex Frid2017-08-241-2/+4
* | clk: tegra: Correct Tegra210 UTMIPLL poweron delayAlex Frid2017-08-241-3/+3
* | clk: tegra: Fix T210 PLLRE registrationAlex Frid2017-08-241-20/+1
* | clk: tegra: Update T210 PLLSS (D2/DP) registrationAlex Frid2017-08-241-39/+9
* | clk: tegra: Re-factor T210 PLLX registrationAlex Frid2017-08-244-49/+10
* | clk: tegra: don't warn for pll_d2 defaults unnecessarilyPeter De Schrijver2017-08-241-2/+4
* | clk: tegra: change post IDDQ release delay to 5usPeter De Schrijver2017-08-241-1/+1
* | clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2CAlex Frid2017-08-241-1/+2
* | clk: tegra: Fix T210 effective NDIV calculationAlex Frid2017-08-241-4/+5
* | clk: tegra: Init cfg structure in _get_pll_mnpPeter De Schrijver2017-08-241-0/+2
* | clk: tegra210: remove non-existing VFIR clockPeter De Schrijver2017-08-241-1/+0
* | clk: tegra: disable SSC for PLL_D2Peter De Schrijver2017-08-241-1/+1
* | clk: tegra: Enable PLL_SS for Tegra210Peter De Schrijver2017-08-241-1/+1
* | clk: tegra: fix SS control on PLL enable/disablePeter De Schrijver2017-08-241-20/+24
* | clk: qcom: msm8916: Fix bimc gpu clock opsGeorgi Djakov2017-08-241-1/+1
* | clk: ti: make clk_ops constBhumika Goyal2017-08-243-4/+4
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 10:49:52 +0100