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* Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds2015-09-01154-7328/+15624
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull crypto updates from Herbert Xu: "Here is the crypto update for 4.3: API: - the AEAD interface transition is now complete. - add top-level skcipher interface. Drivers: - x86-64 acceleration for chacha20/poly1305. - add sunxi-ss Allwinner Security System crypto accelerator. - add RSA algorithm to qat driver. - add SRIOV support to qat driver. - add LS1021A support to caam. - add i.MX6 support to caam" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (163 commits) crypto: algif_aead - fix for multiple operations on AF_ALG sockets crypto: qat - enable legacy VFs MPI: Fix mpi_read_buffer crypto: qat - silence a static checker warning crypto: vmx - Fixing opcode issue crypto: caam - Use the preferred style for memory allocations crypto: caam - Propagate the real error code in caam_probe crypto: caam - Fix the error handling in caam_probe crypto: caam - fix writing to JQCR_MS when using service interface crypto: hash - Add AHASH_REQUEST_ON_STACK crypto: testmgr - Use new skcipher interface crypto: skcipher - Add top-level skcipher interface crypto: cmac - allow usage in FIPS mode crypto: sahara - Use dmam_alloc_coherent crypto: caam - Add support for LS1021A crypto: qat - Don't move data inside output buffer crypto: vmx - Fixing GHASH Key issue on little endian crypto: vmx - Fixing AES-CTR counter bug crypto: null - Add missing Kconfig tristate for NULL2 crypto: nx - Add forward declaration for struct crypto_aead ...
| * crypto: algif_aead - fix for multiple operations on AF_ALG socketsLars Persson2015-08-251-0/+1
| | | | | | | | | | | | | | | | | | The tsgl scatterlist must be re-initialized after each operation. Otherwise the sticky bits in the page_link will corrupt the list with pre-mature termination or false chaining. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - enable legacy VFsTadeusz Struk2015-08-254-106/+118
| | | | | | | | | | | | | | | | | | | | | | We need to support legacy VFs as well as VFs running on different OSes. To do so the compatibility check need needs to be relaxed. This patch moves the logic responsible for VF to PF version and compatibility checking from adfsriov.c to adf_pf2vf_msg.c, where it belongs, and changes the logic enable legacy VFs. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * MPI: Fix mpi_read_bufferTadeusz Struk2015-08-251-13/+25
| | | | | | | | | | | | | | | | Change mpi_read_buffer to return a number without leading zeros so that mpi_read_buffer and mpi_get_buffer return the same thing. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - silence a static checker warningTadeusz Struk2015-08-241-0/+4
| | | | | | | | | | | | | | | | Add range check for ring number. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: vmx - Fixing opcode issueLeonidas Da Silva Barbosa2015-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | In build time vadduqm opcode is not being mapped correctly. Adding a new map in ppc-xlate to do this. Signed-off-by: Leonidas S Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - Use the preferred style for memory allocationsFabio Estevam2015-08-245-15/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "The preferred form for passing a size of a struct is the following: p = kmalloc(sizeof(*p), ...); .... The preferred form for allocating a zeroed array is the following: p = kcalloc(n, sizeof(...), ...); " ,so do as suggested. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - Propagate the real error code in caam_probeFabio Estevam2015-08-241-4/+4
| | | | | | | | | | | | | | | | | | Instead of propagating a 'fake' error code, just propagate the real one in the case of caam_drv_identify_clk() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - Fix the error handling in caam_probeFabio Estevam2015-08-241-11/+25
| | | | | | | | | | | | | | | | | | In the error path we should disable the resources that were previously acquired, so fix the error handling accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - fix writing to JQCR_MS when using service interfaceHoria Geant?2015-08-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most significant part of JQCR (Job Queue Control Register) contains bits that control endianness: ILE - Immediate Little Endian, DWS - Double Word Swap. The bits are automatically set by the Job Queue Controller HW. Unfortunately these bits are cleared in SW when submitting descriptors via the register-based service interface. >From LS1021A: JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) This would cause problems on little endian caam for descriptors containing immediata data or double-word pointers. Currently there is no problem since the only descriptors ran through this interface are the ones that (un)instantiate RNG. Signed-off-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: hash - Add AHASH_REQUEST_ON_STACKHerbert Xu2015-08-211-0/+5
| | | | | | | | | | | | | | This patch adds the helper AHASH_REQUEST_ON_STACK for those users of ahash that are synchronous only. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: testmgr - Use new skcipher interfaceHerbert Xu2015-08-211-29/+32
| | | | | | | | | | | | | | This patch replaces uses of blkcipher and ablkcipher with the new skcipher interface. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: skcipher - Add top-level skcipher interfaceHerbert Xu2015-08-214-1/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the crypto skcipher interface which aims to replace both blkcipher and ablkcipher. It's very similar to the existing ablkcipher interface. The main difference is the removal of the givcrypt interface. In order to make the transition easier for blkcipher users, there is a helper SKCIPHER_REQUEST_ON_STACK which can be used to place a request on the stack for synchronous transforms. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: cmac - allow usage in FIPS modeStephan Mueller2015-08-191-0/+2
| | | | | | | | | | | | | | | | CMAC is an approved cipher in FIPS 140-2. The patch allows the use of CMAC with TDES and AES in FIPS mode. Signed-off-by: Stephan Mueller <smueller@chronox.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: sahara - Use dmam_alloc_coherentVaishali Thakkar2015-08-191-37/+9
| | | | | | | | | | | | | | | | | | | | This patch moves the data allocated using dma_alloc_coherent to the corresponding managed interface. To be compatible with the change, various gotos are replaced with direct returns and unneeded labels are dropped. Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - add support for LS1021AHoria Geant?2015-08-184-10/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1021A is a QorIQ SoC having little endian CAAM. There are a few differences b/w QorIQ and i.MX from CAAM perspective: 1. i.MX platforms are somewhat special wrt. 64-bit registers: -big endian format at 64-bit level: MSW at address+0 and LSW at address+4 -little endian format at 32-bit level (within MSW and LSW) and thus need special handling. 2. No CCM (clock controller module) for QorIQ. No CAAM clocks to enable / disable. A new Kconfig option - CRYPTO_DEV_FSL_CAAM_LE - is added to indicate CAAM is little endian (*). It is hidden from the user (to avoid misconfiguration); when adding support for a new platform with LE CAAM, either the Kconfig needs to be updated or the corresponding defconfig needs to indicate that CAAM is LE. (*) Using a DT property to provide CAAM endianness would not allow for the ifdeffery. In order to keep changes to a minimum, the following changes are postponed: -endianness fix of the last word in the S/G (rsvd2, bpid, offset), fields are always 0 anyway; -S/G format fix for i.MX7 (yes, i.MX7 support was not added yet, but still...) Signed-off-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - Don't move data inside output bufferTadeusz Struk2015-08-181-1/+1
| | | | | | | | | | | | | | Change memcpy to memmove because the copy is done within the same buffer. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: vmx - Fixing GHASH Key issue on little endianLeonidas Da Silva Barbosa2015-08-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GHASH table algorithm is using a big endian key. In little endian machines key will be LE ordered. After a lxvd2x instruction key is loaded as it is, LE/BE order, in first case it'll generate a wrong table resulting in wrong hashes from the algorithm. Bug affects only LE machines. In order to fix it we do a swap for loaded key. Cc: stable@vger.kernel.org Signed-off-by: Leonidas S Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: vmx - Fixing AES-CTR counter bugLeonidas Da Silva Barbosa2015-08-182-18/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | AES-CTR is using a counter 8bytes-8bytes what miss match with kernel specs. In the previous code a vadduwm was done to increment counter. Replacing this for a vadduqm now considering both cases counter 8-8 bytes and full 16bytes. Cc: stable@vger.kernel.org Signed-off-by: Leonidas S Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: null - Add missing Kconfig tristate for NULL2Herbert Xu2015-08-171-0/+1
| | | | | | | | | | | | | | | | | | This patch adds a missing tristate statement to Kconfig for the new CRYPTO_NULL2 option. Fixes: 149a39717dcc ("crypto: aead - Add type-safe geniv init/exit helpers") Reported-by: Stephan Mueller <smueller@chronox.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: nx - Add forward declaration for struct crypto_aeadHerbert Xu2015-08-171-0/+2
| | | | | | | | | | | | | | | | | | The file nx.h has function prototypes that use struct crypto_aead. However, as crypto/aead.h is not included we don't have a definition for it. This patch adds a forward declaration to fix this. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: null - Use NULL2 in MakefileHerbert Xu2015-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | The Kconfig option NULL2 has been added as CRYPTO_MANAGER now depends indirectly on NULL2. However, the Makefile was not updated to use the new option, resulting in potential build failures when only NULL2 is enabled. Fixes: 149a39717dcc ("crypto: aead - Add type-safe geniv init/exit helpers") Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: amcc - Do a NULL check for pointerFabio Estevam2015-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | Compare pointer-typed values to NULL rather than 0. The semantic patch that makes this change is available in scripts/coccinelle/null/badzero.cocci Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: aead - Remove CRYPTO_ALG_AEAD_NEW flagHerbert Xu2015-08-1720-69/+24
| | | | | | | | | | | | | | This patch removes the CRYPTO_ALG_AEAD_NEW flag now that everyone has been converted. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: aead - Remove old AEAD interfacesHerbert Xu2015-08-175-818/+28
| | | | | | | | | | | | | | Now that the AEAD conversion is complete we can rip out the old AEAD interafce and associated code. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - Remove reference to crypto_aead_crtHerbert Xu2015-08-171-3/+3
| | | | | | | | | | | | | | The qat driver uses crypto_aead_crt in order to get the authsize. This patch replaces it with the crypto_aead_authsize helper instead. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: cryptd - Remove reference to crypto_aead_crtHerbert Xu2015-08-171-2/+2
| | | | | | | | | | | | | | | | | | | | Pretty soon the crypto_aead encrypt/decrypt hooks will disappear as they are now always identical to those in struct aead_alg. This patch replaces the references to these hooks with the ones from aead_alg instead. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: echainiv - Use generic geniv init/exit helpersHerbert Xu2015-08-171-63/+7
| | | | | | | | | | | | | | This patch replaces the echainiv init/exit handlers with the generic geniv helpers. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: seqiv - Use generic geniv init/exit helpersHerbert Xu2015-08-171-68/+7
| | | | | | | | | | | | | | This patch replaces the seqiv init/exit handlers with the generic geniv helpers. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: aead - Add type-safe geniv init/exit helpersHerbert Xu2015-08-174-9/+74
| | | | | | | | | | | | | | | | This patch adds the helpers aead_init_geniv and aead_exit_geniv which are type-safe and intended the replace the existing geniv init/exit helpers. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: echainiv - Remove AEAD compatibility codeHerbert Xu2015-08-171-4/+0
| | | | | | | | | | | | | | | | Now that we no longer have any legacy AEAD implementations the compatibility code path can no longer be triggered. This patch removes it. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: seqiv - Remove AEAD compatibility codeHerbert Xu2015-08-171-127/+0
| | | | | | | | | | | | | | | | Now that we no longer have any legacy AEAD implementations the compatibility code path can no longer be triggered. This patch removes it. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: seqiv - Remove seqnivHerbert Xu2015-08-171-244/+1
| | | | | | | | | | | | Now that IPsec no longer uses seqniv we can remove it. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * ipsec: Replace seqniv with seqivHerbert Xu2015-08-171-7/+7
| | | | | | | | | | | | | | Now that seqniv is identical with seqiv we no longer need it. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Steffen Klassert <steffen.klassert@secunet.com>
| * crypto: user - Remove crypto_lookup_aead callHerbert Xu2015-08-171-32/+0
| | | | | | | | | | | | | | As IV generators are now standalone AEAD transforms, we no longer need to use the crypto_lookup_aead call. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: algboss - Remove reference to nivaeadHerbert Xu2015-08-171-7/+5
| | | | | | | | | | | | | | This patch removes a legacy reference to nivaead which is no longer used. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - Remove unneeded 'ret' variableFabio Estevam2015-08-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Variable 'ret' is only used for returning the value 0. We can make it simpler and just return 0 instead. The semantic patch that makes this change is available in scripts/coccinelle/misc/returnvar.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: caam - Fix error handling in caam_rng_init()Fabio Estevam2015-08-131-3/+11
| | | | | | | | | | | | | | | | | | In the error paths we should free the resources that were previously acquired, so fix it accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - fix simple_return.cocci warningsWu Fengguang2015-08-131-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | drivers/crypto/qat/qat_common/adf_sriov.c:258:1-4: WARNING: end returns can be simpified and declaration on line 212 can be dropped Simplify a trivial if-return sequence. Possibly combine with a preceding function call. Generated by: scripts/coccinelle/misc/simple_return.cocci CC: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - Fix unmet direct dependencies for QAT_DH895xCCVFTadeusz Struk2015-08-131-0/+2
| | | | | | | | | | | | Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * ARM: dts: sun6i: Add security system crypto engine clock and device nodesChen-Yu Tsai2015-08-131-0/+18
| | | | | | | | | | | | | | | | A31/A31s have the same "Security System" crypto engine as A10/A20, but with a separate reset control. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: sunxi-ss - Add optional reset control supportChen-Yu Tsai2015-08-132-0/+24
| | | | | | | | | | | | | | | | On sun6i and later platforms, the reset control is split out of the clock gates. Add support for an optional reset control. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: sunxi-ss - Document optional reset control bindingsChen-Yu Tsai2015-08-131-0/+4
| | | | | | | | | | | | | | | | | | Later Allwinner SoCs split out the reset controls for individual modules out of the clock gate controls. The "Security System" crypto engine is no different. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - Fix adf_isr_resource_free name clashTadeusz Struk2015-08-113-7/+7
| | | | | | | | | | | | | | | | | | When both PF and VF drivers are build in linker complains about multiple definition of adf_isr_resource_[alloc/free] functions. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * Fix email address mistypo for NX/VMX crypto driver maintainersPaulo Flabiano Smorigo2015-08-111-2/+2
| | | | | | | | Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: nx - Removing CTR mode from NX driverLeonidas Da Silva Barbosa2015-08-103-30/+1
| | | | | | | | | | | | | | | | | | | | | | CTR hardware implementation does not match with kernel spec causing a counter bug where just low 8 bytes are used for counter, when should be all 16bytes. Since we already have other counter modes working according with specs not worth to keep CTR itself on NX. Signed-off-by: Leonidas S. Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * Update NX crypto driver maintainers and adding VMX maintainersLeonidas Da Silva Barbosa2015-08-101-2/+14
| | | | | | | | | | | | | | | | | | | | Marcelo and Fin are no long IBMers, thus no longer NX maintainers. Updating with the new names. Adding VMX crypto maintainers. Signed-off-by: Leonidas S. Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * PCI: Add quirk for Intel DH895xCC VF PCI config erratumTadeusz Struk2015-08-101-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | The PCI capabilities list for Intel DH895xCC VFs (device id 0x0443) with QuickAssist Technology is prematurely terminated in hardware. Workaround the issue by hard-coding the known expected next capability pointer and saving the PCIE cap into internal buffer. Patch generated against cryptodev-2.6 Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - Add FW const tableTadeusz Struk2015-08-101-1/+106
| | | | | | | | | | | | | | Some VF drivers need FW const table, so the PF driver needs to load it. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: qat - Add qat dh895xcc VF driverTadeusz Struk2015-08-108-0/+965
| | | | | | | | | | | | | | Add code specific for the dh895xcc virtual function. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-23 12:59:01 +0100