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* ARM: S3C6410: update clk->parent when setting clock sourceThomas Abraham2009-09-161-0/+2
| | | | | | | | | This ensures the clock hierarchy data structures are updated when we change the clock source in the actual hardware registers. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> [ben-linux@fluff.org: Minor re-indentation of subject] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C6410: use correct divider_shift in setrate_clksrc()Thomas Abraham2009-09-161-2/+2
| | | | | | | | | | In s3c64xx_setrate_clksrc() we used sclk->shift, but actually need to use sclk->divider_shift to correctly calculate the value for the divider register. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> [ben-linux@fluff.org: Minor re-indentation of description] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: Show FIQ in /proc/interrupts on CONFIG_FIQBen Dooks2009-08-171-1/+1
| | | | | | | | | | The show_fiq_list() call in arch/arm/kernel/irq.c currently depends on CONFIG_ARCH_ACORN, but this is not the only architecture that supports the usage of FIQ. Change to calling this if CONFIG_FIQ is set (which is what arch/arm/kernel/fiq.c is built by). Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: Add S3C_DEV_NAND Kconfig entryBen Dooks2009-08-174-1/+8
| | | | | | | | | | | | Currently the S5PC100 does not define S3C_PA_NAND, leaving the NAND device definitions in arch/arm/plat-s3c/dev-nand.c unbuildable. Add a KConfig entry to select whether this is built. As backwards compatibility, both the S3C24XX and S3C64XX define the new configuration in their main Kconfig files until better support for basing this selection on a per-machine basis can be sorted out. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: Board and configuration fileByungho Min2009-08-172-0/+995
| | | | | | | | | SMDKC100 board support. The board can be obtained from meritech (http://www.meritech.co.kr) Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: fixup subject and description] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: Kconfigs and MakefilesByungho Min2009-08-178-1/+133
| | | | | | | | | | | S5PC100 is a new SoC with ARM coretex-A8 and numerous peripherals. This SoC is successor of S3C64XX. S5PC100 has peripherals which are still similar to S3C families so some drivers in "arch/arm/plat-s3c" can be shared. S5PC100 specific drivers will be added in "arch/arm/plat-s5pcxx" or "arch/arm/mach-s5pc100" Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: tidy and edit description] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: Clock and PLL supportByungho Min2009-08-173-0/+1598
| | | | | | | | | S5PC100 has 4 PLLs (APLL,MPLL,EPLL,HPLL) and 3 clock domains. Clock scheme is implemented here. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: edited title] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: IRQ and timerByungho Min2009-08-176-0/+564
| | | | | | | | | | S5PC100 has 3 VICs(Vectored Interrupt Controller). The VICs come from S3C64xx series, so the driver source code can be shared with S3C families. The S5PC100 has 3 VICs while S3C64xx has only 2. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: GPIO and I2CByungho Min2009-08-174-0/+217
| | | | | | | | | S5PC100 has more GPIO group then previous one. It has 34 groups of GPIO, while S3C6410 has 17 groups. For now, only header files are written. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: CPU initializationByungho Min2009-08-179-0/+455
| | | | | | Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: UART and SerialByungho Min2009-08-173-1/+183
| | | | | | | | | | Serial driver of S5PC100 is the same as S3C6400, so S5PC100 shares the serial driver with S3C6400. Uart driver is copied from plat-s3c64xx to plat-s5pc1xx, as I do not use plat-s3c64xx directory. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: title fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: Memory mapByungho Min2009-08-172-0/+93
| | | | | | | | | | S5PC100's the physical IO space starts at 0xe000"0000. To maximize space for vmalloc, the virtual IO space starts at 0xf400"0000 as same as other samsung CPUs(s3c24xx and s3c64xx) do. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject and description fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Merge branch 'next-s3c64xx-moves' into next-s3cBen Dooks2009-08-1412-24/+48
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| * ARM: S3C: Move S3C64xx audio devices into S3C64xx directoryMark Brown2009-08-143-2/+2
| | | | | | | | | | | | | | Allowing us to make the Kconfig a little bit saner. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * ARM: S3C: move timer/pwm handling from plat-s3c24xx to plat-s3cPeter Korsgaard2009-07-313-3/+7
| | | | | | | | | | | | | | | | The s3c64xx devices use the same hardware core as s3c24xx, so move the timer/pwm handling to plat-s3c so it can be used by both. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * ARM: S3C: move s3c_device_nand from plat-s3c24xx to plat-s3cPeter Korsgaard2009-07-318-19/+39
| | | | | | | | | | | | | | | | Move the s3c_device_nand platform device from plat-s3c24xx to plat-s3c, now that the nand driver also support the s3c64xx devices. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | Merge branch 'next-s3c64xx' into next-s3cBen Dooks2009-08-143-7/+23
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| * | ARM: S3C64XX: Add address mapping for AC97 controllerMark Brown2009-08-141-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | ARM: S3C64XX: Add mapping for IISv4 portMark Brown2009-08-141-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | ARM: S3C64XX: Add UART2,UART3 support for SMDK6410 (resend)Matt Hsu2009-08-141-6/+20
| | | | | | | | | | | | | | | | | | | | | Add proper uartcfg for UART port 2,3 and tidy it up on SMDK6410. Signed-off-by: Matt Hsu <matt@0xlab.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | ARM: NCP: make ncp_iodesc static and move it to initdata sectionMarek Szyprowski2009-08-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make ncp_iodesc struct static to clean a public namespace a bit and move it to __initdata section to save memory a bit. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | | Merge branch 'next-s3c24xx-cpufreq' into next-s3cBen Dooks2009-08-1438-26/+3605
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| * | | ARM: S3C: CPUFREQ: Add debugfs support for cpufreqBen Dooks2009-07-3110-0/+317
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add debugfs support for the cpufreq driver to allow information about the system state to be exported to the user. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C: CPUFREQ: Add documentation for systemBen Dooks2009-07-311-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add documentation for the S3C24XX style CPUFREQ driver. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2410: Add armclk for cpufreq supportBen Dooks2009-07-311-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add armclk for use with the cpufreq support and anything else that may want it. This clock is just a direct descendant of fclk. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: BAST: CPUFREQ: Add board supportBen Dooks2009-07-311-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add board support for CPUFREQ with the Simtec BAST board registering the necessary information with the core. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2410: Add S3C2410A sysdev.Ben Dooks2009-07-317-2/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a sysdev S3C2410A sysdev to allow the differentiation of the S3C2410A from the S3C2410. This is needed for the CPUFREQ code to enable the extra features and update cpu specific information. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C24XX: CPUFREQ: S3C2412/S3C2443 IO timing supportBen Dooks2009-07-316-1/+329
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IO bank timing support for S3C2412/S3C2443. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2412: Update memory register mapping and definitionsBen Dooks2009-07-313-2/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the mapping of the memory controler registers and add the missing definitions of the register block for the SSMC. The register contents definitions can be found in the pl093 header. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C: Update CPU register mapping practices.Ben Dooks2009-07-312-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently map-base.h defines the main virtual address mappings made for all the support S3C SoC series, but does not then define any base for per-cpu mappings to be made from. Add S3C_ADDR_CPU() macro to define an virtual address as an offset from the last of the core mappings. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: PL093: Header file for PL093 SSMC PrimeCellBen Dooks2009-07-311-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Header to define the standard registers for an PL093 SSMC memory controller. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2412: CPUFREQ: Add core support.Ben Dooks2009-07-313-0/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add core support for frequency scaling on the S3C2412 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: OSIRIS: CPUFREQ: Add CPU frequency scaling supportBen Dooks2009-07-312-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CPU frequency scalling support to the Simtec Osiris. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2440: CPUFREQ: Add crystal frequency Kconfig entries.Ben Dooks2009-07-312-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add entries to select the crystal to select for each different supported board. This information is then available for anything else requiring this, such as the CPUFreq PLL tables. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2440: CPUFREQ: Add PLL tablesBen Dooks2009-07-314-0/+241
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PLL tables for the S3C2440. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2440: CPUFREQ: Add core support.Ben Dooks2009-07-313-0/+318
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add core support for frequency scaling on the S3C2440 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2410: CPUFREQ: Add PLL tableBen Dooks2009-07-313-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PLL table for the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2410: CPUFREQ: Add core support.Ben Dooks2009-07-316-0/+241
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add core support for frequency scaling on the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C2410: CPUFREQ: Add io-timing support.Ben Dooks2009-07-313-0/+442
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add io-timing support for frequency scaling on the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: Add S3C24XX to CPUFreq KConfigBen Dooks2009-07-311-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the S3C24XX to the main ARM CPUFreq Kconfig support list. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: Add ARCH_HAS_CPUFREQ for presence of CPUFREQ driverBen Dooks2009-07-311-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ARCH_HAS_CPUFREQ so that each machine config can select it if they have CPUFREQ driver support. This means that the CPUFREQ specific area does not need the if statement updating each time a new machine is added. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.hBen Dooks2009-07-312-20/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the structure s3c_cpufreq_config from cpu-freq.h to the less advertised cpu-freq-core.h as it is not needed by anything outside the core drivers. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C: CPUFREQ: Documentation for cpufreq headerBen Dooks2009-07-311-10/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update arch/arm/plat-s3c/include/plat/cpu-freq.h to include kerneldoc style documentation. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C24XX: CPUFREQ: Add core support.Ben Dooks2009-07-313-0/+889
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the core of the support for enabling the CPUFreq driver on all S3C24XX based systems. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C24XX: Add BWSCON per-bank information.Ben Dooks2009-07-311-0/+10
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Add definitions and an accessor macro to deal with reading bus information from S3C2410_BWSCON for any given numbered bank. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | | Merge branch 'next-s3c24xx' into next-s3cBen Dooks2009-08-1411-7/+157
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| * | | ARM: S3C24XX: Add SPI bus 1 on GPD8 through GPD10Ben Dooks2009-08-145-1/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add configuration callback for SPI bus 1 on GPD[8..10] and ensure the correct GPIO configuration register definitions in regs-gpio.h Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C24XX: Add platform device for AC97 controllerMark Brown2009-08-144-6/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the definition of the "generic" IRQ in the process. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | ARM: S3C24XX: Add FIQ IRQ routing supportBen Dooks2009-08-142-0/+49
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for routing an IRQ from the normal ARM IRQ mechanism to the FIQ input of the processor. Note, also fix a bug where the init_FIQ() function has not been called when CONFIG_FIQ is enabled. Signed-off-by; Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | | Merge branch 'next-s3c-machines' into next-s3cBen Dooks2009-08-143-2/+287
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