summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
...
| | * | | | | clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some pllsHeiko Stuebner2014-11-252-5/+5
| | * | | | | clk: rockchip: add optional sync to pll rate parametersHeiko Stuebner2014-11-252-0/+56
| | * | | | | clk: rockchip: setup pll_mux data earlierHeiko Stuebner2014-11-251-14/+13
| | * | | | | clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner2014-11-255-13/+19
| | * | | | | clk: rockchip: fix rk3188 USB HSIC PHY clock dividerJulien CHAUVEAU2014-11-231-1/+1
| | * | | | | clk: rockchip: fix clock gate for rk3188 spdif_preJulien CHAUVEAU2014-11-231-16/+9
| | * | | | | clk: rockchip: fix parent clock for rk3188 hclk_lcdc1Julien CHAUVEAU2014-11-181-1/+1
| * | | | | | clk: clk-s2mps11: fix semicolon.cocci warningskbuild test robot2014-11-261-1/+1
| * | | | | | Merge tag 'sunxi-clocks-for-3.19' of https://git.kernel.org/pub/scm/linux/ker...Michael Turquette2014-11-2515-94/+380
| |\ \ \ \ \ \
| | * | | | | | clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT muxHans de Goede2014-11-231-1/+6
| | * | | | | | clk: sunxi: Implement A31 PLL6 as a divs clock for 2x outputChen-Yu Tsai2014-11-232-14/+33
| | * | | | | | clk: sunxi: Specify number of child clocks for divs clocksChen-Yu Tsai2014-11-231-2/+9
| | * | | | | | clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driverChen-Yu Tsai2014-11-232-8/+0
| | * | | | | | ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks.Chen-Yu Tsai2014-11-232-20/+4
| | * | | | | | ARM: dts: sunxi: unify APB1 clockEmilio López2014-11-234-40/+8
| | * | | | | | clk: sunxi: unify APB1 clockEmilio López2014-11-112-6/+2
| | * | | | | | clk: sunxi: Add support for bus clock gates on Allwinner A80 SoCChen-Yu Tsai2014-10-212-0/+36
| | * | | | | | clk: sunxi: Add support for A80 basic bus clocksChen-Yu Tsai2014-10-213-0/+277
| | * | | | | | clk: sunxi: make factors clock mux mask configurableChen-Yu Tsai2014-10-215-3/+5
| * | | | | | | Merge branch 'clk-fixes' into clk-nextMichael Turquette2014-11-257-34/+32
| |\ \ \ \ \ \ \
| * | | | | | | | clk: hi3620: Move const initdata into correct code sectionBintian Wang2014-11-201-35/+35
| * | | | | | | | clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT && index >= 3Hans de Goede2014-11-191-1/+1
| * | | | | | | | Merge branch 'for-v3.19/exynos-clk' of git://linuxtv.org/snawrocki/samsung in...Michael Turquette2014-11-1912-164/+2655
| |\ \ \ \ \ \ \ \ | | | |_|_|_|/ / / | | |/| | | | | |
| | * | | | | | | clk: samsung: exynos7: add gate clock for ADC blockAbhilash Kesavan2014-10-312-1/+4
| | * | | | | | | clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocksNaveen Krishna Ch2014-10-312-2/+21
| | * | | | | | | clk: samsung: exynos7: add clocks for RTC blockNaveen Krishna Ch2014-10-313-1/+65
| | * | | | | | | clk: samsung: exynos7: add clocks for MMC blockNaveen Krishna Ch2014-10-313-0/+265
| | * | | | | | | clk: samsung: exynos7: add clocks for I2C blockNaveen Krishna Ch2014-10-312-2/+38
| | * | | | | | | clk: samsung: add initial clock support for Exynos7 SoCNaveen Krishna Ch2014-10-314-0/+542
| | * | | | | | | clk: samsung: Add fixed_factor_clocks field to struct exynos_cmu_infoNaveen Krishna Ch2014-10-312-0/+6
| | * | | | | | | clk: samsung: Factor out the common code to clk.cNaveen Krishna Ch2014-10-313-159/+155
| | * | | | | | | clk: samsung: add support for 145xx and 1460x PLLsNaveen Krishna Ch2014-10-312-5/+24
| | * | | | | | | clk: samsung: exynos4415: Add clocks using common clock frameworkChanwoo Choi2014-10-303-0/+1503
| | * | | | | | | clk: samsung: Document binding for Exynos4415 clock controllerChanwoo Choi2014-10-301-0/+38
| | | |/ / / / / | | |/| | | | |
| * | | | | | | clk: shmobile: Deprecate renesas,clock-indicesGeert Uytterhoeven2014-11-191-4/+4
| * | | | | | | Merge branch 'clk-next-shmobile' into clk-nextMichael Turquette2014-11-192-18/+113
| |\ \ \ \ \ \ \
| | * | | | | | | clk: shmobile: document DIV6 clock parent bindingsUlrich Hecht2014-11-121-6/+12
| | * | | | | | | clk: shmobile: div6: support selectable-input clocksUlrich Hecht2014-11-121-12/+101
| * | | | | | | | clk: delete a local variable's repeated assignmentZhen Lei2014-11-191-1/+1
| * | | | | | | | Merge tag 'v3.19-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Michael Turquette2014-11-194-107/+169
| |\ \ \ \ \ \ \ \ | | | |_|_|/ / / / | | |/| | | | | |
| | * | | | | | | clk: rockchip: fix clock select order for rk3288 usbphy480m_srcKever Yang2014-11-161-2/+2
| | * | | | | | | clk: rockchip: fix rk3288 clk_usbphy480m_gate bit location in registerKever Yang2014-11-161-1/+1
| | * | | | | | | clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabledDmitry Torokhov2014-11-131-2/+2
| | * | | | | | | clk: rockchip: rk3288: add suspend and resumeChris Zhong2014-11-101-0/+60
| | * | | | | | | clk: rockchip: fix rk3188 hsadc_frac definitionHeiko Stübner2014-11-071-2/+2
| | * | | | | | | clk: rockchip: disable unused clocksKever Yang2014-11-043-92/+83
| | * | | | | | | clk: rockchip: change PLL setting for better clock jitterKever Yang2014-10-292-1/+10
| | * | | | | | | clk: rockchip: add npll to source of sclk_gpuKever Yang2014-10-201-4/+4
| | * | | | | | | clk: rockchip: rk3288: removing the CLK_SET_RATE_PARENT from i2s_clkoutJianqun2014-10-201-1/+1
| | * | | | | | | clk: rockchip: add 400MHz and 500MHz for rk3288 clock rateKever Yang2014-10-201-0/+2
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 09:25:01 +0100