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* Merge tag 'renesas-boards-lager-for-v3.10' of ↵Olof Johansson2013-04-113-2/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2 From Simon Horman: Renesas ARM based SoC lager board updates for v3.10 * Use r8a7790 timer setup code to force the arch timer to be enabled regardless of the bootloader setting - This is necessary for the lager board to boot This pull request is based on: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-boards3-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc-r8a7790-for-v3.10 The merge was made to provide the r8a7790 timer setup code * tag 'renesas-boards-lager-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: use r8a7790 timer setup code on Lager ARM: shmobile: force enable of r8a7790 arch timer ARM: shmobile: Add second I/O range for r8a7790 PFC Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: shmobile: use r8a7790 timer setup code on LagerMagnus Damm2013-04-091-1/+1
| | | | | | | | | | | | | | | | | | | | Use the r8a7790 timer init function on Lager to make sure the architected timer is started regardless of boot loader setting. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * Merge branch 'soc-r8a7790' into boards-lagerSimon Horman2013-04-092-1/+15
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| | * ARM: shmobile: force enable of r8a7790 arch timerMagnus Damm2013-04-092-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a SoC-specific timer init function for r8a7790 that makes sure the architected timer is started regardless of boot loader setting. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: shmobile: Add second I/O range for r8a7790 PFCMagnus Damm2013-04-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the GPIO I/O memory range to the r8a7790 PFC device. This extra I/O memory range is needed when using the PFC tables to drive both pin functions (using PINCTRL or function GPIO for old code) and actual GPIO. The goal is however to use a separate GPIO driver in the long run and when that happens this extra I/O memory range can be removed. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | Merge tag 'renesas-boards-bockw-for-v3.10' of ↵Arnd Bergmann2013-04-096-17/+114
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2 From Simon Horman <horms+renesas@verge.net.au>: Renesas ARM-based SoC bockw board updates for v3.10 Add SMSC ethernet support to the bockw board. This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc-r8a7778-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-boards3-for-v3.10 The reason for merging with renesas-soc-r8a7778-for-v3.10 is to provide pre-requisite SoC code to configure IRQ pins for the SMSC ethernet. * tag 'renesas-boards-bockw-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: bockw: enable network settings on bootargs ARM: shmobile: bockw: add SMSC ethernet support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: shmobile: bockw: enable network settings on bootargsKuninori Morimoto2013-04-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "ip" and "root" settings are useful for development Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: bockw: add SMSC ethernet supportKuninori Morimoto2013-04-052-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SMSC ethernet support on Bock-W Bock-W SMSC needs FPGA settings which enables interrupt. This patch does it on bockw_init() function. As notes for future, this FPGA settings should be updated, since this FPGA is using cascaded interrupt. Current code is assuming that this FPGA interrupt user is only SMSC. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | Merge branch 'soc-r8a7778' into boards-bockw-baseSimon Horman2013-04-053-16/+74
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| | * | ARM: shmobile: R8A7778: add Ether supportSergei Shtylyov2013-04-053-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Ether clock and platform device for R8A7778 SoC; add a function to register this device with board-specific platform data. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin()Kuninori Morimoto2013-04-042-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds r8a7778_init_irq_extpin() for IRQ0 - IRQ3. But this patch doesn't enable DT settings on r8a7778.dts, because R8A7778 chip external IRQ depends on IRQ0 - IRQ3 pin encoding which came from platform board implementation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO()Kuninori Morimoto2013-04-041-17/+9
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | remove pointless PLATFORM_INFO() macro from setup-r8a7778, and, used original platform_device_register_xxx() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | Merge tag 'renesas-defconfig-bockw-for-v3.10' of ↵Arnd Bergmann2013-04-081-3/+31
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2 From Simon Horman <horms+renesas@verge.net.au>: Renesas ARM based SoC bockw defconfig updates for v3.10 An update to the defconfig for the bockw board to enable SMSC ethernet. This is based on: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards3-for-v3.10 The reason for using that base is that the bockw defconfig was added in the boards branch instead of the defconfig branch, which was not ideal. * tag 'renesas-defconfig-bockw-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: bockw: enable SMSC ethernet on defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: shmobile: bockw: enable SMSC ethernet on defconfigKuninori Morimoto2013-04-041-3/+31
| |/ / | | | | | | | | | | | | | | | | | | | | | This patch adds SMSC ethernet support on Bock-W defconfig Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | Merge tag 'renesas-boards3-for-v3.10' of ↵Olof Johansson2013-04-03141-7600/+16949
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2 Third round of Renesas ARM SoC board updates for v3.10 Highlights: * Add Lager board support * Add ape6evm board support * Add Bock-W board support * Mackerel MMCIF/SDHI clean ups * Add ethernet support to kzm9g-reference This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10 The merge with renesas-pinmux2-for-v3.10 was made to provide run-time dependencies for the following changes: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support * tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (307 commits) ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection ARM: shmobile: mackerel: add interrupt names for SDHI0 ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio ARM: shmobile: mackerel: remove OCR masks, where regulators are used ARM: shmobile: mackerel: SDHI resources do not have to be numbered ARM: shmobile: Initial r8a7790 Lager board support ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support ARM: shmobile: APE6EVM base support ARM: shmobile: kzm9g-reference: add ethernet support ARM: shmobile: add R-Car M1A Bock-W platform support sh-pfc: r8a73a4: Remove unused GPIO bias data ARM: shmobile: r8a73a4: Remove all GPIO enums sh-pfc: r8a73a4: Remove function GPIOs ARM: shmobile: r8a73a4: Remove IRQC function GPIOs ARM: shmobile: r8a73a4: Remove SCIF function GPIOs sh-pfc: r8a73a4: Remove IRQC function GPIOS sh-pfc: r8a73a4: Remove SCIF function GPIOS sh-pfc: r8a73a4: Add IRQC pin groups and functions sh-pfc: r8a73a4: Add SCIF pin groups and functions ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selectionGuennadi Liakhovetski2013-04-031-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMCIF and SDHI1 share the same slot on mackerel. One of them is selected by a jumper, which cannot be queried from software. Currently in software one of the two interfaces is selected, depending whether or not the MMCIF driver is enabled. This is not optimal, since the kernel has to be rebuilt to switch from one interface to another. Still, so far there isn't a better option. At least make this selection consistent. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: mackerel: add interrupt names for SDHI0Guennadi Liakhovetski2013-04-031-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | To unify with SDHI1 also use named IRQs for SDHI0. This also clarifies which specific IRQs are used. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpioGuennadi Liakhovetski2013-04-031-27/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Both SDHI and MMCIF drivers can use the standard slot-gpio card-detection functions. Switch mackerel to using them instead of platform callbacks. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: mackerel: remove OCR masks, where regulators are usedGuennadi Liakhovetski2013-04-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Both SDHI and MMCIF drivers ignore their OCR platform values, when available voltages can be retrieved from regulators. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: mackerel: SDHI resources do not have to be numberedGuennadi Liakhovetski2013-04-031-21/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | The SDHI driver doesn't care about platform resource order, explicit resource numbering is redundant. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: Initial r8a7790 Lager board supportMagnus Damm2013-04-035-1/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: APE6EVM LAN9220 supportMagnus Damm2013-04-032-1/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add LAN9220 support to the APE6EVM board using C and DT. At this point the PFC driver lacks DT bindings so to configure the PFC we use PINCTRL in C board code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: APE6EVM PFC supportMagnus Damm2013-04-031-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Start using the r8a73a4 PFC on the APE6EVM board and configure the SCIFA0 console signals in the PFC via PINCTRL. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: APE6EVM base supportMagnus Damm2013-04-035-1/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | V3 of APE6EVM base board support making use of 1 GiB of memory, the SCIFA0 serial port and ARM architected timer. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: kzm9g-reference: add ethernet supportGuennadi Liakhovetski2013-04-031-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add a DT node for the SMSC 9221 ethernet chip, found on kzm9g, to its reference implementation. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: add R-Car M1A Bock-W platform supportKuninori Morimoto2013-04-036-0/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic Bock-W board support More devices will be added on top of this patch after PICNTRL and clock framework are in better shape. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | Merge tag 'renesas-pinmux2-for-v3.10' into boards-baseSimon Horman2013-04-0358-1883/+6120
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 This merge is made to supply run-time dependencies for the following patches that will bea added on top: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support
| | * | sh-pfc: r8a73a4: Remove unused GPIO bias dataMagnus Damm2013-04-031-161/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused pull-up/down data from the r8a73a4 PFC code. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a73a4: Remove all GPIO enumsMagnus Damm2013-04-031-815/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Remove function GPIOsMagnus Damm2013-04-031-737/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All r8a73a4 platforms use the pinctrl API to control pin functions. Function GPIOs are no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a73a4: Remove IRQC function GPIOsMagnus Damm2013-04-031-58/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove IRQ pin function GPIOs that have been deprecated by the pinctrl API. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a73a4: Remove SCIF function GPIOsMagnus Damm2013-04-031-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove SCIF function GPIOs that have been deprecated by the pinctrl API. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Remove IRQC function GPIOSMagnus Damm2013-04-031-58/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a73a4 board support will use the pinctrl API to control the external IRQ pins so remove the unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Remove SCIF function GPIOSMagnus Damm2013-04-031-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a73a4 board support will use the pinctrl API to control the SCIF pins, remove the corresponding unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Add IRQC pin groups and functionsMagnus Damm2013-04-031-0/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2 of PINCTRL support for r8a73a4 IRQC hardware and in particular the external pins IRQ0 -> IRQ57. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Add SCIF pin groups and functionsMagnus Damm2013-04-031-0/+287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and SCIFB0->SCIFB3. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf supportMagnus Damm2013-04-031-1/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: GPIO IRQ supportMagnus Damm2013-04-031-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2 of code to add GPIO -> IRQ mappings to the PFC table for the r8a73a4 SoC. Requires the IRQs to be mapped at a fixed location in Linux IRQ space. The actual IRQs are not handled by the PFC, instead IRQC is used on r8a73a4. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a73a4: Support sparse GPIO numbersMagnus Damm2013-04-032-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers in the PFC SoC data. Pin numbers shall be used with the GPIO API from this point on. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: Add r8a73a4 pinmux supportMagnus Damm2013-04-036-0/+3754
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a7779: Split DU input and output pixel clocksLaurent Pinchart2013-04-031-21/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The output pixel clocks can be used without the input pixel clocks. Split them in different groups. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: r8a7779: Remove GPIO dataLaurent Pinchart2013-04-031-57/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIOs are now handled by a separate driver, remove GPIO data from the SoC information structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a7779: Register GPIO devicesLaurent Pinchart2013-04-031-6/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move GPIOs handling from the PFC device to separate GPIO devices. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: Configure pins as GPIOs at request time when handled externallyLaurent Pinchart2013-04-032-21/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a GPIO is handled by a separate driver the pinmux gpio_set_direction() handler won't be called. The pin mux type then need to be configured to GPIO at request time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: Skip gpiochip registration when no GPIO resource is foundLaurent Pinchart2013-04-031-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boards/platforms that register dedicated GPIO devices will not supply a memory resource for GPIOs. Try to locate the GPIO memory resource at initialization time, and skip registration of the gpiochip if the resource can't be found. This is a temporary modification to ease the transition to separate GPIO drivers. It should be reverted when all boards and platforms will have been moved. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: Make GPIO support optionalLaurent Pinchart2013-04-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When implemented as a separate IP block, GPIOs should be handled by a separate driver. To make this possible GPIO support needs to be optional in the sh-pfc driver. If no GPIO data registers are supplied in the SoC information structure skip registration of the gpiochip. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | sh-pfc: Make function GPIOs support optionalLaurent Pinchart2013-04-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The target is to get rid of function GPIOs completely. To reach this, make function GPIOs support optional by skipping the function GPIO chip registration if no function GPIOS are defined in SoC data. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: marzen: Add GPIO LEDsLaurent Pinchart2013-04-031-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board has 3 LEDs connected to GPIOs. Add a led-gpio device to support them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | gpio-rcar: Add pinctrl supportLaurent Pinchart2013-04-032-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register the GPIO pin range, and request and free GPIO pins using the pinctrl API. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | gpio: Renesas R-Car GPIO driver V3Magnus Damm2013-04-034-0/+405
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is V3 of a GPIO driver for the R-Car series of SoCs from Renesas. This driver is designed to be reusable between multiple SoCs that share the same basic building block, but so far it has only been used on R-Car H1 (r8a7779). Each driver instance handles 32 GPIOs with individually maskable IRQs. The driver operates on a single I/O memory range and the 32 GPIOs are hooked up a single interrupt. In the case of R-Car H1 either external IRQ pins or GPIOs with interrupts can be used for on-board interupts. For external IRQs 4 pins are supported, and in the case of GPIO there are 202 GPIOS as 202 interrupts hooked up via 6 driver instances and to the GIC and the Cortex-A9 Quad. At this point this driver is interfacing as a regular platform device driver. In the future DT support will be submitted as an incremental feature patch. Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-14 06:38:44 +0100