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* MIPS: Loongson-3: Calculate ra properly when unwinding the stackHuacai Chen2020-09-211-1/+15
* MIPS: Loongson-3: Enable COP2 usage in kernelHuacai Chen2020-09-216-7/+19
* MIPS: context switch: Use save/restore instead of set/clear for Status.CU2Huacai Chen2020-09-211-1/+3
* MIPS: kernel: include probes-common.h header in branch.cPujin Shi2020-09-211-0/+2
* MIPS: Make setup_elfcorehdr and setup_elfcorehdr_size staticJason Yan2020-09-211-1/+1
* MAINTAINERS: Update paths to Ingenic platform codePaul Cercueil2020-09-181-2/+3
* MIPS: configs: Regenerate configs of Ingenic boardsPaul Cercueil2020-09-186-35/+11
* MIPS: jz4740: Rename jz4740 folders to ingenicPaul Cercueil2020-09-184-2/+2
* MIPS: jz4740: Drop all obsolete filesPaul Cercueil2020-09-184-170/+0
* MIPS: generic: Add support for Ingenic SoCsPaul Cercueil2020-09-187-18/+149
* MIPS: generic: Increase NR_IRQS to 256Paul Cercueil2020-09-181-1/+1
* MIPS: generic: Add support for zbootPaul Cercueil2020-09-182-0/+2
* MIPS: generic: Support booting with built-in or appended DTBPaul Cercueil2020-09-181-5/+4
* MIPS: generic: Init command line with fw_init_cmdline()Paul Cercueil2020-09-181-1/+1
* MIPS: generic: Allow boards to set system typePaul Cercueil2020-09-181-0/+5
* MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbolPaul Cercueil2020-09-182-3/+7
* MIPS: cpu-probe: ingenic: Fix broken BUG_ONPaul Cercueil2020-09-181-1/+1
* MIPS: cpu-probe: Mark XBurst CPU as having vtagged cachesPaul Cercueil2020-09-181-0/+3
* MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WAPaul Cercueil2020-09-182-6/+2
* MIPS: configs: lb60: Fix defconfig not selecting correct boardPaul Cercueil2020-09-181-0/+1
* MIPS: Loongson64: Increase NR_IRQS to 320Huacai Chen2020-09-181-1/+2
* MIPS: netlogic: Remove unused codeYouling Tang2020-09-181-15/+0
* MIPS: OCTEON: use devm_platform_ioremap_resourceQinglang Miao2020-09-181-9/+1
* MIPS: pci: use devm_platform_ioremap_resource_bynameZhang Qilong2020-09-183-11/+7
* MIPS: Correct the header guard of r4k-timer.hWei Li2020-09-181-3/+3
* MIPS: Remove mach-*/war.hThomas Bogendoerfer2020-09-0713-132/+0
* MIPS: Get rid of CAVIUM_OCTEON_DCACHE_PREFETCH_WARThomas Bogendoerfer2020-09-073-5/+2
* MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer2020-09-0714-51/+5
* MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer2020-09-0714-25/+4
* MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer2020-09-0715-22/+6
* MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer2020-09-0719-31/+15
* MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer2020-09-0715-23/+16
* MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer2020-09-0715-26/+12
* MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer2020-09-0713-59/+0
* MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer2020-09-0716-41/+22
* MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer2020-09-0716-46/+33
* MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer2020-09-0715-24/+12
* MIPS: dts/ingenic: Cleanup qi_lb60.dtsPaul Cercueil2020-09-071-69/+68
* MIPS: Loongson64: Remove unused loongson_reboot.Jinyang He2020-09-071-5/+0
* MIPS: p5600: Discard UCA config selectionJinyang He2020-09-031-1/+0
* MIPS: Use rcu to lookup a task in mipsmt_sys_sched_setaffinity()Davidlohr Bueso2020-09-031-2/+2
* MIPS: Add support for ZSTD-compressed kernelsPaul Cercueil2020-09-034-1/+24
* lib: decompress_unzstd: Limit output sizePaul Cercueil2020-09-031-1/+6
* MIPS: SGI-IP32: No need to include mc14818*.hThomas Bogendoerfer2020-08-261-2/+0
* MIPS: Remove unused header file m48t37.hThomas Bogendoerfer2020-08-261-36/+0
* MIPS: Loongson2ef: Remove specific mc146818rtc.hThomas Bogendoerfer2020-08-261-36/+0
* MIPS: SGI-IP27: No need for kmalloc.hThomas Bogendoerfer2020-08-261-8/+0
* MIPS: Remove PNX833x alias NXP_STB22xThomas Bogendoerfer2020-08-2418-1409/+0
* MIPS: Paravirt: remove remaining pieces of paravirtThomas Bogendoerfer2020-08-243-106/+0
* MIPS: BCM47xx: Include bcm47xx_sprom.hFlorian Fainelli2020-08-171-3/+1
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