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* powerpc/powernv: I/O and memory alignment for P2P bridgesGavin Shan2012-09-121-0/+39
| | | | | | | | | | | | | | The patch implements ppc_md.pcibios_window_alignment for powernv platform so that the resource reassignment in PCI core will be done according to the I/O and memory alignment returned from powernv platform. The alignments returned from powernv platform is closely depending on the scheme for PE segmenting. Besides, the patch isn't useful for now, but the subsequent patches will be working based on it. [bhelgaas: use pci_pcie_type() since pci_dev.pcie_type was removed] Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* powerpc/PCI: Override pcibios_window_alignment()Gavin Shan2012-09-122-0/+23
| | | | | | | | | | This patch implements pcibios_window_alignment() so powerpc platforms can force P2P bridge windows to be at larger alignments than the PCI spec requires. [bhelgaas: changelog] Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Refactor pbus_size_mem()Gavin Shan2012-09-121-13/+23
| | | | | | | | | The original idea comes from Ram Pai. This patch puts the chunk of code for calculating the minimal alignment of memory window into a separate inline function. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Align P2P windows using pcibios_window_alignment()Gavin Shan2012-09-121-9/+6
| | | | | | | | | | This patch changes pbus_size_io() and pbus_size_mem() to do window (I/O, memory and prefetchable memory) reassignment based on the minimal alignments for the P2P bridge, which was retrieved by window_alignment(). [bhelgaas: changelog] Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Add weak pcibios_window_alignment() interfaceGavin Shan2012-09-122-0/+34
| | | | | | | | | | | | This patch implements a weak function to return the default I/O or memory window alignment for a P2P bridge. By default, I/O windows are aligned to 4KiB or 1KiB and memory windows are aligned to 4MiB. Some platforms, e.g., powernv, have special alignment requirements and can override pcibios_window_alignment(). [bhelgaas: changelog] Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* rtl8192e: Use PCI Express Capability accessorsJiang Liu2012-08-231-5/+3
| | | | | | Use PCI Express Capability access functions to simplify rtl8192e driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* et131x: Use PCI Express Capability accessorsJiang Liu2012-08-231-14/+5
| | | | | | Use PCI Express Capability access functions to simplify et131x driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* rapdio/tsi721: Use PCI Express Capability accessorsJiang Liu2012-08-231-12/+7
| | | | | | | | Use PCI Express Capability access functions to simplify tsi721 driver. [bhelgaas: use word (16-bit) accesses for PCI_EXP_DEVCTL, PCI_EXP_DEVCTL2] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
* drm/radeon: Use PCI Express Capability accessorsJiang Liu2012-08-231-7/+3
| | | | | | | Use PCI Express Capability access functions to simplify radeon driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* [SCSI] qla4xxx: Use PCI Express Capability accessorsJiang Liu2012-08-231-3/+1
| | | | | | Use PCI Express Capability access functions to simplify qla4xxx driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* [SCSI] qla4xxx: Use PCI Express Capability accessorsJiang Liu2012-08-231-6/+2
| | | | | | Use PCI Express Capability access functions to simplify qla2xxx driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* IB/qib: Use PCI Express Capability accessorsJiang Liu2012-08-231-23/+15
| | | | | | | | Use PCI Express Capability access functions to simplify qib driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
* IB/mthca: Use PCI Express Capability accessorsJiang Liu2012-08-231-4/+4
| | | | | | | | Use PCI Express Capability access functions to simplify mthca driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Roland Dreier <roland@purestorage.com>
* rtlwifi: Use PCI Express Capability accessorsJiang Liu2012-08-231-5/+3
| | | | | | | Use PCI Express Capability access functions to simplify rtlwifi driver. [bhelgaas: split iwlegacy, iwlwifi, rtlwifi into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* iwlwifi: Use PCI Express Capability accessorsJiang Liu2012-08-231-5/+2
| | | | | | | Use PCI Express Capability access functions to simplify iwlwifi driver. [bhelgaas: split iwlegacy, iwlwifi, rtlwifi into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* iwlegacy: Use PCI Express Capability accessorsJiang Liu2012-08-231-3/+1
| | | | | | | Use PCI Express Capability access functions to simplify iwlegacy driver. [bhelgaas: split iwlegacy, iwlwifi, rtlwifi into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* ath9k: Use PCI Express Capability accessorsJiang Liu2012-08-231-15/+6
| | | | | | Use PCI Express Capability access functions to simplify ath9k driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* atl1c: Use PCI Express Capability accessorsJiang Liu2012-08-231-1/+1
| | | | | | Use PCI Express Capability access functions to simplify atl1c driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* cxgb4: Use PCI Express Capability accessorsJiang Liu2012-08-232-13/+3
| | | | | | Use PCI Express Capability access functions to simplify cxgb4 driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* cxgb3: Use PCI Express Capability accessorsJiang Liu2012-08-231-14/+8
| | | | | | | Use PCI Express Capability access functions to simplify cxgb3 driver. [bhelgaas: split cxgb3 and cxgb4 into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* myri10ge: Use PCI Express Capability accessorsJiang Liu2012-08-231-23/+8
| | | | | | | | Use PCI Express Capability access functions to simplify myri10ge driver. [bhelgaas: fix myri10ge_toggle_relaxed() return value] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* niu: Use PCI Express Capability accessorsJiang Liu2012-08-231-12/+7
| | | | | | Use PCI Express Capability access functions to simplify niu driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* mlx4: Use PCI Express Capability accessorsJiang Liu2012-08-231-4/+4
| | | | | | Use PCI Express Capability access functions to simplify mlx4 driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* vxge: Use PCI Express Capability accessorsJiang Liu2012-08-231-2/+2
| | | | | | Use PCI Express Capability access functions to simplify vxge driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* igb: Use PCI Express Capability accessorsJiang Liu2012-08-231-10/+2
| | | | | | | | | Use PCI Express Capability access functions to simplify igb driver. [bhelgaas: split e1000e and igb into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* e1000e: Use PCI Express Capability accessorsJiang Liu2012-08-231-19/+8
| | | | | | | | | Use PCI Express Capability access functions to simplify e1000e driver. [bhelgaas: split e1000e and igb into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* tg3: Use PCI Express Capability accessorsJiang Liu2012-08-231-37/+13
| | | | | | | Use PCI Express Capability access functions to simplify tg3 driver. [bhelgaas: split bnx2x and tg3 into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* bnx2x: Use PCI Express Capability accessorsJiang Liu2012-08-231-20/+5
| | | | | | | Use PCI Express Capability access functions to simplify bnx2x driver. [bhelgaas: split bnx2x and tg3 into separate patches] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* r8169: Preserve other Device Control bits when setting NOSNOOP_ENBjorn Helgaas2012-08-231-2/+2
| | | | | | | | Previously, when we turned on the "Enable No Snoop Bit," we cleared all the other Device Control bits, including error reporting enables, Max_Payload_Size, Max_Read_Request_Size, etc. This patch preserves all the other bits. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* r8169: Use PCI Express Capability accessorsJiang Liu2012-08-231-35/+9
| | | | | | | Use PCI Express Capability access functions to simplify r8169 driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* tile: PCI: Use PCI Express Capability accessorsJiang Liu2012-08-231-20/+6
| | | | | | | Use PCI Express Capability access functions to simplify Tile PCIe code. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com>
* MIPS: PCI: Use PCI Express Capability accessorsJiang Liu2012-08-231-10/+5
| | | | | | | Use PCI Express Capability access functions to simplify MIPS PCIe code. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David Daney <david.daney@cavium.com>
* ARM: PCI: Use PCI Express Capability accessorsJiang Liu2012-08-231-11/+1
| | | | | | | Use PCI Express Capability access functions to simplify ARM PCIe code. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* PCI/ASPM: Use PCI Express Capability accessorsJiang Liu2012-08-231-51/+26
| | | | | | | Use PCI Express Capability access functions to simplify PCIe ASPM. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI/AER: Use PCI Express Capability accessorsJiang Liu2012-08-232-51/+17
| | | | | | | Use PCI Express Capability access functions to simplify PCIe AER. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI/PME: Use PCI Express Capability accessorsJiang Liu2012-08-231-17/+6
| | | | | | | Use PCI Express Capability access functions to simplify PCIe PME. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI/pciehp: Use PCI Express Capability accessorsJiang Liu2012-08-232-13/+5
| | | | | | | | Use PCI Express Capability access functions to simplify pciehp. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
* PCI/portdrv: Use PCI Express Capability accessorsJiang Liu2012-08-232-18/+6
| | | | | | | | Use PCI Express Capability access functions to simplify portdrv. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
* PCI/hotplug: Use PCI Express Capability accessorsJiang Liu2012-08-231-15/+5
| | | | | | | Use PCI Express Capability access functions to simplify pcihp_slot.c. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
* PCI: Wait for pending transactions to complete before 82599 FLRBjorn Helgaas2012-08-231-1/+27
| | | | | | | | | | Before initiating an FLR, we should wait for completion of any outstanding non-posted requests. See PCIe spec r3.0, sec 6.6.2. This makes reset_intel_82599_sfp_virtfn() very similar to the generic pcie_flr(). The only difference is that the 82599 doesn't report FLR support in the VF Device Capability register. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI/core: Use PCI Express Capability accessorsJiang Liu2012-08-233-274/+66
| | | | | | | Use PCI Express Capability access functions to simplify core. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Add accessors for PCI Express CapabilityJiang Liu2012-08-233-0/+236
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI Express Capability (PCIe spec r3.0, sec 7.8) comes in two versions, v1 and v2. In v1 Capability structures (PCIe spec r1.0 and r1.1), some fields are optional, so the structure size depends on the device type. This patch adds functions to access this capability so drivers don't have to be aware of the differences between v1 and v2. Note that these new functions apply only to the "PCI Express Capability," not to any of the other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.) Function pcie_capability_read_word/dword() reads the PCIe Capabilities register and returns the value in the reference parameter "val". If the PCIe Capabilities register is not implemented on the PCIe device, "val" is set to 0. Function pcie_capability_write_word/dword() writes the value to the specified PCIe Capability register. Function pcie_capability_clear_and_set_word/dword() sets and/or clears bits of a PCIe Capability register. [bhelgaas: changelog, drop "pci_" prefixes, don't export pcie_capability_reg_implemented()] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Remove unused field pcie_type from struct pci_devYijing Wang2012-08-232-2/+0
| | | | | | | | With introduction of pci_pcie_type(), pci_dev->pcie_type field becomes redundant, so remove it. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Introduce pci_pcie_type(dev) to replace pci_dev->pcie_typeYijing Wang2012-08-2317-63/+67
| | | | | | | | | Introduce an inline function pci_pcie_type(dev) to extract PCIe device type from pci_dev->pcie_flags_reg field, and prepare for removing pci_dev->pcie_type. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: Add pcie_flags_reg to cache PCIe capabilities registerYijing Wang2012-08-202-1/+12
| | | | | | | | Since PCI Express Capabilities Register is read only, cache its value into struct pci_dev to avoid repeatedly calling pci_read_config_*(). Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Linux 3.6-rc1v3.6-rc1Linus Torvalds2012-08-031-2/+2
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* Merge branch 'for-linus-3.6' of git://dev.laptop.org/users/dilinger/linux-olpcLinus Torvalds2012-08-0213-164/+451
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull OLPC platform updates from Andres Salomon: "These move the OLPC Embedded Controller driver out of arch/x86/platform and into drivers/platform/olpc. OLPC machines are now ARM-based (which means lots of x86 and ARM changes), but are typically pretty self-contained.. so it makes more sense to go through a separate OLPC tree after getting the appropriate review/ACKs." * 'for-linus-3.6' of git://dev.laptop.org/users/dilinger/linux-olpc: x86: OLPC: move s/r-related EC cmds to EC driver Platform: OLPC: move global variables into priv struct Platform: OLPC: move debugfs support from x86 EC driver x86: OLPC: switch over to using new EC driver on x86 Platform: OLPC: add a suspended flag to the EC driver Platform: OLPC: turn EC driver into a platform_driver Platform: OLPC: allow EC cmd to be overridden, and create a workqueue to call it drivers: OLPC: update various drivers to include olpc-ec.h Platform: OLPC: add a stub to drivers/platform/ for the OLPC EC driver
| * x86: OLPC: move s/r-related EC cmds to EC driverAndres Salomon2012-08-012-22/+36
| | | | | | | | | | | | | | | | | | | | | | The new EC driver calls platform-specific suspend and resume hooks; run XO-1-specific EC commands from there, rather than deep in s/r code. If we attempt to run EC commands after the new EC driver has suspended, it is refused by the ec->suspended checks. Signed-off-by: Andres Salomon <dilinger@queued.net> Acked-by: Paul Fox <pgf@laptop.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
| * Platform: OLPC: move global variables into priv structAndres Salomon2012-08-011-20/+28
| | | | | | | | | | | | | | | | | | Populate olpc_ec_priv with variables that were previously global. This makes things a tad bit clearer, IMO. Signed-off-by: Andres Salomon <dilinger@queued.net> Acked-by: Paul Fox <pgf@laptop.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
| * Platform: OLPC: move debugfs support from x86 EC driverAndres Salomon2012-08-012-97/+117
| | | | | | | | | | | | | | | | | | | | | | | | There's nothing about the debugfs interface for the EC driver that is architecture-specific, so move it into the arch-independent driver. The code is mostly unchanged with the exception of renamed variables, coding style changes, and API updates. Signed-off-by: Andres Salomon <dilinger@queued.net> Acked-by: Paul Fox <pgf@laptop.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
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