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* crypto: testmgr - add twofish testsJussi Kivilinna2011-10-213-4/+238
| | | | | | | Add tests for parallel twofish-x86_64-3way code paths. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: testmgr - add blowfish test-vectorsJussi Kivilinna2011-10-213-4/+184
| | | | | | | Add tests for parallel blowfish-x86_64 code paths. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Make hifn_795x build depend on !ARCH_DMA_ADDR_T_64BITRichard Weinberger2011-10-212-4/+3
| | | | | | | | hifn_795x works only on 32 bit, remove the detection while loading the module and catch non-32 bit systems at build time. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: twofish-x86_64-3way - fix ctr blocksize to 1Jussi Kivilinna2011-10-211-1/+1
| | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish-x86_64 - fix ctr blocksize to 1Jussi Kivilinna2011-10-211-1/+1
| | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: whirlpool - count rounds from 0Alexey Dobriyan2011-10-211-6/+12
| | | | | | | | rc[0] is unused because rounds are counted from 1. Save an u64! Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for compress type algorithmsSteffen Klassert2011-10-211-0/+20
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for cipher type algorithmsSteffen Klassert2011-10-212-0/+37
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for rng type algorithmsSteffen Klassert2011-10-212-0/+26
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for pcompress type algorithmsSteffen Klassert2011-10-212-0/+23
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for nivaead type algorithmsSteffen Klassert2011-10-211-0/+23
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for aead type algorithmsSteffen Klassert2011-10-212-0/+34
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for givcipher type algorithmsSteffen Klassert2011-10-211-0/+23
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for ablkcipher type algorithmsSteffen Klassert2011-10-211-0/+25
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for blkcipher type algorithmsSteffen Klassert2011-10-212-0/+35
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for ahash type algorithmsSteffen Klassert2011-10-211-0/+21
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for shash type algorithmsSteffen Klassert2011-10-212-0/+28
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace report for larval type algorithmsSteffen Klassert2011-10-212-0/+17
| | | | | Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add a report function pointer to crypto_typeSteffen Klassert2011-10-212-0/+7
| | | | | | | | | We add a report function pointer to struct crypto_type. This function pointer is used from the crypto userspace configuration API to report crypto algorithms to userspace. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add userspace configuration APISteffen Klassert2011-10-215-0/+433
| | | | | | | | | This patch adds a basic userspace configuration API for the crypto layer. With this it is possible to instantiate, remove and to show crypto algorithms from userspace. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Export crypto_remove_finalSteffen Klassert2011-10-212-3/+3
| | | | | | | | | The upcomming crypto usrerspace configuration api needs to remove the spawns on top on an algorithm, so export crypto_remove_final. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Export crypto_remove_spawnsSteffen Klassert2011-10-212-3/+5
| | | | | | | | | The upcomming crypto usrerspace configuration api needs to remove the spawns on top on an algorithm, so export crypto_remove_spawns. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: Add a flag to identify crypto instancesSteffen Klassert2011-10-212-0/+6
| | | | | | | | | The upcomming crypto user configuration api needs to identify crypto instances. This patch adds a flag that is set if the algorithm is an instance that is build from templates. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: twofish - add 3-way parallel x86_64 assembler implementionJussi Kivilinna2011-10-214-0/+810
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch adds 3-way parallel x86_64 assembly implementation of twofish as new module. New assembler functions crypt data in three blocks chunks, improving cipher performance on out-of-order CPUs. Patch has been tested with tcrypt and automated filesystem tests. Summary of the tcrypt benchmarks: Twofish 3-way-asm vs twofish asm (128bit 8kb block ECB) encrypt: 1.3x speed decrypt: 1.3x speed Twofish 3-way-asm vs twofish asm (128bit 8kb block CBC) encrypt: 1.07x speed decrypt: 1.4x speed Twofish 3-way-asm vs twofish asm (128bit 8kb block CTR) encrypt: 1.4x speed Twofish 3-way-asm vs AES asm (128bit 8kb block ECB) encrypt: 1.0x speed decrypt: 1.0x speed Twofish 3-way-asm vs AES asm (128bit 8kb block CBC) encrypt: 0.84x speed decrypt: 1.09x speed Twofish 3-way-asm vs AES asm (128bit 8kb block CTR) encrypt: 1.15x speed Full output: http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-twofish-3way-asm-x86_64.txt http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-twofish-asm-x86_64.txt http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-aes-asm-x86_64.txt Tests were run on: vendor_id : AuthenticAMD cpu family : 16 model : 10 model name : AMD Phenom(tm) II X6 1055T Processor Also userspace test were run on: vendor_id : GenuineIntel cpu family : 6 model : 15 model name : Intel(R) Xeon(R) CPU E7330 @ 2.40GHz stepping : 11 Userspace test results: Encryption/decryption of twofish 3-way vs x86_64-asm on AMD Phenom II: encrypt: 1.27x decrypt: 1.25x Encryption/decryption of twofish 3-way vs x86_64-asm on Intel Xeon E7330: encrypt: 1.36x decrypt: 1.36x Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: twofish-x86-asm - make assembler functions use twofish_ctx instead ↵Jussi Kivilinna2011-10-213-13/+15
| | | | | | | | | | | | | of crypto_tfm This needed by 3-way twofish patch to be able to easily use one block assembler functions. As glue code is shared between i586/x86_64 apply change to i586 assembler too. Also export assembler functions for 3-way parallel twofish module. CC: Joachim Fritschi <jfritschi@freenet.de> Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: tcrypt - add ctr(twofish) speed testJussi Kivilinna2011-10-211-0/+4
| | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish-x86_64 - add creditsJussi Kivilinna2011-10-211-0/+5
| | | | | Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish-x86_64 - improve x86_64 blowfish 4-way performanceJussi Kivilinna2011-10-211-100/+98
| | | | | | | | | | | | | | | This patch adds improved F-macro for 4-way parallel functions. With new F-macro for 4-way parallel functions, blowfish sees ~15% improvement in speed tests on AMD Phenom II (~5% on Intel Xeon E7330). However when used in 1-way blowfish function new macro would be ~10% slower than original, so old F-macro is kept for 1-way functions. Patch cleans up old F-macro as it is no longer needed in 4-way part. Patch also does register macro renaming to reduce stack usage. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: picoxcell - add dependency on HAVE_CLKJamie Iles2011-10-201-1/+1
| | | | | | | | | The picoxcell crypto driver requires the clk API, but the platform in mainline does not currently support it. Add an explicit dependency on HAVE_CLK to avoid build breakage. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: aes-x86 - quiet sparse noise about symbol not declaredH Hartley Sweeten2011-09-221-0/+1
| | | | | | | | | | | | Include <asm/aes.h> to pick up the declarations for crypto_aes_encrypt_x86 and crypto_aes_decrypt_x86 to quiet the sparse noise: warning: symbol 'crypto_aes_encrypt_x86' was not declared. Should it be static? warning: symbol 'crypto_aes_decrypt_x86' was not declared. Should it be static? Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Mandeep Singh Baines <msb@chromium.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish - add x86_64 assembly implementationJussi Kivilinna2011-09-224-0/+896
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch adds x86_64 assembly implementation of blowfish. Two set of assembler functions are provided. First set is regular 'one-block at time' encrypt/decrypt functions. Second is 'four-block at time' functions that gain performance increase on out-of-order CPUs. Performance of 4-way functions should be equal to 1-way functions with in-order CPUs. Summary of the tcrypt benchmarks: Blowfish assembler vs blowfish C (256bit 8kb block ECB) encrypt: 2.2x speed decrypt: 2.3x speed Blowfish assembler vs blowfish C (256bit 8kb block CBC) encrypt: 1.12x speed decrypt: 2.5x speed Blowfish assembler vs blowfish C (256bit 8kb block CTR) encrypt: 2.5x speed Full output: http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-asm-x86_64.txt http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-c-x86_64.txt Tests were run on: vendor_id : AuthenticAMD cpu family : 16 model : 10 model name : AMD Phenom(tm) II X6 1055T Processor stepping : 0 Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: tcrypt - add ctr(blowfish) speed testJussi Kivilinna2011-09-221-0/+4
| | | | | | | | Add ctr(blowfish) speed test to receive results for blowfish x86_64 assembly patch. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish - rename C-version to blowfish_genericJussi Kivilinna2011-09-222-5/+8
| | | | | | | | | | Rename blowfish to blowfish_generic so that assembler versions of blowfish cipher can autoload. Module alias 'blowfish' is added. Also fix checkpatch warnings. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: blowfish - split generic and common c codeJussi Kivilinna2011-09-225-355/+448
| | | | | | | | | | Patch splits up the blowfish crypto routine into a common part (key setup) which will be used by blowfish crypto modules (x86_64 assembly and generic-c). Also fixes errors/warnings reported by checkpatch. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: cryptd - Use subsys_initcall to prevent races with aesniHerbert Xu2011-08-201-1/+1
| | | | | | | | | | As cryptd is depeneded on by other algorithms such as aesni-intel, it needs to be registered before them. When everything is built as modules, this occurs naturally. However, for this to work when they are built-in, we need to use subsys_initcall in cryptd. Tested-by: Josh Boyer <jwboyer@redhat.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sha - Fix build error due to crypto_sha1_updateHerbert Xu2011-08-161-0/+2
| | | | | | | | | | | | | | | | | | | | | On Tue, Aug 16, 2011 at 03:22:34PM +1000, Stephen Rothwell wrote: > > After merging the final tree, today's linux-next build (powerpc > allyesconfig) produced this warning: > > In file included from security/integrity/ima/../integrity.h:16:0, > from security/integrity/ima/ima.h:27, > from security/integrity/ima/ima_policy.c:20: > include/crypto/sha.h:86:10: warning: 'struct shash_desc' declared inside parameter list > include/crypto/sha.h:86:10: warning: its scope is only this definition or declaration, which is probably not what you want > > Introduced by commit 7c390170b493 ("crypto: sha1 - export sha1_update for > reuse"). I guess you need to include crypto/hash.h in crypto/sha.h. This patch fixes this by providing a declaration for struct shash_desc. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: n2 - Fix a get/put_cpu() imbalanceThomas Meyer2011-08-151-2/+2
| | | | | | | Fix a get/put_cpu() imbalance in the error case when qp == NULL Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sha1 - SSSE3 based SHA1 implementation for x86-64Mathias Krause2011-08-105-0/+819
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an assembler implementation of the SHA1 algorithm using the Supplemental SSE3 (SSSE3) instructions or, when available, the Advanced Vector Extensions (AVX). Testing with the tcrypt module shows the raw hash performance is up to 2.3 times faster than the C implementation, using 8k data blocks on a Core 2 Duo T5500. For the smalest data set (16 byte) it is still 25% faster. Since this implementation uses SSE/YMM registers it cannot safely be used in every situation, e.g. while an IRQ interrupts a kernel thread. The implementation falls back to the generic SHA1 variant, if using the SSE/YMM registers is not possible. With this algorithm I was able to increase the throughput of a single IPsec link from 344 Mbit/s to 464 Mbit/s on a Core 2 Quad CPU using the SSSE3 variant -- a speedup of +34.8%. Saving and restoring SSE/YMM state might make the actual throughput fluctuate when there are FPU intensive userland applications running. For example, meassuring the performance using iperf2 directly on the machine under test gives wobbling numbers because iperf2 uses the FPU for each packet to check if the reporting interval has expired (in the above test I got min/max/avg: 402/484/464 MBit/s). Using this algorithm on a IPsec gateway gives much more reasonable and stable numbers, albeit not as high as in the directly connected case. Here is the result from an RFC 2544 test run with a EXFO Packet Blazer FTB-8510: frame size sha1-generic sha1-ssse3 delta 64 byte 37.5 MBit/s 37.5 MBit/s 0.0% 128 byte 56.3 MBit/s 62.5 MBit/s +11.0% 256 byte 87.5 MBit/s 100.0 MBit/s +14.3% 512 byte 131.3 MBit/s 150.0 MBit/s +14.2% 1024 byte 162.5 MBit/s 193.8 MBit/s +19.3% 1280 byte 175.0 MBit/s 212.5 MBit/s +21.4% 1420 byte 175.0 MBit/s 218.7 MBit/s +25.0% 1518 byte 150.0 MBit/s 181.2 MBit/s +20.8% The throughput for the largest frame size is lower than for the previous size because the IP packets need to be fragmented in this case to make there way through the IPsec tunnel. Signed-off-by: Mathias Krause <minipli@googlemail.com> Cc: Maxim Locktyukhin <maxim.locktyukhin@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sha1 - export sha1_update for reuseMathias Krause2011-08-102-4/+8
| | | | | | | | | | | Export the update function as crypto_sha1_update() to not have the need to reimplement the same algorithm for each SHA-1 implementation. This way the generic SHA-1 implementation can be used as fallback for other implementations that fail to run under certain circumstances, like the need for an FPU context while executing in IRQ context. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: picoxcell - fix possible invalid pointer dereferenceJamie Iles2011-08-101-1/+1
| | | | | | | | | The completion callback will free the request so we must remove it from the completion list before calling the callback. Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: picoxcell - support for device tree matchingJamie Iles2011-08-102-6/+53
| | | | | | | | | Allow the crypto engines to be matched from device tree bindings. Cc: devicetree-discuss@lists.ozlabs.org Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: picoxcell - add connection ID to the clock nameJamie Iles2011-08-101-1/+1
| | | | | | | | | For using the device tree probing we use a connection ID for the clk_get() operation. Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: picoxcell - convert to platform ID tableJamie Iles2011-08-101-60/+33
| | | | | | | | | | | | Use a platform ID table and a single platform_driver. It's neater and makes the device tree addition easier and more consistent. Rename the match values to be inline with what they'll be in the device tree bindings. There aren't any current in-tree users of the existing device names. Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: padlock-aes - Make module loading even quieter when hardware is missingJonathan Nieder2011-08-031-3/+1
| | | | | | | | | | | | | | | | | | When loading aes via the module alias, a padlock module failing to load due to missing hardware is not particularly notable. With v2.6.27-rc1~1107^2~14 (crypto: padlock - Make module loading quieter when hardware isn't available, 2008-07-03), the padlock-aes module suppresses the relevant messages when the "quiet" flag is in use; but better to suppress this particular message completely, since the administrator can already distinguish such errors by the absence of a message indicating initialization failing or succeeding. This avoids occasional messages in syslog of the form padlock_aes: VIA PadLock not detected. Signed-off-by: Jonathan Nieder <jrnieder@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* oom: task->mm == NULL doesn't mean the memory was freedOleg Nesterov2011-08-021-1/+3
| | | | | | | | | | | | | | | | | | exit_mm() sets ->mm == NULL then it does mmput()->exit_mmap() which frees the memory. However select_bad_process() checks ->mm != NULL before TIF_MEMDIE, so it continues to kill other tasks even if we have the oom-killed task freeing its memory. Change select_bad_process() to check ->mm after TIF_MEMDIE, but skip the tasks which have already passed exit_notify() to ensure a zombie with TIF_MEMDIE set can't block oom-killer. Alternatively we could probably clear TIF_MEMDIE after exit_mmap(). Signed-off-by: Oleg Nesterov <oleg@redhat.com> Reviewed-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-08-029-202/+311
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6: (23 commits) regulator: Improve WM831x DVS VSEL selection algorithm regulator: Bootstrap wm831x DVS VSEL value from ON VSEL if not already set regulator: Set up GPIO for WM831x VSEL before enabling VSEL mode regulator: Add EPEs to the MODULE_ALIAS() for wm831x-dcdc regulator: Fix WM831x DCDC DVS VSEL bootstrapping regulator: Fix WM831x regulator ID lookups for multiple WM831xs regulator: Fix argument format type errors in error prints regulator: Fix memory leak in set_machine_constraints() error paths regulator: Make core more chatty about some errors regulator: tps65910: Fix array access out of bounds bug regulator: tps65910: Add missing breaks in switch/case regulator: tps65910: Fix a memory leak in tps65910_probe error path regulator: TWL: Remove entry of RES_ID for 6030 macros ASoC: tlv320aic3x: Add correct hw registers to Line1 cross connect muxes regulator: Add basic per consumer debugfs regulator: Add rdev_crit() macro regulator: Refactor supply implementation to work as regular consumers regulator: Include the device name in the microamps_requested_ file regulator: Increase the limit on sysfs file names regulator: Properly register dummy regulator driver ...
| * Merge branch 'for-next' into for-linusLiam Girdwood2011-08-0110-215/+332
| |\
| | * regulator: Improve WM831x DVS VSEL selection algorithmMark Brown2011-07-281-37/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using the maximum voltage we get passed to select the DVS voltage to use remember the highest voltage we've ever seen. This improves how the driver works when the consumer permits higher voltages than it will ever selects in order to support the widest possible voltage range. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
| | * regulator: Bootstrap wm831x DVS VSEL value from ON VSEL if not already setMark Brown2011-07-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | If we don't have a DVS VSEL value already set when we start up then start it off with the value currently being used for ON. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
| | * regulator: Set up GPIO for WM831x VSEL before enabling VSEL modeMark Brown2011-07-281-21/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the VSEL is not in use prior to us starting up then we need to make sure we initialise the GPIO before we push the DVS control to being done by the GPIO. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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