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* soc: qcom: smd-rpm: Correct size of outgoing messageBjorn Andersson2015-10-311-1/+1
| | | | | | | | | | | | With the removal of VLAIS the size was incorrectly changed to only cover the headers of the packet, resulting in "empty" requests being sent to the RPM. Correct this so the entire message is transfered. Fixes: 50e1b29b4438 ("soc: qcom: smd: Remove use of VLAIS") Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'arm/soc/for-4.4/rpi-drivers' of ↵Olof Johansson2015-10-264-0/+388
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/Broadcom/stblinux into next/drivers This pull request contains the Raspberry Pi firmware driver, for communicating with the VPU which has exclusive control of some of the peripherals. Eric adds the actual firmware driver and Alexander fixes the header file which was missing include guards. * tag 'arm/soc/for-4.4/rpi-drivers' of https://github.com/Broadcom/stblinux: ARM: bcm2835: add mutual inclusion protection ARM: bcm2835: Add the Raspberry Pi firmware driver Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: bcm2835: add mutual inclusion protectionAlexander Aring2015-10-241-0/+5
| | | | | | | | | | | | | | | | | | This patch adds mutual inclusion protection for the rpi firmware header. Cc: Eric Anholt <eric@anholt.net> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * ARM: bcm2835: Add the Raspberry Pi firmware driverEric Anholt2015-10-154-0/+383
| | | | | | | | | | | | | | | | | | This gives us a function for making mailbox property channel requests of the firmware, which is most notable in that it will let us get and set clock rates. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | bus: sunxi-rsb: Add driver for Allwinner Reduced Serial BusChen-Yu Tsai2015-10-264-0/+900
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduced Serial Bus (RSB) is an Allwinner proprietery interface used to communicate with PMICs and other peripheral ICs. RSB is a two-wire push-pull serial bus that supports 1 master device and up to 15 active slave devices. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Mark Brown <broonie@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindingsChen-Yu Tsai2015-10-261-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduced Serial Bus is a proprietary 2-line push-pull serial bus supporting multiple slave devices. It was developed by Allwinner, Inc. and used by Allwinner and X-Powers, Inc. for their line of PMICs and other peripheral ICs. Recent Allwinner SoCs, starting with the A23, have an RSB controller. This is used to talk to the PMIC, and later with the A80 and A83 platform, the audio codec IC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'v4.4-rockchip-drivers2' of ↵Olof Johansson2015-10-233-4/+8
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers Some fixes for the new power-domain driver, including restricting Rockchip Kconfig options, fixing a possible null-pointer and a typo in the dt-bindings. * tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: dt-bindings: Correct paths in Rockchip power domains binding document soc: rockchip: power-domain: don't try to print the clock name in error case soc: rockchip: Restrict to ARCH_ROCKCHIP Signed-off-by: Olof Johansson <olof@lixom.net>
| * | dt-bindings: Correct paths in Rockchip power domains binding documentGeert Uytterhoeven2015-10-161-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | soc: rockchip: power-domain: don't try to print the clock name in error caseHeiko Stuebner2015-10-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | When we never got the the clock-reference, i.e. when IS_ERR(clk) is true, don't try to print the clock name via %pC as this of course produces a null-pointer-dereference in __clk_get_name(). Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Caesar Wang <wxt@rock-chips.com>
| * | soc: rockchip: Restrict to ARCH_ROCKCHIPThierry Reding2015-10-111-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By definition this directory contains drivers that are specific to the Rockchip architecture. All Kconfig options should therefore depend on ARCH_ROCKCHIP to avoid exposing these symbols on other architectures. For example, this options currently shows up as new when doing an incremental build on PowerPC. Signed-off-by: Thierry Reding <treding@nvidia.com> [add COMPILE_TEST alternative condition] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | | Merge branch 'drivers/psci2' into next/driversOlof Johansson2015-10-231-3/+4
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | * drivers/psci2: drivers: psci: make PSCI 1.0 functions initialization version dependent Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | drivers: psci: make PSCI 1.0 functions initialization version dependentLorenzo Pieralisi2015-10-231-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PSCI specifications [1] and the SMC calling convention mandate that unimplemented functions ids must return NOT_SUPPORTED (0xffffffff) if a function id is called but it is not implemented. Consequently, PSCI 1.0 function ids that require the 1.0 PSCI_FEATURES call to be initialized: CPU_SUSPEND (psci_init_cpu_suspend()) SYSTEM_SUSPEND (psci_init_system_suspend()) call the PSCI_FEATURES function id independently of the detected PSCI firmware version, since, if the PSCI_FEATURES function id is not implemented, it must return NOT_SUPPORTED according to the PSCI specifications, causing the initialization functions to fail as expected. Some existing PSCI implementations (ie Qemu PSCI emulation), do not comply with the SMC calling convention and fail if function ids that are not implemented are called from the OS, causing boot failures. To solve this issue, this patch adds code that checks the PSCI firmware version before calling PSCI 1.0 initialization functions so that the OS makes sure that it is calling 1.0 functions only if the firmware version detected is 1.0 or greater, therefore avoiding PSCI calls that are bound to fail and might cause system boot failures owing to non-compliant PSCI firmware implementations. [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Mark Rutland <mark.rutland@arm.com> Tested-by: Kevin Hilman <khilman@kernel.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | Merge tag 'firmware/psci-1.0' of ↵Olof Johansson2015-10-225-24/+123
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux into next/drivers This pull request contains patches that enable PSCI 1.0 firmware features for arm/arm64 platforms: - Lorenzo Pieralisi adds support for the PSCI_FEATURES call, manages various 1.0 specifications updates (power state id and functions return values) and provides PSCI v1.0 DT bindings - Sudeep Holla implements PSCI v1.0 system suspend support to enable PSCI based suspend-to-RAM * tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux: drivers: firmware: psci: add system suspend support drivers: firmware: psci: define more generic PSCI_FN_NATIVE macro drivers: firmware: psci: add PSCI v1.0 DT bindings drivers: firmware: psci: add extended stateid power_state support drivers: firmware: psci: add PSCI_FEATURES call drivers: firmware: psci: move power_state handling to generic code drivers: firmware: psci: add INVALID_ADDRESS return value Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | drivers: firmware: psci: add system suspend supportSudeep Holla2015-10-022-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PSCI v1.0 introduces a new API called PSCI_SYSTEM_SUSPEND. This API provides the mechanism by which the calling OS can request entry into the deepest possible system sleep state. It meets all the necessary preconditions for entering suspend to RAM state in Linux. This patch adds support for PSCI_SYSTEM_SUSPEND in psci firmware and registers a psci system suspend operation to implement the suspend-to-RAM(s2r) in a generic way on all the platforms implementing PSCI. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | | drivers: firmware: psci: define more generic PSCI_FN_NATIVE macroSudeep Holla2015-10-021-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces the definition and usage of PSCI_0_2_FN_NATIVE with the new and more generic macro PSCI_FN_NATIVE that can be used with any version. This will be useful for the new features introduced in PSCIv1.0 and for any future revisions. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | | drivers: firmware: psci: add PSCI v1.0 DT bindingsLorenzo Pieralisi2015-10-022-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PSCI 1.0 is designed to be fully compliant to the PSCI 0.2 specification, with minor differences that are described in the PSCI specification. In particular, PSCI v1.0 augments the specification with a new power_state format (extended stateid - probeable through the PSCI_FEATURES call), changes some function return codes and functions usage requirements wrt PSCI 0.2. These changes mean that 1.0 vs 0.2 compliancy should be enforced through a DT compatible string that allows firmware to specify 1.0 only compliancy so that older kernels are prevented from using PSCI 1.0 FW implementations in a non-compatible way (eg by calling a 1.0 FW implementation and expecting 0.2 behaviour). This patch adds PSCI 1.0 DT bindings and related compatible string. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> Cc: Mark Rutland <mark.rutland@arm.com>
| * | | drivers: firmware: psci: add extended stateid power_state supportLorenzo Pieralisi2015-10-022-2/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PSCI v1.0 augmented the power_state parameter format specification (extended stateid) and introduced a way to probe it through the PSCI_FEATURES interface. This patch implements code that detects the power_state format at run-time through the PSCI_FEATURES interface, so that the power_state argument can be properly detected and validated in the kernel according to the information provided through firmware. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> Cc: Mark Rutland <mark.rutland@arm.com>
| * | | drivers: firmware: psci: add PSCI_FEATURES callLorenzo Pieralisi2015-10-022-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PSCI v1.0 introduces a PSCI_FEATURES call that allows to probe for features related to a specific function identifier. This patch adds PSCI_FEATURES support to the PSCI firmware layer. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> Cc: Mark Rutland <mark.rutland@arm.com>
| * | | drivers: firmware: psci: move power_state handling to generic codeLorenzo Pieralisi2015-10-023-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Functions implemented on arm64 to check if a power_state parameter is valid and if the power_state implies context loss are not arm64 specific and should be moved to generic code so that they can be reused on arm systems too. This patch moves the functions handling the power_state parameter to generic PSCI firmware layer code. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Mark Rutland <mark.rutland@arm.com>
| * | | drivers: firmware: psci: add INVALID_ADDRESS return valueLorenzo Pieralisi2015-10-022-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PSCI 1.0 introduces the INVALID_ADDRESS return value for functions that take an address as input parameter (eg CPU_SUSPEND). This patch adds INVALID_ADDRESS return value to kernel code and updates the PSCI to linux error conversion to take it into account. The kernel error value associated to INVALID_ADDRESS is set to the error returned when the PSCI error code is INVALID_PARAMETERS to comply with current call sites expected return value, given that the kernel at present has no use for the additional error information reported. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Jisheng Zhang <jszhang@marvell.com>
* | | | soc: qcom/smem: add HWSPINLOCK dependencyArnd Bergmann2015-10-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a build error when smem is enabled without hwspinlock: drivers/built-in.o: In function `qcom_smem_alloc': rockchip-efuse.c:(.text+0x7a3e4): undefined reference to `__hwspin_lock_timeout' rockchip-efuse.c:(.text+0x7a568): undefined reference to `__hwspin_unlock' drivers/built-in.o: In function `qcom_smem_remove': rockchip-efuse.c:(.text+0x7a5cc): undefined reference to `hwspin_lock_free' drivers/built-in.o: In function `qcom_smem_probe': rockchip-efuse.c:(.text+0x7a960): undefined reference to `hwspin_lock_request_specific' rockchip-efuse.c:(.text+0x7a988): undefined reference to `of_hwspin_lock_get_id' drivers/built-in.o: In function `qcom_smem_get': rockchip-efuse.c:(.text+0x7aa24): undefined reference to `__hwspin_lock_timeout' rockchip-efuse.c:(.text+0x7aafc): undefined reference to `__hwspin_unlock' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | | Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm ↵Arnd Bergmann2015-10-1510-336/+452
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/drivers Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross: * Implement id_table driver matching in SMD * Avoid NULL pointer exception on remove of SMEM * Reorder SMEM/SMD configs * Make qcom_smem_get() return a pointer * Handle big endian CPUs correctly in SMEM * Represent SMD channel layout in structures * Use __iowrite32_copy() in SMD * Remove use of VLAIs in SMD * Handle big endian CPUs correctly in SMD/RPM * Handle big endian CPUs corretly in SMD * Reject sending SMD packets that are too large * Fix endianness issue in SCM __qcom_scm_is_call_available * Add missing prototype for qcom_scm_is_available() * Correct SMEM items for upper channels * Use architecture level to build SCM correctly * Delete unneeded of_node_put in SMD * Correct active/slep state flagging in SMD/RPM * Move RPM message ram out of SMEM DT node * tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm: soc: qcom: smem: Move RPM message ram out of smem DT node soc: qcom: smd-rpm: Correct the active vs sleep state flagging soc: qcom: smd: delete unneeded of_node_put firmware: qcom-scm: build for correct architecture level soc: qcom: smd: Correct SMEM items for upper channels qcom-scm: add missing prototype for qcom_scm_is_available() qcom-scm: fix endianess issue in __qcom_scm_is_call_available soc: qcom: smd: Reject send of too big packets soc: qcom: smd: Handle big endian CPUs soc: qcom: smd_rpm: Handle big endian CPUs soc: qcom: smd: Remove use of VLAIS soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it soc: qcom: smd: Represent channel layout in structures soc: qcom: smem: Handle big endian CPUs soc: qcom: Make qcom_smem_get() return a pointer soc: qcom: Reorder SMEM/SMD configs soc: qcom: smem: Avoid NULL pointer exception on remove soc: qcom: smd: Implement id_table driver matching
| * | | | soc: qcom: smem: Move RPM message ram out of smem DT nodeStephen Boyd2015-10-142-49/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SMEM is a software construct built on top of a DDR reserved region and sometimes a device memory region called RPM message ram. Having the RPM message ram in the smem DT node's reg property leads to the smem node being located in different places depending on if the message ram is being used or not. Let's add a qcom specific property, qcom,rpm-msg-ram, and point to the device memory from the SMEM node via a phandle. As SMEM is a software construct, it really needs to reside at the root of the DT regardless of whether it's using the message ram or not. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd-rpm: Correct the active vs sleep state flaggingBjorn Andersson2015-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BIT() was incorrectly inherited from family A and should not be used on family B where the state is denoted by an enum. Reported-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Tested-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: delete unneeded of_node_putJulia Lawall2015-10-141-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device node iterators perform an of_node_put on each iteration, so putting an of_node_put before a continue results in a double put. A simplified version of the semantic match that finds this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; iterator i; @@ i(..., child, ...) { ... when != of_node_get(child) * of_node_put(child); ... * continue; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | firmware: qcom-scm: build for correct architecture levelArnd Bergmann2015-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ".arch_extension sec" directive is only available on ARMv6 or higher, so if we enable the SCM driver while building a kernel for an older CPU, we get a build error: /tmp/ccUyhMOY.s:130: Error: selected processor does not support ARM mode `smc #0' /tmp/ccUyhMOY.s:216: Error: selected processor does not support ARM mode `smc #0' /tmp/ccUyhMOY.s:373: Error: selected processor does not support ARM mode `smc #0' make[4]: *** [drivers/firmware/qcom_scm-32.o] Error 1 This changes the Makefile so we pass the ARMv7 architecture level both for the check and for the actual compilation of the scm driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Correct SMEM items for upper channelsBjorn Andersson2015-10-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the SMEM items for the second set of SMD channels, as these where incorrect. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | qcom-scm: add missing prototype for qcom_scm_is_available()Rob Clark2015-10-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | qcom-scm: fix endianess issue in __qcom_scm_is_call_availableRob Clark2015-10-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Reject send of too big packetsBjorn Andersson2015-10-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attempting to find room for a packet that's bigger than the fifo will never succeed and the calling process will be sleeping forever in the loop, waiting for enough room. So fail early instead. Reported-by: Courtney Cavin <courtney.cavin@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Handle big endian CPUsStephen Boyd2015-10-141-65/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smd structures are always in little endian, but the smd driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd_rpm: Handle big endian CPUsStephen Boyd2015-10-141-24/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smd rpm structures are always in little endian, but this driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Remove use of VLAISStephen Boyd2015-10-141-13/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Usage of VLAIS prevents clang from compiling this file, and it also opens us to the possibility of allocating a large structure on the stack to the point that we blow past the limit of the kernel stack. Remove the VLAIS and allocate a structure on the heap with kmalloc so that we're safer and more clang friendly. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Use __iowrite32_copy() instead of open-coding itStephen Boyd2015-10-141-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already have a function to do this and it silences some sparse warnings along the way. Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Represent channel layout in structuresStephen Boyd2015-10-141-28/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rx and tx channel info are laid out in memory next to each other, and there are two types of channel info structures, byte based and word based. We have 4 pointers to these info structures, when we really only need two to point to the different types of structures. Encapsulate the byte based and word based tx/rx structures in a "channel pair" structure that describes the layout of memory and reduces the number of pointers in the smd channel structure by two. Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smem: Handle big endian CPUsStephen Boyd2015-10-141-91/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The contents of smem are always in little endian, but the smem driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: Make qcom_smem_get() return a pointerStephen Boyd2015-10-143-56/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Passing a void ** almost always requires a cast at the call site. Instead of littering the code with casts every time this function is called, have qcom_smem_get() return a void pointer to the location of the smem item. This frees the caller from having to cast the pointer. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: Reorder SMEM/SMD configsStephen Boyd2015-10-141-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I make nconfig, having the SMEM option after the SMD option causes the configurator to get confused when I'm enabling and disabling these options. Let's move SMEM before SMD so there's a clear indented dependency chain. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smem: Avoid NULL pointer exception on removeStephen Boyd2015-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't set a pointer to NULL and then dereference it in the next line. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | soc: qcom: smd: Implement id_table driver matchingBjorn Andersson2015-10-142-7/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a id_table based driver maching mechanism for drivers that binds to fixed channels and doesn't need any additional configuration, e.g. IPCRTR and DIAG. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | Merge tag 'qcom-fixes-for-4.3-rc1' into base-for-4.4Andy Gross2015-10-083-1/+73
| |\ \ \ \ | | |_|_|/ | |/| | | | | | | | | | | | | | | | | | Qualcomm fixes for v4.3-rc1 * Add SCM function call stubs on ARM64
* | | | | Merge tag 'berlin-new-cpuclk-for-4.4-1' of ↵Arnd Bergmann2015-10-152-7/+8
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/hesselba/linux-berlin into next/drivers Merge "Marvell Berlin BG2Q CPU clock driver" from Sebastian Hesselbarth: - add BG2Q CPU clock to clk driver * tag 'berlin-new-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin: clk: berlin: add cpuclk ARM: berlin: dts: add CLKID_CPU for BG2Q
| * | | | | clk: berlin: add cpuclkAntoine Tenart2015-10-151-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider fixed to 1. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * | | | | Merge tag 'berlin-dt-cpuclk-for-4.4-1' into berlin/cpuclkSebastian Hesselbarth2015-10-151-0/+1
| |\ \ \ \ \ | | |/ / / / | |/| | | | | | | | | | | | | | | | Marvell Berlin DT CPU clock for 4.4 - add missing CLKID_CPU for Berlin BG2Q
| | * | | | ARM: berlin: dts: add CLKID_CPU for BG2QSebastian Hesselbarth2015-10-151-0/+1
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell Berlin BG2Q SoC also has a clock for the CPU, add a corresponding CLKID to the dt-binding include. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | | | | Merge tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc ↵Arnd Bergmann2015-10-152-6/+28
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/drivers Merge "PL172 driver updates for v4.4" from Joachim Eastwood: Support for additional ARM MPMCs to the PL172 driver and an update to the bindings documentation to reflect this from Vladimir Zapolskiy. "The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC, the static memory controllers on devices are similar to one found on ARM PrimeCell PL172, add support to the existing driver." * tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc: doc: dt: arm,pl172: add description of PL175 and PL176 controllers memory: pl172: add ARM PrimeCell PL176 MPMC support memory: pl172: add ARM PrimeCell PL175 MPMC support memory: pl172: correct MPMC peripheral ID register bits
| * | | | | doc: dt: arm,pl172: add description of PL175 and PL176 controllersVladimir Zapolskiy2015-09-291-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Joachim Eastwood <manabian@gmail.com>
| * | | | | memory: pl172: add ARM PrimeCell PL176 MPMC supportVladimir Zapolskiy2015-09-291-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change adds support of ARM PrimeCell PL176 MPMC. Static memory configuration of PL175 MPMC is very similar to one found on PL172 and PL175 controllers, so it is preferred to add its support into the existing driver. The difference is that PL176 supports up to 10 slave ports (but only 4 of them may be connected to static memory devices), AHB master bus width cab be 64-bit wide, also NAND devices can be interfaced. Similar to PL175 contoller, PL176 has no write buffer enable control in static memory configuration register, the rest of static memory configuration bits (with exception of NAND) is the same. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
| * | | | | memory: pl172: add ARM PrimeCell PL175 MPMC supportVladimir Zapolskiy2015-09-291-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change adds support of ARM PrimeCell PL175 MPMC, the controller is found on NXP LPC32xx SoC. PL175 MPMC is very similar to PL172 controller, so it is preferred to add its support into the existing driver. One of the differences between PL172 and PL175 is that the latter one supports up to 6 AHB ports, but still only 4 AHB ports can be assigned to a static memory device, also PL175 does not have write buffer enable control in static memory configuration register. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
| * | | | | memory: pl172: correct MPMC peripheral ID register bitsVladimir Zapolskiy2015-09-291-2/+3
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is undefined, so unmask them. Also the driver supports all currently present revisions of PL172, this allows to alleviate requirements to the revision version matched by the driver. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 03:49:24 +0100