| Commit message (Collapse) | Author | Age | Files | Lines |
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"A couple of platforms change hands in the MAINTAINERS file:
- Linus Walleij lists himself for the ARM Reference platforms:
versatile, vexpress, integrator and realview. He has been the main
contributor for these for a while, and makes it official now.
- Vladimir Zapolskiy takes over the LPC18xx platform from Joachim
Eastwood
- Manivannan Sadhasivam becomes a secondary maintainer for the
Actions Semi machines
- Nicolas Ferre lists updates the MAINTAINER listing for the AT91
platform: Ludovic Desroches is now a co-maintainer for the
platform, and several other people (Claudiu Beznea, Cristian
Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual
device drivers.
Thanks everyone for working on this, and welcome to the new
maintainers!
The "virt" platform on qemy or kvm can now be used in big-endian mode
without additional tricks, thanks to Jason Donenfeld.
Once again, we gain support for another NXP i.MX6 variant, this time
it's the i.MX 6ULZ 32-bit single-core version.
On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
and RZ/G2M (r8a774a1). These are described as microcontrollers on the
manufacturer website, but appear to be rather powerful. The RZ/G2M is
used on the reference board for the CIP Super Long Term Support (SLTS)
Linux Kernels"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture
arm64: exynos: Enable generic power domain support
MAINTAINERS: remove non-exsiting email address of Baoyou
MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section
MAINTAINERS: Drop dt-bindings/genpd/k2g.h
ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
arm64: actions: Enable PINCTRL in platforms Kconfig
MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
ARM: imx: add i.mx6ulz msl support
ARM: Assume maintainership of ARM reference designs
ARM: support big-endian for the virt architecture
MAINTAINERS: sdhci: move the Microchip entry to proper location
MAINTAINERS: move former ATMEL entries to proper MICROCHIP location
MAINTAINERS: remove the / ATMEL string from MICROCHIP entries
MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver
MAINTAINERS: pwm: add entry for Microchip pwm driver
MAINTAINERS: dmaengine: add files to Microchip dma entry
MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver
...
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To all appearance Joachim Eastwood abandoned the maintenance of NXP
LPC18xx/LPC43xx archtecture about two years ago, and for me it would be
possible to continue the support, fortunately the quality of platform
drivers written by Joachim is exceptionally high.
The change is based on https://lkml.org/lkml/2018/9/24/1398 discussion.
At the same time two redundant explicit driver file paths are dropped
from the list, clk-lpc18xx* drivers are covered by "lpc18xx" search
pattern and timer-lpc32xx driver is covered by "lpc32xx" pattern and it
goes into ARM/LPC32XX entry, which is also under my wing, in other words
LPC18xx/LPC43xx clocksource and CCF drivers will remain maintained.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Joachim Eastwood <manabian@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Samsung mach/soc changes for v4.20, second round
1. Disable SAMSUNG_PM_CHECK Kconfig feature incompatible with Exynos.
* tag 'samsung-soc-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
ARM: s3c24xx: Restore proper usage of pr_info/pr_cont
ARM: s3c24xx: Correct SD card write protect detection on Mini2440
ARM: s3c24xx: Consistently use tab for indenting member assignments
ARM: s3c24xx: formatting cleanup in mach-mini2440.c
ARM: s3c24xx: Remove empty gta02_pmu children probe
ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAM
ARM: exynos: Store Exynos5420 register state in one variable
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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"S3C2410 PM Suspend Memory CRC" feature (controlled by
SAMSUNG_PM_CHECK config option) is incompatible with highmem
(uses phys_to_virt() instead of proper mapping) which is used by
the majority of Exynos boards. The issue manifests itself in OOPS
on affected boards, i.e. on Odroid-U3 I got the following one:
Unable to handle kernel paging request at virtual address f0000000
pgd = 1c0f9bb4
[f0000000] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[<c0458034>] (crc32_le) from [<c0121f8c>] (s3c_pm_makecheck+0x34/0x54)
[<c0121f8c>] (s3c_pm_makecheck) from [<c0121efc>] (s3c_pm_run_res+0x74/0x8c)
[<c0121efc>] (s3c_pm_run_res) from [<c0121ecc>] (s3c_pm_run_res+0x44/0x8c)
[<c0121ecc>] (s3c_pm_run_res) from [<c01210b8>] (exynos_suspend_enter+0x64/0x148)
[<c01210b8>] (exynos_suspend_enter) from [<c018893c>] (suspend_devices_and_enter+0x9ec/0xe74)
[<c018893c>] (suspend_devices_and_enter) from [<c0189534>] (pm_suspend+0x770/0xc04)
[<c0189534>] (pm_suspend) from [<c0186ce8>] (state_store+0x6c/0xcc)
[<c0186ce8>] (state_store) from [<c09db434>] (kobj_attr_store+0x14/0x20)
[<c09db434>] (kobj_attr_store) from [<c02fa63c>] (sysfs_kf_write+0x4c/0x50)
[<c02fa63c>] (sysfs_kf_write) from [<c02f97a4>] (kernfs_fop_write+0xfc/0x1e4)
[<c02f97a4>] (kernfs_fop_write) from [<c027b198>] (__vfs_write+0x2c/0x140)
[<c027b198>] (__vfs_write) from [<c027b418>] (vfs_write+0xa4/0x160)
[<c027b418>] (vfs_write) from [<c027b5d8>] (ksys_write+0x40/0x8c)
[<c027b5d8>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
Add PLAT_S3C24XX, ARCH_S3C64XX and ARCH_S5PV210 dependencies to
SAMSUNG_PM_CHECK config option to hide it on Exynos platforms.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Generic power domains are needed to enable support for Exynos power
domains.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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We keep getting bounces from Baoyou Xie <baoyou.xie@linaro.org>. We
do not know Baoyou's new email address, nor his interest to stay as
the co-maintainer. Let's remove the non-exsiting email first, and we
can add his new email back if we heard back from him later.
Cc: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM64 Based SoC SoC Updates for v4.20
* Add support for RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
* Enable Compare Match Timer (CMT) and Timer Unit (TMU)
for Renesas SoCs
* Remove no longer needed ARCH_SHMOBILE Kconfig symbol
* tag 'renesas-arm64-soc-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: Add Renesas R8A774C0 support
arm64: Add Renesas R8A774A1 support
arm64: enable CMT/TMU support for Renesas SoC
arm64: renesas: Remove the ARCH_SHMOBILE Kconfig symbol
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add configuration option for the RZ/G2E (R8A774C0) SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add configuration option for the RZ/G2M (R8A774A1) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Renesas R-Car gen3 SoCs have both CMT and TMU timers, so we have to enable
building them in Kconfig.platforms (as they don't normally have the prompts
in Kconfig).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The Kconfig symbol for Renesas 64-bit ARM SoCs has always been
ARCH_RENESAS, with ARCH_SHMOBILE being selected to reuse drivers shared
with Renesas 32-bit ARM and/or Renesas SuperH SH-Mobile SoCs.
Commit 9b5ba0df4ea4f940 ("ARM: shmobile: Introduce ARCH_RENESAS")
started the conversion from ARCH_SHMOBILE to ARCH_RENESAS for Renesas
32-bit SoCs. Now all drivers for Renesas ARM SoCs have gained proper
ARCH_RENESAS platform dependencies, there is no longer a need to select
ARCH_SHMOBILE.
With ARCH_SHMOBILE gone, move the ARCH_RENESAS section up, to restore
alphabetical sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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next/soc
mvebu soc for 4.20 (part 1)
- use dt_fixup to provide fallback for enable-method for Armada XP
- document the marvell,prestera compatible string
- update Thomas Petazzoni email in MAINTAINERS file
* tag 'mvebu-soc-4.20-1' of git://git.infradead.org/linux-mvebu:
dt-bindings: marvell,prestera: Add common compatible string
MAINTAINERS: replace free-electrons.com by bootlin.com for Thomas Petazzoni
ARM: mvebu: use dt_fixup to provide fallback for enable-method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add "marvell,prestera" as a compatible string so that drivers can be
written to account for any prestera variant without needing to
specialise to the more specific values.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Free Electrons is now called Bootlin, and my e-mail address was
changed as well, so this commit updates the entries in the MAINTAINERS
file accordingly.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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We need to maintain backwards compatibility with device trees that don't
define an enable method. At the same time we want the device tree to be
able to specify an enable-method and have it stick.
Previously by having smp assigned in the DT_MACHINE definition this
would be picked up by setup_arch() and override whatever
arm_dt_init_cpu_maps() had configured. Now we move the initial
assignment of default smp_ops to a dt_fixup and let
arm_dt_init_cpu_maps() override that if the device tree defines an
enable-method.
[olof@lixom.net: Wrap set_smp_ops() in CONFIG_SMP.]
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com> (on AX3)
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.20:
- Add ipg clock support in MMDC driver for registers access, so that
we will be safe even if the clock is not turned on by firmware.
- Register pm_power_off handler to provide power off support for iMX6
based boards with external PMIC.
- Add platform code support for i.MX 6ULZ SoC which is a derivative of
i.MX6ULL with some modules removed.
* tag 'imx-soc-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: add i.mx6ulz msl support
ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set
ARM: imx: add mmdc ipg clock operation for mmdc
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The i.MX 6ULZ processor is a high-performance, ultra
cost-efficient consumer Linux processor featuring an
advanced implementation of a single Arm® Cortex®-A7 core,
which operates at speeds up to 900 MHz.
This patch adds basic MSL support for i.MX6ULZ, the
i.MX6ULZ has same soc_id as i.MX6ULL, and SRC_SBMR2 bit[6]
is to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means
i.MX6ULZ and 1'b0 means i.MX6ULL.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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One of the Freescale recommended sequences for power off with external
PMIC is the following:
...
3. SoC is programming PMIC for power off when standby is asserted.
4. In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies.
See:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
page 5083
This patch implements step 4. of this sequence.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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i.MX6 SoCs have MMDC ipg clock for registers access, to make
sure MMDC registers access successfully, add optional clock
enable for MMDC driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/soc
Actions Semi arm64 SoC for v4.20
This updates and extends the MAINTAINERS entry, adding Mani.
It also selects PINCTRL in Kconfig.
* tag 'actions-arm64-soc-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
arm64: actions: Enable PINCTRL in platforms Kconfig
MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
MAINTAINERS: Add Actions Semi S900 clk entries
MAINTAINERS: Add reviewer for ACTIONS platforms
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Select PINCTRL for Actions Semi SoCs.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add entry for Actions Semi Owl SoCs DMA driver under ARM/ACTIONS.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add entry for Actions Semiconductor Owl I2C driver under ARM/ACTIONS.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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commit d0e45d686a3e ("dt-bindings: clock: Add S700 support for Actions
Semi Soc's")'
renamed the clock binding for Actions Semi Owl SoCs from
actions,s900-cmu.txt to actions,owl-cmu.txt inorder to accommodate all
members of Owl family SoCs. Hence, update the relevant entry in
MAINTAINERS file.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Add S900 clk entries under ARCH_ACTIONS.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Since I'll be working on improving support for ACTIONS platforms, adding
myself as the reviewer.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Berlin SoC files has been moved from marvell dir to synaptics dir, but
commit bc52497a595d ("MAINTAINERS: update entry for ARM/berlin") didn't
update the dir accordingly. This patch fixes it.
From another side, new derivative SoCs from Synaptics may not be named
as berlin*, so let's update the entries accordingly.
Fixes: bc52497a595d ("MAINTAINERS: update entry for ARM/berlin")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reported-by: Joe Perches <joe@perches.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Drop include/dt-bindings/genpd/k2g.h which disappeared from kernel tree
some time back, however MAINTAINERS file was missed to be updated.
Fixes: d16645054d2f ("dt-bindings: Drop k2g genpd device ID macros")
Cc: Rob Herring <robh@kernel.org>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Reported-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Updates for v4.20
* Rework the PMIC IRQ line quirk to use DT rather than hard coded topology
* Convert to SPDX identifiers
* Convert to using %pOFn instead of device_node.name
* Remove the no longer needed ARCH_SHMOBILE Kconfig symbol
* RZ/G1N (r8a7744) SoC: Add basic SoC and debug-ll support
* R-Car H1 (r8a7779) SoC: remove unused includes
* tag 'renesas-arm-soc-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Rework the PMIC IRQ line quirk
ARM: debug-ll: Add support for r8a7744
ARM: shmobile: r8a7744: Basic SoC support
ARM: shmobile: convert to SPDX identifiers
ARM: shmobile: Convert to using %pOFn instead of device_node.name
ARM: shmobile: Remove the ARCH_SHMOBILE Kconfig symbol
ARM: shmobile: r8a7779: Remove unused includes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Rather than hard-coding the quirk topology, which stopped scaling,
parse the information from DT. The code looks for all compatible
PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
to the same pin. If so, the code sends a matching sequence to the
PMIC to deassert the IRQ.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> (on Koelsch)
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Enable low-level debugging support for RZ/G1N (R8A7744). RZ/G1N uses
SCIF0 for the debug console.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add minimal support for the RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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All drivers for Renesas ARM SoCs have gained proper ARCH_RENESAS
platform dependencies. Hence finish the conversion from ARCH_SHMOBILE
to ARCH_RENESAS for Renesas 32-bit ARM SoCs, as started by commit
9b5ba0df4ea4f940 ("ARM: shmobile: Introduce ARCH_RENESAS").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Presumable unused since commit c99cd90d98a98aa1 ("ARM: shmobile:
r8a7779: Remove legacy SoC code").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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With this I assume maintainership of the Integrator, Versatile
and RealView ARM reference machines.
It's no big secret that I've been maintaining them for years,
but might as well make it official so I get the mails and
don't miss anything.
I have also included some drivers that are closely associated
with the ARM reference designs and yet orphaned in the
MAINTAINERS file. I can surely maintain them too, or route
the question to the right people so it doesn't fall on the
floor of upward to the subsystem maintainers who have too much
to do already as it is.
Cc: Russell King <linux@armlinux.org.uk>
Cc: Rob Herring <robh@kernel.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
A series of omap1 gpio changes for ams-delta
Janusz Krzysztofik has cleaned up ams-delta gpio usage along with
generic gpio framework improvments. This series contains the omap1
specific clean-up for ams-delta modem and unused gpios.
Note that this conflicts with the gpio-omap changes queued into
an immutable gpio branch ib-omap for the gpio-omap.h header file.
The merge resolution is to drop the IS_BUILTIN(CONFIG_GPIO_OMAP)
section and keep the #endif tagged for __ASSEMBLER__.
* tag 'omap-for-v4.20/omap1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: ams-delta: Don't request unused GPIOs
ARM: OMAP1: ams-delta-fiq: Use <linux/platform_data/gpio-omap.h>
ARM: OMAP1: ams-delta: register MODEM device earlier
ARM: OMAP1: ams-delta: initialize latch2 pins to safe values
ARM: OMAP1: ams-delta: assign MODEM IRQ from GPIO descriptor
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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GPIOs with no kernel drivers can still be used from user space, don't
request them from the board file.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Instead of defining symbols already defined in
linux/platform_data/gpio-omap.h, use that header file.
Since we include the header into an assembler code, prevent C only bits
from being read in.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Amstrad Delta MODEM device used to be initialized at arch_initcall
before it was once moved to late_initcall by commit f7519d8c8290 ("ARM:
OMAP1: ams-delta: register latch dependent devices later"). The purpose
of that change was to postpone initialization of devices which depended
on latch2 pins until latch2 converted to GPIO device was ready.
After recent fixes to GPIO handling, it was possible to moove
registration of most of those device back to where they were before.
The same can be safely done with the MODEM device as initialization
of GPIO pins it depends on was moved to machine_init by preceding
patch.
Move registration of the MODEM device to arch_initcall_sync, not to
arch_initcall, so it is never exposed to potential conflict in
registration order hazard against OMAP serial ports.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Latch2 pins control a number of on-board devices, namely LCD, NAND,
MODEM and CODEC. Those pins used to be initialized with safe values
from init_machine before that operation was:
1) moved to late_initcall in preparation for conversion of latch2 to
GPIO device - see commit f7519d8c8290 ("ARM: OMAP1: ams-delta: register
latch dependent devices later"),
2) replaced with non-atomic initialization performed by means of
gpio_request_array() - see commit 937eb4bb0058 ("ARM: OMAP1: ams-delta:
convert latches to basic_mmio_gpio"),
3) made completely asynchronous by delegation of GPIO request
operations performed on subsets of pins to respective device drivers in
subsequent commits.
One visible negative result of that disintegration was corrupt keyboard
data reported by serio driver, recently fixed by commit 41f8fee385a0
("ARM: OMAP1: ams-delta: Hog "keybrd_dataout" GPIO pin").
Moreover, initialization of LATCH2_PIN_MODEM_CODEC still performed with
ams_delta_latch2_write() wrapper from late_init() is now done on not
requested GPIO pin.
Reintroduce atomic initialization of latch2 pins at machine_init to
prevent from random values potentially corrupting NAND data or maybe
even destroing other hardware. Also take care of MODEM/CODEC related
pins so MODEM device probe succeeds even if latch2 GPIO device or
dependent regulator is not ready and CODEC can be reached over the
MODEM even if audio driver doesn't take control over
LATCH2_PIN_MODEM_CODEC.
Once done, remove the no longer needed GPIO based implementation of
ams_delta_latch_write() and its frontend macro.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[tony@atomide.com: updated for the header location to remove dependency]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Don't request MODEM IRQ GPIO by its global number in
ams_delta_modem_init(). Instead, obtain its GPIO descriptor
and assign related IRQ to the MODEM. Do that from
omap_gpio_deps_init(), where the chip is already looked up. Then, in
ams_delta_modem_init(), just check for the IRQ number having been
already assigned.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omap variants
These changes improve support for clkctrl clocks to deal with
split memory ranges for clkctrl providers. And to use %pOFn
instead of device_node.name.
* tag 'omap-for-v4.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Convert to using %pOFn instead of device_node.name
ARM: OMAP2+: hwmod_core: improve the support for clkctrl clocks
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
[tony@atomide.com: updated against clkctrl and rt_idx changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch adds support for split memory ranges for clkctrl providers.
This is necessary to support the coming clockdomain based split of
clkctrl provider ranges, instead of the current CM instance based one.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This architecture, used for running in QEMU, runs just fine when
compiled in big-endian mode. So enable it. This is enabled in exactly
the same way that it is for other platforms (such as vexpress) that also
support big-endian mode in QEMU successfully.
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/soc
ARM: Xilinx Zynq SoC patches for v4.20
- Convert to using %pOFn instead of device_node.name in slcr driver
* tag 'zynq-soc-for-v4.20' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: Convert to using %pOFn instead of device_node.name
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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