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* Merge branch 'samsung/exynos-multiplatform-drivers' into late/multiplatformArnd Bergmann2013-04-2011-137/+152
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series contains the final pieces for Exynos multiplatform support: Most of the patches are about the exynos-combiner irqchip, which is converted to not rely on platform provided constants. * samsung/exynos-multiplatform-drivers: ARM: exynos: restore mach/regs-clock.h for exynos5 irqchip: exynos: look up irq using irq_find_mapping irqchip: exynos: pass irq_base from platform irqchip: exynos: localize irq lookup for ATAGS irqchip: exynos: allocate combiner_data dynamically irqchip: exynos: pass max combiner number to combiner_init ARM: exynos: add missing properties for combiner IRQs clocksource: exynos_mct: remove platform header dependency clk: exynos: prepare for multiplatform Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * irqchip: exynos: look up irq using irq_find_mappingArnd Bergmann2013-04-191-7/+6
| | | | | | | | | | | | | | | | | | | | | | Since we want to move to using the linear IRQ domain in the future, we cannot rely on the irq numbers to be contiguous and need to look up the irq from the hwirq using the domain. This also turns the bogus comparison with NR_IRQ into a more meaningful check to see if the number has a valid mapping. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * irqchip: exynos: pass irq_base from platformArnd Bergmann2013-04-193-12/+16
| | | | | | | | | | | | | | | | | | | | | | The platform code knows the IRQ base, while the irqchip driver should really not. This is a littly hacky because we still hardwire the IRQ base to 160 for the combiner in the DT case, when we should really use -1. Removing that line will cause a linear IRQ domain to be use, as we should. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>
| * irqchip: exynos: localize irq lookup for ATAGSArnd Bergmann2013-04-191-7/+12
| | | | | | | | | | | | | | | | | | The IRQ_SPI() macro is not available in the driver when building with sparse IRQs or multiplatform, so let's move all users of this into one function that we can leave out when building DT-only. Signed-off-by: Arnd Bergmann <arnd@arnd.de> Cc: Thomas Gleixner <tglx@linutronix.de>
| * irqchip: exynos: allocate combiner_data dynamicallyArnd Bergmann2013-04-191-13/+23
| | | | | | | | | | | | | | | | | | | | | | | | The number of combiners on a given SoC is a platform specific constant, and we cannot encode this number on a multiplatform kernel since the header file defining it is not available. Allocating the structure dynamically ends up cleaner anyway since we keep all the data local. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>
| * irqchip: exynos: pass max combiner number to combiner_initArnd Bergmann2013-04-193-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | We can find out the number of combined IRQs from the device tree, but in case of ATAGS boot, the driver currently uses hardcoded values based on the SoC type. We can't do that in general for a multiplatform kernel, so let's instead pass this information from platform code directly in case of ATAGS boot. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>
| * ARM: exynos: add missing properties for combiner IRQsArnd Bergmann2013-04-193-0/+19
| | | | | | | | | | | | | | | | The exynos combiner irqchip needs to find the parent interrupts and needs to know their number, so add the missing properties for exynos4 as they were already present for exynos5. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * clocksource: exynos_mct: remove platform header dependencyArnd Bergmann2013-04-193-17/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | For the non-DT case, the mct_init() function requires access to a couple of platform specific constants, but cannot include the header files in case we are building for multiplatform. This changes the interface to the platform so we pass all the necessary data as arguments to mct_init. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org>
| * clk: exynos: prepare for multiplatformArnd Bergmann2013-04-196-57/+44
| | | | | | | | | | | | | | | | | | | | | | | | The new common clock drivers for exynos are using compile time constants and soc_is_exynos* macros to provide backwards compatibility for pre-DT systems, which is not possible with multiplatform kernels. This moves all the necessary information back into platform code and removes the mach/* header inclusions. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Mike Turquette <mturquette@linaro.org>
* | Merge branch 'next/drivers' into late/multiplatformArnd Bergmann2013-04-19421-8996/+20517
|\ \ | | | | | | | | | | | | | | | | | | Multiple parts of next/drivers are prerequisites for the final exynos multiplatform changes, so let's pull in the entire branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: exynos: restore mach/regs-clock.h for exynos5Arnd Bergmann2013-04-191-0/+107
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Commit 6e6aac75 "ARM: EXYNOS: Migrate clock support to common clock framework" from Thomas Abraham removed the Exynos5 specific register definitions as they were unused at the time, but the cpufreq driver actually still uses them. Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * clocksource: exynos_mct: fix build error on non-DTArnd Bergmann2013-04-191-0/+4
| | | | | | | | | | | | | | | | | | There is currently no alternative implementation for of_irq_count when the function is not defined, and the declaration is hidden, so this works around calling an undeclared function. It should really not be needed. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register()Axel Lin2013-04-191-1/+1
| | | | | | | | | | | | | | | | | | pinctrl_register() returns NULL on error. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge branch 'samsung/exynos-multiplatform' into next/driversArnd Bergmann2013-04-1942-150/+204
| |\ | | | | | | | | | | | | | | | | | | Merging this into the next/drivers branch avoids a number of pointless conflicts with code changed here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * ARM: exynos: enable multiplatform supportArnd Bergmann2013-04-199-19/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes it possible to enable the exynos platform as part of a multiplatform kernel, in addition to keeping the single-platform exynos support. The multiplatform variant has a number of limitations at the moment: * It only supports DT-enabled machines. This is not a problem in the long run, as non-DT machines for exynos are going away. The main problem here is that the gpio code and the exynos_eint irqchip are not multiplatform capable but still required for ATAGS based boot. * The watchdog driver is still missing a conversion. * sparsemem and memory_holes are currently not supported in multiplatform. The the multiplatform aware ARCH_EXYNOS Kconfig symbol is disabled for now, as dependent patches are still pending in other subsystem trees. We will enable it once everything comes together. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * rtc: s3c: make header file localArnd Bergmann2013-04-192-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nothing outside of the rtc driver includes plat/regs-rtc.h, so we can simply move the file into the same directory, which allows us to build the file as platform-independent code. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: rtc-linux@googlegroups.com Cc: Alessandro Zummo <a.zummo@towertech.it>
| | * mtd: onenand/samsung: make regs-onenand.h file localArnd Bergmann2013-04-192-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nothing uses the NAND register definitions other than the actual driver, so we can move the header file into the same local directory, which lets us build it in a multiplatform configuration. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: linux-mtd@lists.infradead.org Cc: David Woodhouse <dwmw2@infradead.org>
| | * thermal/exynos: remove unnecessary header inclusionsArnd Bergmann2013-04-191-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In multiplatform configurations, we cannot include headers provided by only the exynos platform. Fortunately a number of drivers that include those headers do not actually need them, so we can just remove the inclusions. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com> Cc: Zhang Rui <rui.zhang@intel.com>
| | * mmc: sdhci-s3c: remove platform dependenciesArnd Bergmann2013-04-198-62/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | plat/regs-sdhci.h is not used anywhere but in the sdhci-s3c driver, so it can become a local file there and all other inclusions removed. plat/sdhci.h is used only to define the platform devices, and with the exception of the platform_data structure not needed by the driver, so we can split out the platform_data definition instead and leave the rest to platform code. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Chris Ball <cjb@laptop.org>
| | * ARM: samsung: move mfc device definition to s5p-dev-mfc.cArnd Bergmann2013-04-192-46/+41
| | | | | | | | | | | | | | | | | | | | | | | | For a DT-only build we don't want to compile devs.c, but we do need the mfc device, which is also referenced by the DT based platforms, so move it all into one place. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * ARM: exynos: move debug-macro.S to include/debug/Arnd Bergmann2013-04-198-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The move is necessary to support early debug output on exynos with multiplatform configurations. This implies also moving the plat/debug-macro.S file, but we are leaving the remaining users of that file in place, to avoid adding large numbers of extra configuration options to Kconfig.debug Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * ARM: exynos: prepare for sparse IRQArnd Bergmann2013-04-1910-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | When we enable CONFIG_SPARSE_IRQ, we have to set the value of NR_IRQS in the machine_desc for legacy IRQ domains, and any file referring to the number of interrupts or a specific number must include the mach/irqs.h header file explicitly. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * ARM: exynos: introduce EXYNOS_ATAGS symbolArnd Bergmann2013-04-191-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation for multiplatform support, this introduces a new Kconfig symbol to split the ATAGS based EXYNOS platforms from the DT based ones. Turning off CONFIG_EXYNOS_ATAGS disables all platforms that are not yet converted to DT, and we can have code that relies on DT checking for this symbol being disabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | Merge branch 'reset/for_v3.10' of git://git.pengutronix.de/git/pza/linux ↵Olof Johansson2013-04-138-0/+459
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/drivers From Philipp Zabel, this is a series that adds a simple API for devices to request being reset by a separate reset controller hardware, and it implements reset signal device tree bindings. * 'reset/for_v3.10' of git://git.pengutronix.de/git/pza/linux: reset: NULL deref on allocation failure reset: Add reset controller API dt: describe base reset signal binding Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | reset: NULL deref on allocation failureDan Carpenter2013-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | "rstc" is NULL here and we should use "rcdev" instead of "rstc->rcdev". Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| | * | reset: Add reset controller APIPhilipp Zabel2013-04-127-0/+384
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a simple API for devices to request being reset by separate reset controller hardware and implements the reset signal device tree binding. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz>
| | * | dt: describe base reset signal bindingStephen Warren2013-04-121-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This binding is intended to represent the hardware reset signals present internally in most IC (SoC, FPGA, ...) designs. It consists of a binding for a reset controller device (provider), and a pair of properties, "resets" and "reset-names", to link a device node (consumer) to its reset controller via phandle, similarly to the clock and interrupt bindings. The reset controller has all information necessary to reset the consumer device. That could be provided via device tree, or it could be implemented in hardware. The aim is to enable device drivers to request a framework API to issue a reset simply by providing their struct device pointer as the most common case. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Acked-by: Rob Herring <rob.herring@calxeda.com>
| * | | irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructureTony Prisk2013-04-135-19/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the arch-vt8500 irq code to drivers/irqchip and converts it to use the new IRQCHIP_DECLARE and irqchip_init. This allows the removal of some more functions from common.h Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | Merge tag 'timer-samsung-for-v3.10' of ↵Arnd Bergmann2013-04-091-2/+2
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim <kgene.kim@samsung.com>: including fix for GENERIC_GPIO based on previous pull-request for timer-samsung * tag 'timer-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: SAMSUNG: change GENERIC_GPIO to ARCH_REQUIRE_GPIOLIB Signed-off-by: Arnd Bergmann <arnd@anrdb.de>
| | * | | ARM: SAMSUNG: change GENERIC_GPIO to ARCH_REQUIRE_GPIOLIBKukjin Kim2013-04-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I applied regarding samsung-time patches, the "select GENERIC_GPIO" has been added wrong, so this patch fixes that. And since the GENERIC_GPIO in arch/arm/ will be gone away, this adds ARCH_REQUIRE_GPIOLIB for S3C24XX and S5PC100 instead. Reported-by: Alexandre Courbot <gnurou@gmail.com> Cc: Romain Naour <romain.naour@openwide.fr> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | Merge tag 'pmu-exynos-for-v3.10' of ↵Arnd Bergmann2013-04-096-22/+113
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim <kgene.kim@samsung.com>: add support arm-pmu for exynos4 and exynos5250 * tag 'pmu-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add arm-pmu DT binding for exynos421x ARM: EXYNOS: Add arm-pmu DT binding for exynos5250 ARM: EXYNOS: Enable PMUs for exynos4 irqchip: exynos-combiner: Correct combined IRQs for exynos4 irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | ARM: EXYNOS: Add arm-pmu DT binding for exynos421xChanho Park2013-04-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a arm-pmu node to bind device tree for exynos4210. The exynos4210 and 4212 have two cpus which includes a pmu. In contrast, the exynos4412 has 4 cpus and pmus. We need to define two more pmus for this type board. However, supporting arm-pmu for the exynos4412 will handle it later because there is no dts support for 4412 based board. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | ARM: EXYNOS: Add arm-pmu DT binding for exynos5250Chanho Park2013-04-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables arm-pmu to bind device tree for exynos5250. The exynos5250 has two pmus which have combiner irq type. Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | ARM: EXYNOS: Enable PMUs for exynos4Chanho Park2013-04-083-3/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch defines irq numbers of ARM performance monitoring unit for exynos4. Firs of all, we need to fix IRQ_PMU correctly and to split pmu initialization of exynos from plat-samsung for easily defining it. The number of CPU cores and PMU irq numbers are vary according to soc types. So, we need to identify each soc type using soc_is_xxx function and to define the pmu irqs dynamically. For example, the exynos4412 has 4 cpu cores and pmus. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | irqchip: exynos-combiner: Correct combined IRQs for exynos4Chanho Park2013-04-082-14/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects combined IRQs for exynos4 series platform. The exynos4412 has four extra combined irq group and the exynos4212 has two more combined irqs than exynos4210. Each irq is mapped to IRQ_SPI(xx). Unfortunately, extra 4 combined IRQs isn't sequential. So, we need to map the irqs manually. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: changes moved into drivers/irqchip/] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irqChanho Park2013-04-081-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds set_irq_affinity function for combiner_irq. We need this function to enable a arm-pmu because the pmu of exynos has combined type irqs. Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: changes moved into drivers/irqchip/] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | Merge tag 'clk-exynos-for-v3.10' of ↵Arnd Bergmann2013-04-0953-4117/+4655
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim <kgene.kim@samsung.com>: add suppport common clock framework for exynos * tag 'clk-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (73 commits) ARM: EXYNOS: fix compilation error introduced due to common clock migration clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} clk: exynos4: export clocks required for fimc-is clk: samsung: Fix compilation error clk: exynos5250: register display block gate clocks to common clock framework clk: exynos4: Add support for SoC-specific register save list clk: exynos4: Add missing registers to suspend save list clk: exynos4: Remove E4X12 prefix from SRC_DMC register clk: exynos4: Add E4210 prefix to GATE_IP_PERIR register clk: exynos4: Add E4210 prefix to LCD1 clock registers clk: exynos4: Remove SoC-specific registers from save list clk: exynos4: Use SRC_MASK_PERIL{0,1} definitions clk: exynos4: Define {E,V}PLL registers clk: exynos4: Add missing mout_sata on Exynos4210 clk: exynos4: Add missing CMU_TOP and ISP clocks clk: exynos4: Add G3D clocks clk: exynos4: Add camera related clock definitions clk: exynos4: Export mout_core clock of Exynos4210 clk: samsung: Remove unimplemented ops for pll clk: exynos4: Export clocks used by exynos cpufreq drivers ... [arnd: add missing #address-cells property in mshc DT node] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | Merge commit 'v3.9-rc5' into next/clk-exynosKukjin Kim2013-04-081122-6045/+12783
| | |\ \ \ \ | | | | |_|/ | | | |/| | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/boot/dts/exynos4.dtsi arch/arm/boot/dts/exynos5440.dtsi
| | * | | | ARM: EXYNOS: fix compilation error introduced due to common clock migrationThomas Abraham2013-04-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions exynos4_clk_init and exynos4_clk_register_fixed_ext are applicable only on Exynos4 non-dt platforms. But when building Exynos5 platforms without including Exynos4 platforms, the following errors show up. arch/arm/mach-exynos/built-in.o: In function `exynos_init_time': arch/arm/mach-exynos/common.c:446: undefined reference to `exynos4_clk_init' arch/arm/mach-exynos/common.c:447: undefined reference to `exynos4_clk_register_fixed_ext' Fix this compilation errors by marking these calls as Exynos4 specific. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}Tushar Behera2013-04-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide) instead of RATIO bit-field (4-bit wide) for dividing clock rate. With current common clock setup, we are using RATIO bit-field which is creating FIFO read errors while accessing eMMC. Changing over to use PRE_RATIO bit-field fixes this issue. dwmmc_exynos 12200000.dwmmc0: data FIFO error (status=00008020) mmcblk0: error -5 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 end_request: I/O error, dev mmcblk0, sector 1 Signed-off-by: Tushar Behera <tushar.behera@linaro.org> CC: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: export clocks required for fimc-isSylwester Nawrocki2013-04-082-21/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock indexes for ACLK_DIV0, ACLK_DIV1, ACLK_400_MCUISP, ACLK_MCUISP_DIV0, ACLK_MCUISP_DIV1, DIVACLK_400_MCUISP and DIVACLK_200 so these clocks are available to the consumers (Exynos4x12 FIMC-IS subsystem). While at it, indentation of the mux clocks table is corrected. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: samsung: Fix compilation errorSachin Kamat2013-04-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the below compilation error during non-dt build. drivers/clk/samsung/clk.c: In function 'samsung_clk_of_register_fixed_ext': drivers/clk/samsung/clk.c:252:2: error: implicit declaration of function 'for_each_matching_node_and_match' [-Werror=implicit-function-declaration] drivers/clk/samsung/clk.c:252:60: error: expected ';' before '{' token Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos5250: register display block gate clocks to common clock frameworkLeela Krishna Amudala2013-04-042-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi. Register it to common clock framework. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Add support for SoC-specific register save listTomasz Figa2013-04-045-8/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends suspend/resume support for SoC-specific registers to handle differences in register sets on particular SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Add missing registers to suspend save listTomasz Figa2013-04-041-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing clock control registers to the list of registers that should be saved across system suspend. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Remove E4X12 prefix from SRC_DMC registerTomasz Figa2013-04-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This register is present on all Exynos4 SoCs and so the prefix is misleading. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Add E4210 prefix to GATE_IP_PERIR registerTomasz Figa2013-04-041-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This definition is specific for Exynos4210 (which has another location than the same register on Exynos4x12 SoCs) and so needs appropriate prefix. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Add E4210 prefix to LCD1 clock registersTomasz Figa2013-04-041-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds E4210 prefix to all registers related to LCD1 clock domain, because they are present only on Exynos4210. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Remove SoC-specific registers from save listTomasz Figa2013-04-041-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported by separate SoC-specific lists. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | clk: exynos4: Use SRC_MASK_PERIL{0,1} definitionsTomasz Figa2013-04-041-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are definitions of SRC_MASK_PERIL0 and SRC_MASK_PERIL1 registers, but they are not used for clock definitions. This patch modifies related clock definitions to use defined macros instead of numeric offsets. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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