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* Merge branch 'for_linus' of ↵Linus Torvalds2011-03-185-172/+236
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-udf-2.6 * 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-udf-2.6: UDF: Fix compiler warning udf: Convert UDF to new truncate calling sequence
| * UDF: Fix compiler warningDirk Behme2011-02-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compiler warning fs/udf/balloc.c: In function 'udf_bitmap_new_block': fs/udf/balloc.c:273: warning: passing argument 1 of '_find_next_bit_le' from incompatible pointer type fs/udf/balloc.c:285: warning: passing argument 1 of '_find_next_bit_le' from incompatible pointer type fs/udf/balloc.c:311: warning: passing argument 1 of '_find_next_bit_le' from incompatible pointer type fs/udf/balloc.c:325: warning: passing argument 1 of '_find_next_bit_le' from incompatible pointer type The main fix is to add a cast in ext2_find_next_bit(). As all other usage locations of udf_find_next_one_bit() directly use bh->b_data (which is a char *), the useless (char *) cast in line 311 can be removed, too. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Jan Kara <jack@suse.cz>
| * udf: Convert UDF to new truncate calling sequenceJan Kara2011-02-234-170/+234
| | | | | | | | | | | | | | Use new truncation sequence in UDF and fix up error handling in the code. Signed-off-by: Jan Kara <jack@suse.cz>
* | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds2011-03-188-1043/+842
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (38 commits) amd64_edac: Fix decode_syndrome types amd64_edac: Fix DCT argument type amd64_edac: Fix ranges signedness amd64_edac: Drop local variable amd64_edac: Fix PCI config addressing types amd64_edac: Fix DRAM base macros amd64_edac: Fix node id signedness amd64_edac: Drop redundant declarations amd64_edac: Enable driver on F15h amd64_edac: Adjust ECC symbol size to F15h amd64_edac: Simplify scrubrate setting PCI: Rename CPU PCI id define amd64_edac: Improve DRAM address mapping amd64_edac: Sanitize ->read_dram_ctl_register amd64_edac: Adjust sys_addr to chip select conversion routine to F15h amd64_edac: Beef up early exit reporting amd64_edac: Revamp online spare handling amd64_edac: Fix channel interleave removal amd64_edac: Correct node interleaving removal amd64_edac: Add support for interleaved region swapping ... Fix up trivial conflict in include/linux/pci_ids.h due to AMD_15H_NB_MISC being renamed as AMD_15H_NB_F3 next to the new AMD_15H_NB_LINK entry.
| * | amd64_edac: Fix decode_syndrome typesBorislav Petkov2011-03-171-4/+4
| | | | | | | | | | | | | | | | | | Those should all be unsigned. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Fix DCT argument typeBorislav Petkov2011-03-171-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | Fix amd64_debug_display_dimm_sizes() arguments order per convention (pvt is always first). Also, the now second arg denotes the DCT so adjust its type. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Fix ranges signednessBorislav Petkov2011-03-171-4/+5
| | | | | | | | | | | | | | | | | | The dram ranges make sense only as an unsigned type. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Drop local variableBorislav Petkov2011-03-171-3/+2
| | | | | | | | | | | | | | | | | | Use the macro directly instead Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Fix PCI config addressing typesBorislav Petkov2011-03-171-5/+5
| | | | | | | | | | | | | | | | | | Adjust argument types to the PCI config API's types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Fix DRAM base macrosBorislav Petkov2011-03-172-6/+5
| | | | | | | | | | | | | | | | | | Return unsigned u8 values only. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Fix node id signednessBorislav Petkov2011-03-172-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | A node id can never be negative since we use it as an index into the DRAM ranges array. This also makes one of the BUG_ON conditions redundant. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Drop redundant declarationsBorislav Petkov2011-03-171-8/+0
| | | | | | | | | | | | | | | | | | Those were moved to the mce_amd.h header. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Enable driver on F15hBorislav Petkov2011-03-173-15/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the PCI device ids required for driver registration. Remove pvt->ctl_name and use the family descriptor directly, instead. Then, bump driver version and fixup its format. Finally, enable DRAM ECC decoding on F15h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Adjust ECC symbol size to F15hBorislav Petkov2011-03-172-18/+16
| | | | | | | | | | | | | | | | | | | | | F15h has the same ECC symbol size options as F10h revD and later so adjust checks to that. Simplify code a bit. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Simplify scrubrate settingBorislav Petkov2011-03-172-13/+5
| | | | | | | | | | | | | | | | | | Drop per-instance variable and compute min scrubrate dynamically. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | PCI: Rename CPU PCI id defineBorislav Petkov2011-03-172-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With increasing number of PCI function ids, add the PCI function id in the define name instead of its symbolic name in the BKDG for more clarity. Acked-by: Ingo Molnar <mingo@elte.hu> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Improve DRAM address mappingBorislav Petkov2011-03-172-70/+83
| | | | | | | | | | | | | | | | | | | | | | | | Drop static tables which map the bits in F2x80 to a chip select size in favor of functions doing the mapping with some bit fiddling. Also, add F15 support. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Sanitize ->read_dram_ctl_registerBorislav Petkov2011-03-172-9/+7
| | | | | | | | | | | | | | | | | | | | | This function is relevant for F10h and higher, and it has only one callsite so drop its function pointer from the low_ops struct. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Adjust sys_addr to chip select conversion routine to F15hBorislav Petkov2011-03-171-14/+15
| | | | | | | | | | | | | | | | | | | | | F15h sys_addr to chip select mapping is almost identical to F10h's so reuse that. Rename functions on that path accordingly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Beef up early exit reportingBorislav Petkov2011-03-171-1/+12
| | | | | | | | | | | | | | | | | | | | | Add paranoid checks for the sys address before going off and decoding it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Revamp online spare handlingBorislav Petkov2011-03-172-21/+15
| | | | | | | | | | | | | | | | | | | | | Replace per-DCT macros with smarter ones, drop hack and look for the spare rank on all chip selects on a channel. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Fix channel interleave removalBorislav Petkov2011-03-171-9/+17
| | | | | | | | | | | | | | | | | | | | | Remove the channel interleave select bit properly. See F2x110[DctSelIntLvAddr] for details. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Correct node interleaving removalBorislav Petkov2011-03-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | When node interleaving is enabled, a subset of the addr[14:12] bits has to be removed in order to get the normalized DCT address of the DRAM channel. The actual number of bits to remove is determined by F1x[1, 0][7C:40][IntlvEn]. Do this correctly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Add support for interleaved region swappingBorislav Petkov2011-03-172-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Unify get_error_addressBorislav Petkov2011-03-172-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | The address bits from MC4_STATUS differ only between K8 and the rest so no need for a per-family method. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Simplify decoding pathBorislav Petkov2011-03-173-65/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the struct mce directly instead of copying from it into a custom struct err_regs. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Adjust channel counting to F15hBorislav Petkov2011-03-171-7/+6
| | | | | | | | | | | | | | | | | | | | | The only difference is that F10h used to sport ganged DCTs and F15h doesn't so adjust the F10h routine and reuse it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup old defines cruftBorislav Petkov2011-03-172-76/+22
| | | | | | | | | | | | | | | | | | Remove unused defines, drop family names from define names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup NBSH cruftBorislav Petkov2011-03-173-27/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup NBCFG handlingBorislav Petkov2011-03-172-30/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | The fact whether we are chipkill capable or not does not have any bearing when computing the channel index on a ganged DCT configuration so remove that. Also, simplify debug statements. Finally, remove old error injection leftovers, while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup NBCTL codeBorislav Petkov2011-03-172-14/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove family names from macro names, drop single bit defines and comment their meaning instead. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup DCT Select Low/High codeBorislav Petkov2011-03-172-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Shorten macro names, remove family name from macros, fix macro arguments, shorten debug strings. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup Dram Configuration registers handlingBorislav Petkov2011-03-172-37/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Restrict DCT ganged mode check since only Fam10h supports it * Adjust DRAM type detection for BD since it only supports DDR3 * Remove second and thus unneeded DCLR read in k8_early_channel_count() - we do that in read_mc_regs() * Cleanup comments and remove family names from register macros * Remove unused defines There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup DBAM handlingBorislav Petkov2011-03-171-19/+8
| | | | | | | | | | | | | | | | | | | | | | | | Do not read DBAM regs twice and simplify code around them. There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Replace huge bitmasks with a macroBorislav Petkov2011-03-171-10/+9
| | | | | | | | | | | | | | | | | | Replace hard to read hex constants with a continuous masks macro. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Sanitize f10_get_base_addr_offsetBorislav Petkov2011-03-172-48/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function maps the system address to the normalized DCT address. Document what the code does for more clarity and wrap insane bitmasks in a more understandable macro which generates them. Also, reduce number of arguments passed to the function. Finally, rename this function to what it actually does. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Sanitize channel extractionBorislav Petkov2011-03-171-50/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup and simplify f10_determine_channel(); make it more readable. Also drop f10_map_intlv_en_to_shift() in favor of simply counting the bits in F1x124[DramIntlvEn] which is equivalent. There should be no functionality change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup chipselect handlingBorislav Petkov2011-03-172-238/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a struct representing the DRAM chip select base/limit register pairs. Concentrate all CS handling in a single function. Also, add CS looping macros for cleaner, more readable code. While at it, adjust code to F15h. Finally, do smaller macro names cleanups (remove family names from register macros) and debug messages clarification. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Cleanup DHAR handlingBorislav Petkov2011-03-172-24/+23
| | | | | | | | | | | | | | | | | | Adjust to F15h, simplify code, fixup macros. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Remove DRAM base/limit subfields cachingBorislav Petkov2011-03-172-188/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a struct representing the DRAM base/limit range pairs and remove all cached subfields. Replace them with accessor functions, which actually saves us some space: text data bss dec hex filename 14712 1577 336 16625 40f1 drivers/edac/amd64_edac_mod.o.after 14831 1609 336 16776 4188 drivers/edac/amd64_edac_mod.o.before Also, it simplifies the code a lot allowing to merge the K8 and F10h routines. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | amd64_edac: Add support for F15h DCT PCI config accessesBorislav Petkov2011-03-173-75/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | F15h "multiplexes" between the configuration space of the two DRAM controllers by toggling D18F1x10C[DctCfgSel] while F10h has a different set of registers for DCT0, and DCT1 in extended PCI config space. Add DCT configuration space accessors per family thus wrapping all the different access prerequisites. Clean up code while at it, shorten names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | EDAC: Shut up sysfs registration debug codeBorislav Petkov2011-03-171-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | Raise the debug level of these routines so that their output get issued out only when the highest debug level is selected. Otherwise, don't pollute driver debug output. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | Merge branch 'for-linus/2639/i2c-1' of git://git.fluff.org/bjdooks/linuxLinus Torvalds2011-03-185-1/+1157
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus/2639/i2c-1' of git://git.fluff.org/bjdooks/linux: i2c-mpc: Add support for 64bit system i2c: add driver for Freescale i.MX28 i2c: tegra: Add i2c support
| | \ \
| | \ \
| *-. \ \ Merge branches 'for-2639/i2c/i2c-tegra', 'for-2639/i2c/i2c-mpc' and ↵Ben Dooks2011-03-16444-1781/+4039
| |\ \ \ \ | | | | | | | | | | | | | | | | | | 'for-2639/i2c/i2c-imx' into for-linus/2639/i2c-1
| | | * | | i2c: add driver for Freescale i.MX28Wolfram Sang2011-02-233-0/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently only supporting the PIOQUEUE-mode, because DMA-support for this platform is not yet in mainline. When it becomes available and support has been added to this driver, it will also be suitable for i.MX23 and STMP3xxx. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | | i2c-mpc: Add support for 64bit systemKumar Gala2011-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently i2c-mpc supports 32bit system only, this modification makes it supported on both 32-bit and 64-bit systems. The P5020 is the first 64-bit PPC system with the i2c-mpc controller. Based in patch from Xulei <B33228@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | | | i2c: tegra: Add i2c supportColin Cross2011-02-234-0/+733
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds I2C bus driver for nVidia Tegra SoCs. Tegra includes 4 I2C controllers, one of which is inside the Dynamic Voltage Controller and has a slightly different register map. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdogLinus Torvalds2011-03-1842-92/+1498
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog: watchdog: booke_wdt: clean up status messages watchdog: cleanup spaces before tabs watchdog: convert to DEFINE_PCI_DEVICE_TABLE watchdog: Xen watchdog driver watchdog: Intel SCU Watchdog Timer Driver for Moorestown and Medfield platforms. watchdog: jz4740_wdt - fix magic character checking watchdog: add JZ4740 watchdog driver watchdog: it87_wdt: Add support for IT8721F watchdog watchdog: hpwdt: build hpwdt as module by default with NMI_DECODING enabled watchdog: hpwdt: Fix a couple of typos
| * | | | | watchdog: booke_wdt: clean up status messagesTimur Tabi2011-03-151-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improve the status messages that are displayed during some operations of the PowerPC watchdog timer driver. When the watchdog is enabled, the timeout is displayed as a number of seconds, instead of an obscure "period". The "period" is the position of a bit in a 64-bit timer register. The higher the value, the quicker the watchdog timeout occurs. Some people chose a high "period" value for the timer and get confused as to why the board resets within a few seconds. Messages displayed during open and close are now debug messages, so that they don't clutter the console by default. Finally, printk() is replaced with the pr_xxx() equivalent. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * | | | | watchdog: cleanup spaces before tabsWim Van Sebroeck2011-03-1526-63/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cleanup spaces before tabs in drivers/watchdog/ Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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