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* Merge branch 'remotes/lorenzo/pci/xgene'Bjorn Helgaas2021-05-041-1/+2
|\ | | | | | | | | | | | | - Fix cfg resource mapping regression (Dejin Zheng) * remotes/lorenzo/pci/xgene: PCI: xgene: Fix cfg resource mapping
| * PCI: xgene: Fix cfg resource mappingDejin Zheng2021-03-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit e2dcd20b1645 a change was made to use devm_platform_ioremap_resource_byname() to simplify code and remove the res variable; this was wrong since the res variable is still needed and as an outcome the port->cfg_addr gets an erroneous address. Revert the change going back to original behaviour. Link: https://lore.kernel.org/r/20210328144118.305074-1-zhengdejin5@gmail.com Fixes: e2dcd20b1645a ("PCI: controller: Convert to devm_platform_ioremap_resource_byname()") Reported-by: dann.frazier@canonical.com Tested-by: dann frazier <dann.frazier@canonical.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: stable@vger.kernel.org # v5.9+
* | Merge branch 'remotes/lorenzo/pci/vmd'Bjorn Helgaas2021-05-042-13/+53
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Program IRTE with Requester ID of VMD endpoint, not child device (Jon Derrick) - Disable VMD MSI-X remapping when possible so children can use more MSI-X vectors (Jon Derrick) * remotes/lorenzo/pci/vmd: PCI: vmd: Disable MSI-X remapping when possible iommu/vt-d: Use Real PCI DMA device for IRTE
| * | PCI: vmd: Disable MSI-X remapping when possibleJon Derrick2021-03-221-12/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VMD will retransmit child device MSI-X using its own MSI-X table and requester-id. This limits the number of MSI-X available to the whole child device domain to the number of VMD MSI-X interrupts. Some VMD devices have a mode where this remapping can be disabled, allowing child device interrupts to bypass processing with the VMD MSI-X domain interrupt handler and going straight the child device interrupt handler, allowing for better performance and scaling. The requester-id still gets changed to the VMD endpoint's requester-id, and the interrupt remapping handlers have been updated to properly set IRTE for child device interrupts to the VMD endpoint's context. Some VMD platforms have existing production BIOS which rely on MSI-X remapping and won't explicitly program the MSI-X remapping bit. This re-enables MSI-X remapping on unload. Link: https://lore.kernel.org/r/20210210161315.316097-3-jonathan.derrick@intel.com Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> Acked-by: Joerg Roedel <jroedel@suse.de>
| * | iommu/vt-d: Use Real PCI DMA device for IRTEJon Derrick2021-03-221-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | VMD retransmits child device MSI-X with the VMD endpoint's requester-id. In order to support direct interrupt remapping of VMD child devices, ensure that the IRTE is programmed with the VMD endpoint's requester-id using pci_real_dma_dev(). Link: https://lore.kernel.org/r/20210210161315.316097-2-jonathan.derrick@intel.com Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Lu Baolu <baolu.lu@linux.intel.com> Acked-by: Joerg Roedel <jroedel@suse.de>
* | Merge branch 'remotes/lorenzo/pci/tegra'Bjorn Helgaas2021-05-042-4/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Make several tegra symbols const (Rikard Falkeborn) - Fix tegra Kconfig host/endpoint typo (Wesley Sheng) - Fix runtime PM imbalance (Dinghao Liu) * remotes/lorenzo/pci/tegra: PCI: tegra: Fix runtime PM imbalance in pex_ep_event_pex_rst_deassert() PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194 PCI: tegra: Constify static structs
| * | PCI: tegra: Fix runtime PM imbalance in pex_ep_event_pex_rst_deassert()Dinghao Liu2021-04-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_runtime_get_sync() will increase the runtime PM counter even it returns an error. Thus a pairing decrement is needed to prevent refcount leak. Fix this by replacing this API with pm_runtime_resume_and_get(), which will not change the runtime PM counter on error. Link: https://lore.kernel.org/r/20210408072700.15791-1-dinghao.liu@zju.edu.cn Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
| * | PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194Wesley Sheng2021-03-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In config PCIE_TEGRA194_EP the mode incorrectly is referred to as host mode. Fix it. Link: https://lore.kernel.org/r/20201231032539.22322-1-wesley.sheng@amd.com Signed-off-by: Wesley Sheng <wesley.sheng@amd.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> Acked-by: Vidya Sagar <vidyas@nvidia.com>
| * | PCI: tegra: Constify static structsRikard Falkeborn2021-03-221-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | The only usage of them is to assign their address to the 'ops' field in the pcie_port and the dw_pcie_ep structs, both which are pointers to const. Make them const to allow the compiler to put them in read-only memory. Link: https://lore.kernel.org/r/20210207221604.48910-1-rikard.falkeborn@gmail.com Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
* | Merge branch 'remotes/lorenzo/pci/risc-v'Bjorn Helgaas2021-05-0413-1/+556
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - sifive: Add pcie_aux clock to prci driver (Greentime Hu) - sifive: Use reset-simple in prci driver for PCIe (Greentime Hu) - Add SiFive FU740 PCIe host controller driver and DT binding (Paul Walmsley, Greentime Hu) * remotes/lorenzo/pci/risc-v: riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC PCI: fu740: Add SiFive FU740 PCIe host controller driver dt-bindings: PCI: Add SiFive FU740 PCIe host controller MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver clk: sifive: Use reset-simple in prci driver for PCIe driver clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
| * | riscv: dts: Add PCIe support for the SiFive FU740-C000 SoCGreentime Hu2021-05-041-0/+33
| | | | | | | | | | | | | | | | | | | | | Link: https://lore.kernel.org/r/20210504105940.100004-7-greentime.hu@sifive.com Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
| * | PCI: fu740: Add SiFive FU740 PCIe host controller driverPaul Walmsley2021-05-043-0/+319
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for the SiFive FU740 PCIe host controller. This controller is based on the DesignWare PCIe core. Co-developed-by: Henry Styles <hes@sifive.com> Co-developed-by: Erik Danie <erik.danie@sifive.com> Co-developed-by: Greentime Hu <greentime.hu@sifive.com> Link: https://lore.kernel.org/r/20210504105940.100004-6-greentime.hu@sifive.com Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Henry Styles <hes@sifive.com> Signed-off-by: Erik Danie <erik.danie@sifive.com> Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | dt-bindings: PCI: Add SiFive FU740 PCIe host controllerGreentime Hu2021-05-041-0/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add PCIe host controller DT bindings of SiFive FU740. Link: https://lore.kernel.org/r/20210504105940.100004-5-greentime.hu@sifive.com Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
| * | MAINTAINERS: Add maintainers for SiFive FU740 PCIe driverGreentime Hu2021-05-041-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Here add maintainer information for SiFive FU740 PCIe driver. Link: https://lore.kernel.org/r/20210504105940.100004-4-greentime.hu@sifive.com Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | clk: sifive: Use reset-simple in prci driver for PCIe driverGreentime Hu2021-05-044-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use reset-simple in this patch so that pcie driver can use devm_reset_control_get() to get this reset data structure and use reset_control_deassert() to deassert pcie_power_up_rst_n. Link: https://lore.kernel.org/r/20210504105940.100004-3-greentime.hu@sifive.com Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Stephen Boyd <sboyd@kernel.org>
| * | clk: sifive: Add pcie_aux clock in prci driver for PCIe driverGreentime Hu2021-05-045-1/+63
| |/ | | | | | | | | | | | | | | | | | | | | We add pcie_aux clock in this patch so that pcie driver can use clk_prepare_enable() and clk_disable_unprepare() to enable and disable pcie_aux clock. Link: https://lore.kernel.org/r/20210504105940.100004-2-greentime.hu@sifive.com Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Stephen Boyd <sboyd@kernel.org>
* | Merge branch 'remotes/lorenzo/pci/microchip'Bjorn Helgaas2021-05-041-7/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Make several microchip symbols static (Wei Yongjun) - Drop redundant dev_err() for platform_get_irq() errors (Krzysztof Wilczyński) * remotes/lorenzo/pci/microchip: PCI: microchip: Remove dev_err() when handing an error from platform_get_irq() PCI: microchip: Make some symbols static
| * | PCI: microchip: Remove dev_err() when handing an error from platform_get_irq()Krzysztof Wilczyński2021-03-221-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to call the dev_err() function directly to print a custom message when handling an error from either the platform_get_irq() or platform_get_irq_byname() functions as both are going to display an appropriate error message in case of a failure. This change is as per suggestions from Coccinelle, e.g., drivers/pci/controller/pcie-microchip-host.c:1027:2-9: line 1027 is redundant because platform_get_irq() already prints an error Related commit caecb05c8000 ("PCI: Remove dev_err() when handing an error from platform_get_irq()"). Link: https://lore.kernel.org/r/20210310131913.2802385-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | PCI: microchip: Make some symbols staticWei Yongjun2021-03-221-4/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sparse tool complains as follows: drivers/pci/controller/pcie-microchip-host.c:304:18: warning: symbol 'pcie_event_to_event' was not declared. Should it be static? drivers/pci/controller/pcie-microchip-host.c:310:18: warning: symbol 'sec_error_to_event' was not declared. Should it be static? drivers/pci/controller/pcie-microchip-host.c:317:18: warning: symbol 'ded_error_to_event' was not declared. Should it be static? drivers/pci/controller/pcie-microchip-host.c:324:18: warning: symbol 'local_status_to_event' was not declared. Should it be static? Those symbols are not used outside of pcie-microchip-host.c, so this commit marks them static. Link: https://lore.kernel.org/r/20210308094842.3588847-1-weiyongjun1@huawei.com Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
* | Merge branch 'remotes/lorenzo/pci/mediatek'Bjorn Helgaas2021-05-047-1/+1226
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Configure FC and FTS for functions other than 0 (Ryder Lee) - Add missing MODULE_DEVICE_TABLE (Qiheng Lin) - Add YAML schema for MediaTek (Jianjun Wang) - Export pci_pio_to_address() for module use (Jianjun Wang) - Add MediaTek MT8192 PCIe controller driver (Jianjun Wang) - Add MediaTek MT8192 INTx support (Jianjun Wang) - Add MediaTek MT8192 MSI support (Jianjun Wang) - Add MediaTek MT8192 system power management support (Jianjun Wang) * remotes/lorenzo/pci/mediatek: MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer PCI: mediatek-gen3: Add system PM support PCI: mediatek-gen3: Add MSI support PCI: mediatek-gen3: Add INTx support PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 PCI: Export pci_pio_to_address() for module use dt-bindings: PCI: mediatek-gen3: Add YAML schema PCI: mediatek: Add missing MODULE_DEVICE_TABLE PCI: mediatek: Configure FC and FTS for functions other than 0
| * | MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainerJianjun Wang2021-04-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update entry for MediaTek PCIe controller, add Jianjun Wang as MediaTek PCI co-maintainer. Link: https://lore.kernel.org/r/20210420061723.989-8-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
| * | PCI: mediatek-gen3: Add system PM supportJianjun Wang2021-04-291-0/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add suspend_noirq and resume_noirq callback functions to implement PM system suspend and resume hooks for the MediaTek Gen3 PCIe controller. When the system suspends, trigger the PCIe link to enter the L2 state and pull down the PERST# pin, gating the clocks of the MAC layer, and then power-off the physical layer to provide power-saving. When the system resumes, the PCIe link should be re-established and the related control register values should be restored. Link: https://lore.kernel.org/r/20210420061723.989-7-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
| * | PCI: mediatek-gen3: Add MSI supportJianjun Wang2021-04-291-0/+276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MSI support for MediaTek Gen3 PCIe controller. This PCIe controller supports up to 256 MSI vectors, the MSI hardware block diagram is as follows: +-----+ | GIC | +-----+ ^ | port->irq | +-+-+-+-+-+-+-+-+ |0|1|2|3|4|5|6|7| (PCIe intc) +-+-+-+-+-+-+-+-+ ^ ^ ^ | | ... | +-------+ +------+ +-----------+ | | | +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ |0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets) +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ | | | | | | | | | | | | (MSI vectors) | | | | | | | | | | | | (MSI SET0) (MSI SET1) ... (MSI SET7) With 256 MSI vectors supported, the MSI vectors are composed of 8 sets, each set has its own address for MSI message, and supports 32 MSI vectors to generate interrupt. Link: https://lore.kernel.org/r/20210420061723.989-6-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
| * | PCI: mediatek-gen3: Add INTx supportJianjun Wang2021-04-291-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add INTx support for MediaTek Gen3 PCIe controller. Link: https://lore.kernel.org/r/20210420061723.989-5-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
| * | PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192Jianjun Wang2021-04-293-0/+480
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MediaTek's PCIe host controller has three generation HWs, the new generation HW is an individual bridge, it supports Gen3 speed and compatible with Gen2, Gen1 speed. Add support for new Gen3 controller which can be found on MT8192. Link: https://lore.kernel.org/r/20210420061723.989-4-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
| * | PCI: Export pci_pio_to_address() for module useJianjun Wang2021-04-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This interface will be used by PCI host drivers for PIO translation, export it to support compiling those drivers as kernel modules. Link: https://lore.kernel.org/r/20210420061723.989-3-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
| * | dt-bindings: PCI: mediatek-gen3: Add YAML schemaJianjun Wang2021-04-201-0/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add YAML schemas documentation for Gen3 PCIe controller on MediaTek SoCs. Link: https://lore.kernel.org/r/20210420061723.989-2-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
| * | PCI: mediatek: Add missing MODULE_DEVICE_TABLEQiheng Lin2021-04-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Link: https://lore.kernel.org/r/20210331085938.3115-1-linqiheng@huawei.com Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Qiheng Lin <linqiheng@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | PCI: mediatek: Configure FC and FTS for functions other than 0Ryder Lee2021-03-291-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | "PCI_FUNC(port->slot << 3)" is always 0, so previously mtk_pcie_startup_port() only configured FC credits and FTs for function 0. Compute "func" correctly so we also configure functions other than 0. This affects MT2701 and MT7623. Link: https://lore.kernel.org/r/c529dbfc066f4bda9b87edbdbf771f207e69b84e.1604510053.git.ryder.lee@mediatek.com Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
* | Merge branch 'remotes/lorenzo/pci/layerscape'Bjorn Helgaas2021-05-041-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | - Fix ls_pcie_ep_probe() syntax error (comma for semicolon) (Krzysztof Wilczyński) * remotes/lorenzo/pci/layerscape: PCI: layerscape: Correct syntax by changing comma to semicolon
| * | PCI: layerscape: Correct syntax by changing comma to semicolonKrzysztof Wilczyński2021-03-221-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Replace command with a semicolon to correct syntax and to prevent potential unspecified behaviour and/or unintended side effects. Related: https://lore.kernel.org/linux-pci/20201216131944.14990-1-zhengyongjun3@huawei.com/ Co-authored-by: Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20210311033745.1547044-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Roy Zang <roy.zang@nxp.com>
* | Merge branch 'remotes/lorenzo/pci/iproc'Bjorn Helgaas2021-05-041-1/+1
|\ \ | | | | | | | | | | | | | | | | | | - Return zero for success of iproc_msi_irq_domain_alloc() (Pali Rohár) * remotes/lorenzo/pci/iproc: PCI: iproc: Fix return value of iproc_msi_irq_domain_alloc()
| * | PCI: iproc: Fix return value of iproc_msi_irq_domain_alloc()Pali Rohár2021-03-221-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | IRQ domain alloc function should return zero on success. Non-zero value indicates failure. Link: https://lore.kernel.org/r/20210303142202.25780-1-pali@kernel.org Fixes: fc54bae28818 ("PCI: iproc: Allow allocation of multiple MSIs") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Marc Zyngier <maz@kernel.org>
* | Merge branch 'remotes/lorenzo/pci/endpoint'Bjorn Helgaas2021-05-042-8/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fix NULL pointer dereference when epc_features not implemented (Shradha Todi) - Remove redundant initialization (Colin Ian King) - Add missing destroy_workqueue() in endpoint test (Yang Yingliang) * remotes/lorenzo/pci/endpoint: PCI: endpoint: Fix missing destroy_workqueue() PCI: endpoint: Remove redundant initialization of pointer dev PCI: endpoint: Fix NULL pointer dereference for ->get_features()
| * | PCI: endpoint: Fix missing destroy_workqueue()Yang Yingliang2021-04-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing destroy_workqueue() before return from pci_epf_test_init() in the error handling case and add destroy_workqueue() in pci_epf_test_exit(). Link: https://lore.kernel.org/r/20210331084012.2091010-1-yangyingliang@huawei.com Fixes: 349e7a85b25fa ("PCI: endpoint: functions: Add an EP function to test PCI") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | PCI: endpoint: Remove redundant initialization of pointer devColin Ian King2021-04-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer dev is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Link: https://lore.kernel.org/r/20210326190909.622369-1-colin.king@canonical.com Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
| * | PCI: endpoint: Fix NULL pointer dereference for ->get_features()Shradha Todi2021-03-261-7/+10
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_features ops of pci_epc_ops may return NULL, causing NULL pointer dereference in pci_epf_test_alloc_space function. Let us add a check for pci_epc_feature pointer in pci_epf_test_bind before we access it to avoid any such NULL pointer dereference and return -ENOTSUPP in case pci_epc_feature is not found. When the patch is not applied and EPC features is not implemented in the platform driver, we see the following dump due to kernel NULL pointer dereference. Call trace: pci_epf_test_bind+0xf4/0x388 pci_epf_bind+0x3c/0x80 pci_epc_epf_link+0xa8/0xcc configfs_symlink+0x1a4/0x48c vfs_symlink+0x104/0x184 do_symlinkat+0x80/0xd4 __arm64_sys_symlinkat+0x1c/0x24 el0_svc_common.constprop.3+0xb8/0x170 el0_svc_handler+0x70/0x88 el0_svc+0x8/0x640 Code: d2800581 b9403ab9 f9404ebb 8b394f60 (f9400400) ---[ end trace a438e3c5a24f9df0 ]--- Link: https://lore.kernel.org/r/20210324101609.79278-1-shradha.t@samsung.com Fixes: 2c04c5b8eef79 ("PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features") Signed-off-by: Sriram Dash <dash.sriram@gmail.com> Signed-off-by: Shradha Todi <shradha.t@samsung.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
* | Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas2021-05-046-10/+16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Use generic config accessors for TI AM65x (K3) to fix regression (Kishon Vijay Abraham I) - Move MSI Receiver init to dw_pcie_host_init() so it is re-initialized along with the RC in resume (Jisheng Zhang) - Remove unused pcie_app_rd() (Jiapeng Chong) - Move iATU detection earlier to fix regression (Hou Zhiqiang) * remotes/lorenzo/pci/dwc: PCI: dwc: Move iATU detection earlier PCI: dwc/intel-gw: Remove unused function PCI: dwc: Move dw_pcie_msi_init() to dw_pcie_setup_rc() PCI: keystone: Let AM65 use the pci_ops defined in pcie-designware-host.c
| * | PCI: dwc: Move iATU detection earlierHou Zhiqiang2021-04-294-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_pcie_ep_init() depends on the detected iATU region numbers to allocate the in/outbound window management bitmap. It fails after 281f1f99cf3a ("PCI: dwc: Detect number of iATU windows"). Move the iATU region detection into a new function, move the detection to the very beginning of dw_pcie_host_init() and dw_pcie_ep_init(). Also remove it from the dw_pcie_setup(), since it's more like a software initialization step than hardware setup. Link: https://lore.kernel.org/r/20210125044803.4310-1-Zhiqiang.Hou@nxp.com Link: https://lore.kernel.org/linux-pci/20210407131255.702054-1-dmitry.baryshkov@linaro.org Link: https://lore.kernel.org/r/20210413142219.2301430-1-dmitry.baryshkov@linaro.org Fixes: 281f1f99cf3a ("PCI: dwc: Detect number of iATU windows") Tested-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [DB: moved dw_pcie_iatu_detect to happen after host_init callback] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Cc: stable@vger.kernel.org # v5.11+ Cc: Marek Szyprowski <m.szyprowski@samsung.com>
| * | PCI: dwc/intel-gw: Remove unused functionJiapeng Chong2021-04-291-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following clang warning: drivers/pci/controller/dwc/pcie-intel-gw.c:84:19: warning: unused function 'pcie_app_rd' [-Wunused-function]. Link: https://lore.kernel.org/r/1618475577-99198-1-git-send-email-jiapeng.chong@linux.alibaba.com Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
| * | PCI: dwc: Move dw_pcie_msi_init() to dw_pcie_setup_rc()Jisheng Zhang2021-04-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host which makes use of IP's integrated MSI Receiver losts power during suspend, we need to reinit the RC and MSI Receiver in resume. But after we move dw_pcie_msi_init() into the core, we have no API to do so. Usually the dwc users need to call dw_pcie_setup_rc() to reinit the RC, we can solve this problem by moving dw_pcie_msi_init() to dw_pcie_setup_rc(). Link: https://lore.kernel.org/r/20210325152604.6e79deba@xhacker.debian Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
| * | PCI: keystone: Let AM65 use the pci_ops defined in pcie-designware-host.cKishon Vijay Abraham I2021-03-221-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both TI's AM65x (K3) and TI's K2 PCIe driver are implemented in pci-keystone. However Only K2 PCIe driver should use it's own pci_ops for configuration space accesses. But commit 10a797c6e54a ("PCI: dwc: keystone: Use pci_ops for config space accessors") used custom pci_ops for both AM65x and K2. This breaks configuration space access for AM65x platform. Fix it here. Link: https://lore.kernel.org/r/20210317131518.11040-1-kishon@ti.com Fixes: 10a797c6e54a ("PCI: dwc: keystone: Use pci_ops for config space accessors") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> Cc: <stable@vger.kernel.org> # v5.10
* | Merge branch 'remotes/lorenzo/pci/cadence'Bjorn Helgaas2021-05-043-11/+40
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add DT binding and TI j721e support for refclk to PCIe connector (Kishon Vijay Abraham I) - Add host mode and endpoint mode DT bindings for TI AM64 SoC (Kishon Vijay Abraham I) * remotes/lorenzo/pci/cadence: PCI: j721e: Add support to provide refclk to PCIe connector dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
| * | PCI: j721e: Add support to provide refclk to PCIe connectorKishon Vijay Abraham I2021-03-231-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | Add support to provide refclk to PCIe connector. Link: https://lore.kernel.org/r/20210308063550.6227-5-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * | dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoCKishon Vijay Abraham I2021-03-231-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture. Link: https://lore.kernel.org/r/20210308063550.6227-4-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
| * | dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoCKishon Vijay Abraham I2021-03-231-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add host mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture. Link: https://lore.kernel.org/r/20210308063550.6227-3-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
| * | dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connectorKishon Vijay Abraham I2021-03-231-2/+7
| |/ | | | | | | | | | | | | | | | | Add binding to represent refclk to the PCIe connector. Link: https://lore.kernel.org/r/20210308063550.6227-2-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
* | Merge branch 'remotes/lorenzo/pci/brcmstb'Bjorn Helgaas2021-05-041-0/+1
|\ \ | | | | | | | | | | | | | | | | | | - Fix brcm_pcie_probe() error return for unsupported revision (Wei Yongjun) * remotes/lorenzo/pci/brcmstb: PCI: brcmstb: Fix error return code in brcm_pcie_probe()
| * | PCI: brcmstb: Fix error return code in brcm_pcie_probe()Wei Yongjun2021-03-221-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Fix to return negative error code -ENODEV from the unsupported revision error handling case instead of 0, as done elsewhere in this function. Link: https://lore.kernel.org/r/20210308135619.19133-1-weiyongjun1@huawei.com Fixes: 0cdfaceb9889 ("PCI: brcmstb: support BCM4908 with external PERST# signal controller") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
* | Merge branch 'remotes/lorenzo/pci/altera-msi'Bjorn Helgaas2021-05-041-3/+1
|\ \ | | | | | | | | | | | | | | | | | | - Remove redundant dev_err() for devm_ioremap_resource() failure (Chen Hui) * remotes/lorenzo/pci/altera-msi: PCI: altera-msi: Remove redundant dev_err call in altera_msi_probe()
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