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* Merge branch 'clk-qcom-8998-resets' into clk-nextStephen Boyd2018-12-142-64/+301
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| * clk: qcom: Drop unused 8998 clockJeffrey Hugo2018-12-141-14/+0
| * clk: qcom: Leave mmss noc on for 8998Jeffrey Hugo2018-12-141-0/+6
| * clk: qcom: Add missing msm8998 resetsJeffrey Hugo2018-12-112-0/+4
| * clk: qcom: gcc-msm8998: Add clkref clocksBjorn Andersson2018-12-062-0/+80
| * clk: qcom: gcc-msm8998: Disable halt check of UFS clocksBjorn Andersson2018-12-061-3/+3
| * clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_atBjorn Andersson2018-12-061-28/+0
| * clk: qcom: Enumerate remaining msm8998 resetsJeffrey Hugo2018-12-062-0/+174
| * clk: qcom: Add xo dummy clk on msm8998Stephen Boyd2018-12-061-0/+15
| * clk: qcom: Fix MSM8998 resetsJeffrey Hugo2018-12-031-19/+19
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*-------. \ Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp...Stephen Boyd2018-12-1441-609/+4996
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| | | | | * | clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependantAbel Vesa2018-12-143-0/+8
| | | | | * | clk: imx: remove redundant initialization of ret to zeroColin Ian King2018-12-101-1/+1
| | | | | * | clk: imx: Add SCCG PLL typeLucas Stach2018-12-033-1/+267
| | | | | * | clk: imx: Add fractional PLL output clockLucas Stach2018-12-033-0/+236
| | | | | * | clk: imx: Add clock driver for i.MX8MQ CCMAbel Vesa2018-12-033-0/+626
| | | | | * | clk: imx: Add imx composite clockAbel Vesa2018-12-033-0/+195
| | | | | * | dt-bindings: Add binding for i.MX8MQ CCMLucas Stach2018-12-032-0/+415
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| | | | * | clk: imx: add imx8qxp lpcg driverAisheng Dong2018-12-143-1/+319
| | | | * | clk: imx: add lpcg clock supportAisheng Dong2018-12-143-1/+121
| | | | * | clk: imx: add imx8qxp clk driverAisheng Dong2018-12-143-0/+162
| | | | * | clk: imx: add scu clock common partAisheng Dong2018-12-144-0/+292
| | | | * | clk: imx: add configuration option for mmio clksAisheng Dong2018-12-144-2/+8
| | | | * | dt-bindings: clock: add imx8qxp lpcg clock bindingAisheng Dong2018-12-142-0/+204
| | | | * | dt-bindings: clock: imx8qxp: add SCU clock IDsAisheng Dong2018-12-141-0/+136
| | | | * | firmware: imx: add pm svc headfileA.s. Dong2018-11-142-0/+86
| | | | * | dt-bindings: fsl: scu: update power domain bindingA.s. Dong2018-11-141-29/+8
| | | | * | firmware: imx: remove resource id enumsA.s. Dong2018-11-141-552/+0
| | | | * | dt-bindings: imx: add scu resource id headfileA.s. Dong2018-11-141-0/+559
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| | | * | clk: imx6q: add DCICx clocks gateAnson Huang2018-12-102-1/+5
| | | * | clk: imx6sl: ensure MMDC CH0 handshake is bypassedAnson Huang2018-12-101-0/+6
| | | * | clk: imx7d: remove UART1 clock settingAnson Huang2018-11-061-3/+0
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| | * | clk: imx6q: handle ENET PLL bypassLucas Stach2018-12-101-6/+57
| | * | clk: imx6q: optionally get CCM inputs via standard clock handlesLucas Stach2018-12-102-5/+20
| | * | clk: imx6q: reset exclusive gates on initLucas Stach2018-12-101-1/+5
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| * | clk: imx: add imx7ulp clk driverA.s. Dong2018-12-032-0/+221
| * | clk: imx: implement new clk_hw based APIsA.s. Dong2018-12-032-0/+84
| * | clk: imx: make mux parent strings constA.s. Dong2018-12-033-9/+13
| * | dt-bindings: clock: add imx7ulp clock binding docA.s. Dong2018-12-032-0/+213
| * | clk: imx: add imx7ulp composite clk supportA.s. Dong2018-12-033-0/+94
| * | clk: imx: add pfdv2 supportA.s. Dong2018-12-033-1/+208
| * | clk: imx: add pllv4 supportA.s. Dong2018-12-033-0/+188
| * | clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag supportA.s. Dong2018-12-032-0/+18
| * | clk: imx: add gatable clock divider supportA.s. Dong2018-12-033-0/+226
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*-------. \ Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and '...Stephen Boyd2018-12-1461-249/+3266
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| | | | | * \ Merge tag 'v4.21-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd2018-12-133-9/+11
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| | | | | | * clk: rockchip: add clock-id to gate of ACODEC for rk3328Katsuhiro Suzuki2018-11-261-1/+1
| | | | | | * Merge branch 'v4.21-shared/clkids' into v4.21-clk/nextHeiko Stuebner2018-11-261-0/+1
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| | | | | | | * clk: rockchip: add clock ID of ACODEC for rk3328Katsuhiro Suzuki2018-11-261-0/+1
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| | | | | | * clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328Katsuhiro Suzuki2018-11-191-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-20 14:52:32 +0100