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* IRQCHIP: Add new driver for BCM7038-style level 1 interrupt controllersKevin Cernekee2015-04-014-0/+393
* IRQCHIP: bcm7120-l2: Add support for BCM3380-style controllersKevin Cernekee2015-04-012-4/+92
* IRQCHIP: bcm7120-l2: Split STB-specific logic into its own functionKevin Cernekee2015-04-012-64/+71
* IRQCHIP: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsetsKevin Cernekee2015-04-011-13/+28
* IRQCHIP: brcmstb-l2: don't clear wakeable interrupts at init timeBrian Norris2015-04-011-3/+6
* IRQCHIP: Update docs regarding irq_domain_add_tree()Kevin Cernekee2015-04-011-2/+1
* MIPS: bcm3384: Rename "bcm3384" target to "bmips"Kevin Cernekee2015-04-0111-20/+20
* MIPS: Add dtbs_install targetAndrew Bresticker2015-04-011-0/+5
* MIPS: Move device-trees into vendor sub-directoriesAndrew Bresticker2015-04-0127-22/+73
* MIPS: Add support for fine granularity task level IRQ time accountingDeng-Cheng Zhu2015-04-011-0/+1
* MIPS: csrc-sb1250: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: csrc-sb1250: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-011-4/+0
* MIPS: csrc-sb1250: Extract hpt cycle acquisition from sb1250_hpt_readDeng-Cheng Zhu2015-04-011-2/+9
* MIPS: jz4740: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: cevt-txx9: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+9
* MIPS: sgi-ip27: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: csrc-ioasic: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+9
* MIPS: csrc-ioasic: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-011-4/+0
* MIPS: csrc-bcm1480: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: csrc-bcm1480: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-011-4/+0
* MIPS: csrc-r4k: Implement read_sched_clockDeng-Cheng Zhu2015-04-011-0/+8
* MIPS: Add sched_clock supportDeng-Cheng Zhu2015-04-011-0/+1
* CLOCKSOURCE: versatile: Add PLAT_VERSATILE dependencyDeng-Cheng Zhu2015-04-011-1/+1
* MIPS: Add support for full dynticks CPU time accountingDeng-Cheng Zhu2015-04-011-0/+1
* MIPS: Fall back to generic implementation of cmpxchg64 on 32-bit platformsDeng-Cheng Zhu2015-04-011-5/+6
* MIPS: Add SCHED_HRTICK supportDeng-Cheng Zhu2015-04-011-0/+3
* MIPS: OCTEON: Enable little endian kernel.David Daney2015-04-011-1/+2
* MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.hDavid Daney2015-04-011-0/+74
* MIPS: Octeon: Handle bootloader structures in little-endian mode.David Daney2015-04-012-0/+78
* MIPS: Malta: malta-time: Ensure GIC counter is runningMarkos Chandras2015-03-311-1/+3
* CLOCKSOURCE: mips-gic-timer: Ensure GIC counter is runningMarkos Chandras2015-03-311-0/+3
* IRQCHIP: irq-mips-gic: Add new functions to start/stop the GIC counterMarkos Chandras2015-03-312-0/+23
* ttyFDC: Implement KGDB IO operations.James Hogan2015-03-312-6/+179
* MIPS, ttyFDC: Add early FDC console supportJames Hogan2015-03-314-0/+46
* TTY: Add MIPS EJTAG Fast Debug Channel TTY driverJames Hogan2015-03-313-0/+1145
* MIPS: idle: Workaround wait + FDC problemsJames Hogan2015-03-311-2/+11
* MIPS: Malta: Implement get_c0_fdc_int()James Hogan2015-03-311-0/+16
* IRQCHIP: mips-gic: Add function for retrieving FDC IRQJames Hogan2015-03-312-0/+24
* irqchip: mips-gic: Don't treat FDC IRQ as percpu devidJames Hogan2015-03-311-5/+10
* MIPS: Read CPU IRQ line that FDC to routed toJames Hogan2015-03-312-0/+15
* MIPS: Add architectural FDC IRQ fieldsJames Hogan2015-03-311-0/+4
* MIPS: Malta: Implement mips_cdmm_phys_base()James Hogan2015-03-311-0/+7
* MIPS: Add CDMM bus supportJames Hogan2015-03-317-0/+844
* MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-314-0/+18
* MIPS: Allow shared IRQ for timer & perf counterJames Hogan2015-03-311-2/+0
* MIPS: OProfile: Allow sharing IRQ with timerJames Hogan2015-03-311-1/+4
* MIPS: perf: Allow sharing IRQ with timerJames Hogan2015-03-311-3/+5
* MIPS: cevt-r4k: Cleanup c0_compare_interrupt.Ralf Baechle2015-03-311-5/+4
* MIPS: cevt-r4k: Make interrupt handler sharedJames Hogan2015-03-311-1/+7
* IRQCHIP: mips-gic: Add missing definitions for FDC IRQJames Hogan2015-03-311-0/+6
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