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* dt-bindings: pinctrl: Add gpio bindings for Actions S900 SoCManivannan Sadhasivam2018-05-231-0/+16
| | | | | | | | Add gpio bindings for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: Add functions to save and restore pinctrl contextKeerthy2018-05-231-1/+71
| | | | | | | | | | | | | This adds a pair of context save/restore functions to save/restore the state of a set of pinctrl registers. The context is lost during rtc only suspend with ddr in self-refresh on am43xx. Currently the save/restore is being done unconditionally. This will be optimized later with a pdata-quirk function which will allow is to save/restore only when doing the rtc only mode with ddr in self refresh. Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nand: meson-gxl: fix missing data pinsYixun Lan2018-05-161-2/+2
| | | | | | | | | | The data pin 0-7 of the NAND controller are actually missing from the nand pinctrl group, so we fix it here. Fixes: 0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions") Reported-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nand: meson-gxbb: fix missing data pinsYixun Lan2018-05-161-2/+2
| | | | | | | | | | The data pin 0-7 of the NAND controller are actually missing from the nand pinctrl group, so we fix it here. Fixes: cd1e3b01c7d3 ("pinctrl: amlogic: gxbb: add nand pins") Reported-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: Print high/low status of gpios in debugfsStephen Boyd2018-05-161-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I was debugging some gpio issues and I thought that the output of gpio debugfs was telling me the high or low level of the gpios with a '1' or a '0'. We saw a line like this though: gpio93 : in 4 2mA pull down and I started to think that there may be a gas leak in the building because '4' doesn't mean high or low, and other pins said '0' or '1'. It turns out, '4' is the function selection for the pinmux of the gpio and not the value on the pin. Reading code helps decipher what debugfs is actually saying. Add support to read the input or output pin depending on how the pin is configured so we can easily see the high or low value of the pin in debugfs. Now the output looks like gpio93 : in low func4 2mA pull down which clearly shows that the pin is an input, low, with function 4 and a 2mA drive strength plus a pull down. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mvebu: use correct MPP sel value for dev pinsChris Packham2018-05-161-10/+10
| | | | | | | | The "dev" function is selected with the value 0x4 not 0x01. Fixes: commit d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: fix wrong pull status display for no_keeper SoCClément Péron2018-05-161-2/+11
| | | | | | | | | | DebugFS strings about pin pull status for no_keeper SoC are wrong Fix this by adding a different string array for no_keeper SoC Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra20: Provide CDEV1/2 clock muxesDmitry Osipenko2018-05-163-12/+40
| | | | | | | | | | | | | | Muxing of pins MCLK1/2 determine the muxing of the corresponding clocks. Make pinctrl driver to provide clock muxes for the CDEV1/2 pingroups, so that main clk-controller driver could get an actual parent clock for the CDEV1/2 clocks. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: add support for H6 R_PIO pin controllerIcenowy Zheng2018-05-164-0/+134
| | | | | | | | | | | | Allwinner H6 SoC has a R_PIO pin controller like other Allwinner SoCs, which controls the PL and PM pin banks. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: armada-37xx: Convert to use match_string() helperAndy Shevchenko2018-05-161-21/+8
| | | | | | | | The new helper returns index of the matching string in an array. We are going to use it here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: bcm2835: Add support for output-low output-high propertiesMatheus Castello2018-05-161-0/+5
| | | | | | | | | | | Properties to set initial value of pin output buffer. This can be useful for configure hardware in overlay files, and in early boot for checking it states in QA sanity tests. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: bcm2835: Add support for generic pinctrl bindingMatheus Castello2018-05-162-37/+59
| | | | | | | | | | | | | | | | To keep driver up to date we add generic pinctrl binding support, which covers the features used in this driver and has additional node properties that this SoC has compatibility, so enabling future implementations of these properties without the need to create new node properties in the device trees. The logic of this change maintain the old brcm legacy binding support in order to keep the ABI stable. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Add r8a77470 PFC supportBiju Das2018-05-165-0/+2356
| | | | | | | | | | Add PFC support for the R8A77470 SoC including pin groups for some on-chip devices such as SCIF and MMC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77965: Add SDHI pins, groups and functionsTakeshi Kihara2018-05-161-0/+326
| | | | | | | | | | | | This patch adds SDHI{0,1,2,3} pins, groups and functions to the R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77965: Add DU RGB output pins, groups and functionsKieran Bingham2018-05-161-0/+116
| | | | | | | | | | | | | | | This patch adds pins, groups and functions for parallel RGB output signals from DU. The HDMI and TCON pins are added to separate groups. Based on a similar patch of the R8A7796 PFC driver by Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Kieran: Rebase on top of tree] Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77965: Fixup incorrect SPDX identifierThomas Gleixner2018-05-161-1/+1
| | | | | | | | | | | | GPL-2. is not a valid SPDX identifier. Make it GPL-2.0 Fixes: 490e687eb8b2 ("pinctrl: sh-pfc: Initial R-Car M3-N support") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Rob Herring <robh@kernel.org> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77970: Fix pin I/O voltage control supportSergei Shtylyov2018-05-161-8/+24
| | | | | | | | | | | | I've included the pin I/O voltage control into the R8A77970 PFC driver but it was incomplete because: - SH_PFC_PIN_CFG_IO_VOLTAGE pin flags weren't set properly; - sh_pfc_soc_info::ioctrl_regs wasn't set at all... Fixes: b92ac66a1819 ("pinctrl: sh-pfc: Add R8A77970 PFC support") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77980: Add pin I/O voltage control supportSergei Shtylyov2018-05-161-3/+49
| | | | | | | | | | | Add the pin I/O voltage level control support to the R8A77980 PFC driver. Loosely based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: sh-pfc: Document r8a77470 PFC supportBiju Das2018-05-161-0/+1
| | | | | | | | | | Document PFC support for the R8A77470 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77965: Add PWM pins, groups and functionsTakeshi Kihara2018-05-161-0/+153
| | | | | | | | | | | This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7796: Fix comment for MSIOF3 SS2_E pinGeert Uytterhoeven2018-05-161-1/+1
| | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7795: Fix comment for MSIOF3 SS2_E pinGeert Uytterhoeven2018-05-161-1/+1
| | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a77965: Add MSIOF pins, groups and functionsTakeshi Kihara2018-05-161-0/+912
| | | | | | | | | | | This patch adds MSIOF{0,1,2,3} pins, groups and functions to the R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Correct MSIOF3 SS2_E comment] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: use seq_puts() instead of seq_printf()Dong Aisheng2018-05-021-2/+2
| | | | | | | | | | | | | | | | | | | | For a constant format without additional arguments, use seq_puts() instead of seq_printf(). Also, it fixes the following checkpatch warning. WARNING: Prefer seq_puts to seq_printf + seq_printf(s, "N/A"); WARNING: Prefer seq_puts to seq_printf + seq_printf(s, "\n"); Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-imx: improve the code comments of PIN_FUNC_IDDong Aisheng2018-05-021-4/+11
| | | | | | | | | | | | | | | The current code comments of PIN_FUNC_ID actually is not true for SHARE_MUX_CONF_REG case which should be a 4 u32 PIN_FUNC_ID. Fix the comments and re-org it a bit for better extendibility as we may add a different size for SCU based PIN_FUNC_ID later. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: fix unsigned check if nfuncs with less than or equal zeroDong Aisheng2018-05-021-1/+1
| | | | | | | | | | | | | | | | The unsigned integer nfuncs is being error checked with a value less or equal to zero; this is always false if of_get_child_count returns a -ve for an error condition since nfuncs is not signed. Fix this by making variables nfuncs and i signed integers. Detected with Coccinelle: drivers/pinctrl/freescale/pinctrl-imx.c:620:6-12: WARNING: Unsigned expression compared with zero: nfuncs <= 0 Cc: Linus Walleij <linus.walleij@linaro.org> Reported-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: uniphier: add LD11 MPEG2-TS I/O pin-mux settingsKatsuhiro Suzuki2018-05-021-0/+49
| | | | | | | | | | | | | | | | | | | | The MPEG2-TS input/output core both accepts serial TS and parallel TS. The serial TS interface uses following pins: hscin0_s : HS0DOUT[0-3] hscin1_s : HS0DOUT[4-7] hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0 hscout0_s: HS0DOUT[0-3] hscout1_s: HS0DOUT[4-7] And the parallel TS interface uses following pins: hscin0_p : HS0BCLKIN, HS0SYNCIN, HS0VALIN, HS0DIN[0-7] hscin1_p : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN[0-7] hscout0_p: HS0BCLKOUT, HS0SYNCOUT, HS0VALOUT, HS0DOUT[0-7] Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: uniphier: add LD20 MPEG2-TS I/O pin-mux settingsKatsuhiro Suzuki2018-05-021-0/+54
| | | | | | | | | | | | | | | | | | | | | The MPEG2-TS input/output core both accepts serial TS and parallel TS. The serial TS interface uses following pins: hscin0_s : HS0DOUT[0-3] hscin1_s : HS0DOUT[4-7] hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0 hscin3_s : HS1DIN[2-5] hscout0_s: HS0DOUT[0-3] hscout1_s: HS0DOUT[4-7] And the parallel TS interface uses following pins: hscin0_p : HS0BCLKIN, HS0SYNCIN, HS0VALIN, HS0DIN[0-7] hscin1_p : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN[0-7] hscout0_p: HS0BCLKOUT, HS0SYNCOUT, HS0VALOUT, HS0DOUT[0-7] Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: actions: Fix Kconfig dependency and help textManivannan Sadhasivam2018-05-021-2/+4
| | | | | | | | | | | | | | | | | | 1. Fix Kconfig dependency for Actions Semi S900 pinctrl driver which generates below warning in x86: WARNING: unmet direct dependencies detected for PINCTRL_OWL Depends on [n]: PINCTRL [=y] && (ARCH_ACTIONS || COMPILE_TEST [=n]) && OF [=n] Selected by [y]: - PINCTRL_S900 [=y] && PINCTRL [=y] 2. Add help text for OWL pinctrl driver Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reported-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: actions: fix missing break in PIN_CONFIG_DRIVE_STRENGTH case.Colin Ian King2018-05-021-0/+2
| | | | | | | | | | | | | | There is a missing break in case PIN_CONFIG_DRIVE_STRENGTH leading to a fall-through to the PIN_CONFIG_SLEW_RATE case that performs different checks against *arg. This looks like an unintentional missing break so add in the break. Detected by CoverityScan, CID#1468456, 1468459 ("Missing break in switch") Fixes: 513d7a2f7e0f ("pinctrl: actions: Add Actions S900 pinctrl driver") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: actions: make s900_functions, s900_padinfo and s900_pads staticColin Ian King2018-05-021-3/+3
| | | | | | | | | | | | | | | | | s900_functions, s900_padinfo and s900_pads are local to the source and do not need to be in global scope, so make them static. Cleans up sparse warnings: drivers/pinctrl/actions/pinctrl-s900.c:1445:30: warning: symbol 's900_functions' was not declared. Should it be static? drivers/pinctrl/actions/pinctrl-s900.c:1664:20: warning: symbol 's900_padinfo' was not declared. Should it be static? drivers/pinctrl/actions/pinctrl-s900.c:207:31: warning: symbol 's900_pads' was not declared. Should it be static? Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: meson: axg: add tdm pinsJerome Brunet2018-05-021-0/+107
| | | | | | | | Add the information related to the tdm pins of the A113D SoC Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: meson: meson8: add the RGMII RXD2/RXD3 and TXD2/TXD3 signalsMartin Blumenstingl2018-05-021-1/+12
| | | | | | | | | | | | | These are only available on the Meson8m2 SoC (which uses the same DesignWare Ethernet MAC as Meson8b). The "eth_tx_clk_50m" signal either provides a 50MHz clock for the RMII PHYs or the RGMII TX clock (as far as we know the frequency is controlled by the PRG_ETHERNET registers in the Ethernet MAC "glue" IP block). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: meson: meson8: add support for the Meson8m2 SoCMartin Blumenstingl2018-05-021-1/+9
| | | | | | | | | | | | Add Meson8m2 support to the existing Meson8 pinctrl driver. Since there are only very few changes (Meson8m2 has an extra signal on 10 CBUS pins, no other differences were found so far). Add the new compatible strings for Meson8m2 to the existing Meson8 driver so we don't have to duplicate the whole driver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: meson: add support for the Meson8m2 SoCMartin Blumenstingl2018-05-021-0/+2
| | | | | | | | | | | | | | The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b (such as the Gigabit capable DesignWare MAC). It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins get an additional function (four of these are Ethernet RXD2, RXD3, TXD2 and TXD3 which are required when the board uses an RGMII PHY). The AOBUS pins seem to be identical on Meson8 and Meson8m2. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: update pinmux defintions for MT7623Ryder Lee2018-05-021-3/+87
| | | | | | | | Fulfill the pinmux macros for MT7623 Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: mcp23s08: Clarify gpiospec flags cell usageRicardo Silva2018-05-021-1/+3
| | | | | | | | | | | | | | | | | | | | | The pinctrl-mcp23s08 driver doesn't provide a specific gpiospec of_xlate() function, causing the gpiolib-of's of_gpio_simple_xlate() function to be used instead, which takes the gpiospec's second cell as the flags specifier according to 'include/dt-bindings/gpio/gpio.h'. The pinctrl-mcp23s08 bindings document was mentioning that the flags were unused, which is not accurate because values in that second cell are indeed used by the gpiolib-of's of_gpio_simple_xlate() for configuring the gpio (e.g. its polarity). This way, replace the "flags currently unused" reference in the dt-bindings document with references to the appropriate files specifying the possible flag values and gpiospec description. CC: devicetree@vger.kernel.org Signed-off-by: Ricardo Silva <rjpdasilva@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: bcm2835-gpio: Add generic pinctrl supportMatheus Castello2018-05-021-0/+18
| | | | | | | | | | Added generic pin configuration and multiplexing support, and should be preferred than brcm legacy one. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002Timur Tabi2018-05-021-41/+73
| | | | | | | | | | | | | | | | | | | | | | | | | Newer versions of the firmware for the Qualcomm Datacenter Technologies QDF2400 restricts access to a subset of the GPIOs on the TLMM. To prevent older kernels from accidentally accessing the restricted GPIOs, we change the ACPI HID for the TLMM block from QCOM8001 to QCOM8002, and introduce a new property "gpios". This property is an array of specific GPIOs that are accessible. When an older kernel boots on newer (restricted) firmware, it will fail to probe. To implement the sparse GPIO map, we register all of the GPIOs, but fill in the data only for available GPIOs. This ensures that the driver cannot accidentally access an unavailable GPIO. The pinctrl-msm driver also scans the "gpios" property to determine which pins are available, and ensure that only those can be registered. Support for QCOM8001 is removed as there is no longer any firmware that implements it. Signed-off-by: Timur Tabi <timur@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: remove static globals to allow multiple TLMMsTimur Tabi2018-05-021-23/+21
| | | | | | | | | | | Two data structures are declared as static globals but are intended to be per-TLMM. Move them into the msm_pinctrl structure and initialize them at runtime. Signed-off-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: actions: Add Actions S900 pinctrl driverManivannan Sadhasivam2018-05-027-0/+2604
| | | | | | | | | | | | | Add pinctrl driver for Actions Semi S900 SoC. The driver supports pinctrl, pinmux and pinconf functionalities through a range of registers common to both gpio driver and pinctrl driver. Pinmux functionality is available only for the pin groups while the pinconf functionality is available for both pin groups and individual pins. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: samsung: add pin_dbg_show callback for debugfsChanho Park2018-05-021-0/+29
| | | | | | | | | | | | | | | This patch adds a samsung_pin_dbg_show function to implement the pin_dbg_show callback function which can be used to show pin confuration values. Basically, it can show pin setting values by accessing the "pins" node like below: $ cat pins pin 0 (gpy7-0) CON(0x0) DAT(0x1) PUD(0x1) DRV(0x0) CON_PDN(0x0) PUD_PDN(0x0) Signed-off-by: Chanho Park <parkch98@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Linux 4.17-rc1v4.17-rc1Linus Torvalds2018-04-161-2/+2
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* Merge tag 'for-4.17-part2-tag' of ↵Linus Torvalds2018-04-1694-1234/+277
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux Pull more btrfs updates from David Sterba: "We have queued a few more fixes (error handling, log replay, softlockup) and the rest is SPDX updates that touche almost all files so the diffstat is long" * tag 'for-4.17-part2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: btrfs: Only check first key for committed tree blocks btrfs: add SPDX header to Kconfig btrfs: replace GPL boilerplate by SPDX -- sources btrfs: replace GPL boilerplate by SPDX -- headers Btrfs: fix loss of prealloc extents past i_size after fsync log replay Btrfs: clean up resources during umount after trans is aborted btrfs: Fix possible softlock on single core machines Btrfs: bail out on error during replay_dir_deletes Btrfs: fix NULL pointer dereference in log_dir_items
| * btrfs: Only check first key for committed tree blocksQu Wenruo2018-04-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When looping btrfs/074 with many cpus (>= 8), it's possible to trigger kernel warning due to first key verification: [ 4239.523446] WARNING: CPU: 5 PID: 2381 at fs/btrfs/disk-io.c:460 btree_read_extent_buffer_pages+0x1ad/0x210 [ 4239.523830] Modules linked in: [ 4239.524630] RIP: 0010:btree_read_extent_buffer_pages+0x1ad/0x210 [ 4239.527101] Call Trace: [ 4239.527251] read_tree_block+0x42/0x70 [ 4239.527434] read_node_slot+0xd2/0x110 [ 4239.527632] push_leaf_right+0xad/0x1b0 [ 4239.527809] split_leaf+0x4ea/0x700 [ 4239.527988] ? leaf_space_used+0xbc/0xe0 [ 4239.528192] ? btrfs_set_lock_blocking_rw+0x99/0xb0 [ 4239.528416] btrfs_search_slot+0x8cc/0xa40 [ 4239.528605] btrfs_insert_empty_items+0x71/0xc0 [ 4239.528798] __btrfs_run_delayed_refs+0xa98/0x1680 [ 4239.529013] btrfs_run_delayed_refs+0x10b/0x1b0 [ 4239.529205] btrfs_commit_transaction+0x33/0xaf0 [ 4239.529445] ? start_transaction+0xa8/0x4f0 [ 4239.529630] btrfs_alloc_data_chunk_ondemand+0x1b0/0x4e0 [ 4239.529833] btrfs_check_data_free_space+0x54/0xa0 [ 4239.530045] btrfs_delalloc_reserve_space+0x25/0x70 [ 4239.531907] btrfs_direct_IO+0x233/0x3d0 [ 4239.532098] generic_file_direct_write+0xcb/0x170 [ 4239.532296] btrfs_file_write_iter+0x2bb/0x5f4 [ 4239.532491] aio_write+0xe2/0x180 [ 4239.532669] ? lock_acquire+0xac/0x1e0 [ 4239.532839] ? __might_fault+0x3e/0x90 [ 4239.533032] do_io_submit+0x594/0x860 [ 4239.533223] ? do_io_submit+0x594/0x860 [ 4239.533398] SyS_io_submit+0x10/0x20 [ 4239.533560] ? SyS_io_submit+0x10/0x20 [ 4239.533729] do_syscall_64+0x75/0x1d0 [ 4239.533979] entry_SYSCALL_64_after_hwframe+0x42/0xb7 [ 4239.534182] RIP: 0033:0x7f8519741697 The problem here is, at btree_read_extent_buffer_pages() we don't have acquired read/write lock on that extent buffer, only basic info like level/bytenr is reliable. So race condition leads to such false alert. However in current call site, it's impossible to acquire proper lock without race window. To fix the problem, we only verify first key for committed tree blocks (whose generation is no larger than fs_info->last_trans_committed), so the content of such tree blocks will not change and there is no need to get read/write lock. Reported-by: Nikolay Borisov <nborisov@suse.com> Fixes: 581c1760415c ("btrfs: Validate child tree block's level and first key") Signed-off-by: Qu Wenruo <wqu@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
| * btrfs: add SPDX header to KconfigDavid Sterba2018-04-121-0/+2
| | | | | | | | Signed-off-by: David Sterba <dsterba@suse.com>
| * btrfs: replace GPL boilerplate by SPDX -- sourcesDavid Sterba2018-04-1258-750/+65
| | | | | | | | | | | | | | | | Remove GPL boilerplate text (long, short, one-line) and keep the rest, ie. personal, company or original source copyright statements. Add the SPDX header. Signed-off-by: David Sterba <dsterba@suse.com>
| * btrfs: replace GPL boilerplate by SPDX -- headersDavid Sterba2018-04-1235-475/+133
| | | | | | | | | | | | | | | | | | | | Remove GPL boilerplate text (long, short, one-line) and keep the rest, ie. personal, company or original source copyright statements. Add the SPDX header. Unify the include protection macros to match the file names. Signed-off-by: David Sterba <dsterba@suse.com>
| * Btrfs: fix loss of prealloc extents past i_size after fsync log replayFilipe Manana2018-04-121-5/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if we allocate extents beyond an inode's i_size (through the fallocate system call) and then fsync the file, we log the extents but after a power failure we replay them and then immediately drop them. This behaviour happens since about 2009, commit c71bf099abdd ("Btrfs: Avoid orphan inodes cleanup while replaying log"), because it marks the inode as an orphan instead of dropping any extents beyond i_size before replaying logged extents, so after the log replay, and while the mount operation is still ongoing, we find the inode marked as an orphan and then perform a truncation (drop extents beyond the inode's i_size). Because the processing of orphan inodes is still done right after replaying the log and before the mount operation finishes, the intention of that commit does not make any sense (at least as of today). However reverting that behaviour is not enough, because we can not simply discard all extents beyond i_size and then replay logged extents, because we risk dropping extents beyond i_size created in past transactions, for example: add prealloc extent beyond i_size fsync - clears the flag BTRFS_INODE_NEEDS_FULL_SYNC from the inode transaction commit add another prealloc extent beyond i_size fsync - triggers the fast fsync path power failure In that scenario, we would drop the first extent and then replay the second one. To fix this just make sure that all prealloc extents beyond i_size are logged, and if we find too many (which is far from a common case), fallback to a full transaction commit (like we do when logging regular extents in the fast fsync path). Trivial reproducer: $ mkfs.btrfs -f /dev/sdb $ mount /dev/sdb /mnt $ xfs_io -f -c "pwrite -S 0xab 0 256K" /mnt/foo $ sync $ xfs_io -c "falloc -k 256K 1M" /mnt/foo $ xfs_io -c "fsync" /mnt/foo <power failure> # mount to replay log $ mount /dev/sdb /mnt # at this point the file only has one extent, at offset 0, size 256K A test case for fstests follows soon, covering multiple scenarios that involve adding prealloc extents with previous shrinking truncates and without such truncates. Fixes: c71bf099abdd ("Btrfs: Avoid orphan inodes cleanup while replaying log") Signed-off-by: Filipe Manana <fdmanana@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
| * Btrfs: clean up resources during umount after trans is abortedLiu Bo2018-04-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if some fatal errors occur, like all IO get -EIO, resources would be cleaned up when a) transaction is being committed or b) BTRFS_FS_STATE_ERROR is set However, in some rare cases, resources may be left alone after transaction gets aborted and umount may run into some ASSERT(), e.g. ASSERT(list_empty(&block_group->dirty_list)); For case a), in btrfs_commit_transaciton(), there're several places at the beginning where we just call btrfs_end_transaction() without cleaning up resources. For case b), it is possible that the trans handle doesn't have any dirty stuff, then only trans hanlde is marked as aborted while BTRFS_FS_STATE_ERROR is not set, so resources remain in memory. This makes btrfs also check BTRFS_FS_STATE_TRANS_ABORTED to make sure that all resources won't stay in memory after umount. Signed-off-by: Liu Bo <bo.liu@linux.alibaba.com> Signed-off-by: David Sterba <dsterba@suse.com>