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* cxl: Set up and enable PSL TimebasePhilippe Bergheaud2015-08-302-1/+61
| | | | | | | | | This patch configures the PSL Timebase function and enables it, after the CAPP has been initialized by OPAL. Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* cxl: Fix force unmapping mmaps of contexts allocated through the kernel apiIan Munsie2015-08-303-3/+33
| | | | | | | | | | | | | | | | | | | | | The cxl user api uses the address_space associated with the file when we need to force unmap all cxl mmap regions (e.g. on eeh, driver detach, etc). Currently, contexts allocated through the kernel api do not do this and instead skip the mmap invalidation, potentially allowing them to poke at the hardware after such an event, which may cause all sorts of trouble. This patch allocates an address_space for cxl contexts allocated through the kernel api so that the same invalidate path will for these contexts as well. We don't use the anonymous inode's address_space, as doing so could invalidate any mmaps of completely unrelated drivers using anonymous file descriptors. This patch also introduces a kernelapi flag, so we know when freeing the context if the address_space was allocated by us and needs to be freed. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* cxl: Fix + cleanup error paths in cxl_dev_context_initIan Munsie2015-08-301-7/+12
| | | | | | | | | | | | | If the cxl_context_alloc() call fails, we return immediately without releasing the reference on the AFU device, allowing it to leak. This patch switches to using goto style error handling so that the device is released in common code for both error paths, and will also simplify things if we add additional initialisation in this function in the future. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/eeh: Fix fenced PHB caused by eeh_slot_error_detail()Gavin Shan2015-08-281-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | The config space of some PCI devices can't be accessed when their PEs are in frozen state. Otherwise, fenced PHB might be seen. Those PEs are identified with flag EEH_PE_CFG_RESTRICTED, meaing EEH_PE_CFG_BLOCKED is set automatically when the PE is put to frozen state (EEH_PE_ISOLATED). eeh_slot_error_detail() restores PCI device BARs with eeh_pe_restore_bars(), which then calls eeh_ops->restore_config() to reinitialize the PCI device in (OPAL) firmware. eeh_ops->restore_config() produces PCI config access that causes fenced PHB. The problem was reported on below adapter: 0001:01:00.0 0200: 14e4:168e (rev 10) 0001:01:00.0 Ethernet controller: Broadcom Corporation \ NetXtreme II BCM57810 10 Gigabit Ethernet (rev 10) This fixes the issue by skipping eeh_pe_restore_bars() in eeh_slot_error_detail() when EEH_PE_CFG_BLOCKED is set for the PE. Fixes: b6541db1 ("powerpc/eeh: Block PCI config access upon frozen PE") Cc: stable@vger.kernel.org # v4.0+ Reported-by: Manvanthara B. Puttashankar <mputtash@in.ibm.com> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/pseries: Cleanup on pci_dn_reconfig_notifier()Gavin Shan2015-08-281-11/+13
| | | | | | | | | | | | | | This applies cleanup on pci_dn_reconfig_notifier(), no functional changes: * Rename variable "pci" to "pdn" to indicate its purpose clearly. * The parent node can be released at any time. So it should be hold with of_get_parent() before accessing it. * The device node doesn't have to have parent node in theory. More check on this. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/pseries: Fix corrupted pdn listGavin Shan2015-08-281-0/+5
| | | | | | | | | | | | | | | | | | | | | | | Commit cca87d30 ("powerpc/pci: Refactor pci_dn") introduced pdn list for SRIOV VFs. It means the pdn is be put into the child list of its parent pdn when the pdn is created. When doing PCI hot unplugging on pSeries, the PCI device node as well as its pdn are released through procfs entry "powerpc/ofdt". Some one else grabs the memory chunk of the pdn and update it accordingly. At the same time, the pdn is still tracked in the child list of parent pdn. It leads to corrupted child list in the parent pdn. This fixes above issue by removing the pdn from the child list of its parent pdn when the device node is detached from the system. Note the pdn is free'd when the device node is released if the device node is dynamic one. Otherwise, the device node as well as the pdn won't be released. Fixes: cca87d30 ("powerpc/pci: Refactor pci_dn") Cc: stable@vger.kernel.org # 4.1+ Reported-by: Santwana Samantray <santwana.samantray@in.ibm.com> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* Merge branch 'next' of ↵Michael Ellerman2015-08-2742-1070/+1054
|\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next Freescale updates from Scott: "Highlights include 32-bit memcpy/memset optimizations, checksum optimizations, 85xx config fragments and updates, device tree updates, e6500 fixes for non-SMP, and misc cleanup and minor fixes."
| * powerpc/t1023rdb/dts: set ifc nand chip select from 2 to 1Jaiprakash Singh2015-08-181-1/+1
| | | | | | | | | | | | | | | | | | | | IFC NAND chip select is wrongly mapped to 2 in reg property of NAND node. Due to this kernel is not able probe NAND flash. Set chip select to 1 in reg property. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/mpc85xx:Add SCFG device tree support of T104xWang Dongsheng2015-08-181-0/+5
| | | | | | | | | | Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: Add binding for SCFGWang Dongsheng2015-08-181-0/+18
| | | | | | | | | | | | | | | | SCFG provides SoC specific configuration and status registers for the chip. Add this for powerpc platform. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl-booke: Add T1040D4RDB/T1042D4RDB board supportPriyanka Jain2015-08-184-0/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040D4RDB/T1042D4RDB are Freescale Reference Design Board which can support T1040/T1042 QorIQ Power Architecture™ processor respectively T1040D4RDB/T1042D4RDB board Overview ------------------------------------- - SERDES Connections, 8 lanes supporting: - PCI - SGMII - SATA 2.0 - QSGMII(only for T1040D4RDB) - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR4 UDIMM -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Add support for T1040/T1042D4RDB board: -add device tree -Add entry in corenet_generic.c Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: Remove unused pci fixup hooks on c293pcieHou Zhiqiang2015-08-181-4/+0
| | | | | | | | | | | | | | | | The c293pcie board is an endpoint device and it doesn't need PM, so remove hooks pcibios_fixup_phb and pcibios_fixup_bus. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/e6500: hw tablewalk: optimize a bit for tcd lock acquiring codesKevin Hao2015-08-181-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | It makes no sense to put the instructions for calculating the lock value (cpu number + 1) and the clearing of eq bit of cr1 in lbarx/stbcx loop. And when the lock is acquired by the other thread, the current lock value has no chance to equal with the lock value used by current cpu. So we can skip the comparing for these two lock values in the lbz/bne loop. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/e6500: remove the stale TCD_LOCK macroKevin Hao2015-08-181-1/+0
| | | | | | | | | | | | | | | | | | Since we moved the "lock" to be the first element of struct tlb_core_data in commit 82d86de25b9c ("powerpc/e6500: Make TLB lock recursive"), this macro is not used by any code. Just delete it. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: Add a vga alias node for P1022Jason Jin2015-08-182-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In u-boot, when set the video as console, the name 'vga' is used as a general name for the video device, during the fdt_fixup_stdout process, the 'vga' name is used to search in the dtb to setup the 'linux,stdout-path' node. Though the P1022 DIU is not VGA-compatible device, to meet the 'vga' name used in u-boot, the vga alias node is added for P1022 in this patch. At the same time, a display alias is also added so that no other components grow dependencies on the vga alias node. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl: Force coherent memory on e500mc derivativesScott Wood2015-08-084-13/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In CoreNet systems it is not allowed to mix M and non-M mappings to the same memory, and coherent DMA accesses are considered to be M mappings for this purpose. Ignoring this has been observed to cause hard lockups in non-SMP kernels on e6500. Furthermore, e6500 implements the LRAT (logical to real address table) which allows KVM guests to control the WIMGE bits. This means that KVM cannot force the M bit on the way it usually does, so the guest had better set it itself. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/booke64: Move mb() to __set_pte_at() with kernel-addr testScott Wood2015-08-082-10/+11
| | | | | | | | | | | | | | | | | | | | map_kernel() doesn't catch all places that create kernel PTEs. In particular, vmalloc() calls set_pte_at() directly. This causes a crash when booting a non-SMP kernel on e6500. Move the sync to __set_pte(), to be executed only for kernel addresses. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * fsl_ifc: Change IO accessor based on endiannessJaiprakash Singh2015-08-084-141/+213
| | | | | | | | | | | | | | | | | | | | | | IFC IO accressor are set at run time based on IFC IP registers endianness.IFC node in DTS file contains information about endianness. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Brian Norris <computersforpeace@gmail.com>
| * powerpc/config: enable aquantia PHYShaohui Xie2015-08-081-0/+1
| | | | | | | | | | | | | | Aquantia PHYs used on platforms such as T2080RDB, T1024RDB. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: enable teranetics PHYShaohui Xie2015-08-081-0/+1
| | | | | | | | | | | | | | | | The PHY uses XAUI interface to connect to MAC, mostly the PHY used on riser card. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/t1023rdb: add ina220 current sensor nodeShengzhou Liu2015-08-081-0/+11
| | | | | | | | | | | | | | Add support for INA220 current sensor. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/t1024rdb: add ina220 current sensor nodeShengzhou Liu2015-08-081-0/+6
| | | | | | | | | | | | | | Add support for INA220 current sensor. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/32: Few optimisations in memcpyLEROY Christophe2015-08-081-5/+5
| | | | | | | | | | | | | | | | | | This patch adds a few optimisations in memcpy functions by using lbzu/stbu instead of lxb/stb and by re-ordering insn inside a loop to reduce latency due to loading Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/32: cacheable_memcpy becomes memcpyLEROY Christophe2015-08-081-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cacheable_memcpy uses dcbz instruction and is more efficient than memcpy when the destination is in RAM. If the destination is in an io area, memcpy_toio() is normally used, not memcpy This patch renames memcpy as generic_memcpy, and renames cacheable_memcpy as memcpy On MPC885, we get approximatly 7% increase of the transfer rate on an FTP reception Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/32: Merge the new memset() with the old oneLEROY Christophe2015-08-081-27/+7
| | | | | | | | | | | | | | | | cacheable_memzero() which has become the new memset() and the old memset() are quite similar, so just merge them. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/32: memset(0): use cacheable_memzeroLEROY Christophe2015-08-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | cacheable_memzero uses dcbz instruction and is more efficient than memset(0) when the destination is in RAM This patch renames memset as generic_memset, and defines memset as a prolog to cacheable_memzero. This prolog checks if the byte to set is 0. If not, it falls back to generic_memcpy() cacheable_memzero disappears as it is not referenced anywhere anymore Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * Partially revert "powerpc: Remove duplicate cacheable_memcpy/memzero functions"LEROY Christophe2015-08-081-0/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | This partially reverts commit 'powerpc: Remove duplicate cacheable_memcpy/memzero functions ("b05ae4ee602b7dc90771408ccf0972e1b3801a35")' Functions cacheable_memcpy/memzero are more efficient than memcpy/memset as they use the dcbz instruction which avoids refill of the cacheline with the data that we will overwrite. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: use memset_io() to clear CPM MuramLEROY Christophe2015-08-081-1/+1
| | | | | | | | | | | | | | CPM muram is not cached, so use memset_io() instead of memset() Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/mm: Don't call __flush_dcache_icache_phys() with PA>VAScott Wood2015-08-082-8/+13
| | | | | | | | | | | | | | | | | | __flush_dcache_icache_phys() requires the ability to access the memory with the MMU disabled, which means that on a 32-bit system any memory above 4 GiB is inaccessible. In particular, mpc86xx is 32-bit and can have more than 4 GiB of RAM. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: add support for csum_add()LEROY Christophe2015-08-081-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The C version of csum_add() as defined in include/net/checksum.h gives the following assembly in ppc32: 0: 7c 04 1a 14 add r0,r4,r3 4: 7c 64 00 10 subfc r3,r4,r0 8: 7c 63 19 10 subfe r3,r3,r3 c: 7c 63 00 50 subf r3,r3,r0 and the following in ppc64: 0xc000000000001af8 <+0>: add r3,r3,r4 0xc000000000001afc <+4>: cmplw cr7,r3,r4 0xc000000000001b00 <+8>: mfcr r4 0xc000000000001b04 <+12>: rlwinm r4,r4,29,31,31 0xc000000000001b08 <+16>: add r3,r4,r3 0xc000000000001b0c <+20>: clrldi r3,r3,32 0xc000000000001b10 <+24>: blr include/net/checksum.h also offers the possibility to define an arch specific function. This patch provides a specific csum_add() inline function. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: put csum_tcpudp_magic inlineLEROY Christophe2015-08-083-46/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | csum_tcpudp_magic() is only a few instructions, and does modify really few registers. So it is not worth having it as a separate function and suffer function branching and saving of volatile registers. This patch makes it inline by use of the already existing csum_tcpudp_nofold() function. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: Use kconfig fragmentsScott Wood2015-08-0812-1074/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unify mpc85xx and corenet configs using fragments, to ease maintenance and avoid the sort of drift that the previous patch fixed. Hardware and software options are separated, with the hope that other embedded platforms could share the software options, and to make it easier to maintain custom/alternate configs that focus on either hardware or software options. Due to the previous patch, this patch should not affect the results of any of the affected defconfigs -- only how those results are achieved. The resulting config is more or less the union of the options that any of the configs previously selected. No attempt was made in this (or the previous) patch to edit out questionable options, but this patch will make it easier to do so in future patches. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: Make defconfigs consistentScott Wood2015-08-084-31/+262
| | | | | | | | | | | | | | | | | | | | The mpc85xx and corenet configs have many differences between them that can't be explained by the target hardware of each config. The next patch will consolidate these targets using kconfig fragments; this patch shows what the resulting defconfigs will look like (generated by using savedefconfig on a fragment-generated config). Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: Update corenet32_smp_defconfig for modern distrosMichael Ellerman2015-08-081-0/+6
| | | | | | | | | | | | | | | | corenet32_smp_defconfig is missing some things that modern distros require, enable them. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/corenet32: enable DMA in defconfigYao Yuan2015-08-081-0/+2
| | | | | | | | | | | | | | | | | | By default we enable DMA(CONFIG_FSL_DMA) support which are needed on P2041RDB, P3041DS, P4080DS, B4860QDS, etc. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/corenet: enable eSDHCYangbo Lu2015-08-082-0/+4
| | | | | | | | | | Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/powernv: Enable LEDS supportVasant Hegde2015-08-272-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 84ad6e5c added LEDS support for PowerNV platform. Lets update ppc64_defconfig to pick LEDS driver. PowerNV LEDS driver looks for "/ibm,opal/leds" node in device tree and loads if this node exists. Hence added it as 'm'. Also note that powernv LEDS driver needs NEW_LEDS and LEDS_CLASS as well. Hence added them to config file. mpe: Also add them to pseries_defconfig, which is currently also used for powernv systems. Suggested-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Cc: Stewart Smith <stewart@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/iommu: Set default DMA offset in dma_dev_setupAlexey Kardashevskiy2015-08-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e91c25111aa3 "powerpc/iommu: Cleanup setting of DMA base/offset" expects that the default DMA offset is set from pnv_ioda_setup_bus_dma() which is correct unless it is SRIOV where the code flow is different - at the moment when pnv_ioda_setup_bus_dma() is called, PCI devices for VFs are not created yet. This adds missing set_dma_offset() to pnv_pci_ioda_dma_dev_setup() to cover the case of SRIOV. Note that we still need set_dma_offset() in pnv_ioda_setup_bus_dma() as at the boot time pnv_pci_ioda_dma_dev_setup() is called when no PE was created yet, this happens at the PHB fixup stage. Fixes: e91c25111aa3 ("powerpc/iommu: Cleanup setting of DMA base/offset") Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | cxl: Remove racy attempt to force EEH invocation in resetDaniel Axtens2015-08-271-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cxl_reset currently PERSTs the slot, and then repeatedly tries to read MMIO space in order to kick off EEH. There are 2 problems with this: it's unnecessary, and it's racy. It's unnecessary because the PERST will bring down the PHB link. That will be picked up by the CAPP, which will send out an HMI. Skiboot, noticing an HMI from the CAPP, will send an OPAL notification to the kernel, which will trigger EEH recovery. It's also racy: the EEH recovery triggered by the CAPP will eventually cause the MMIO space to have its mapping invalidated and the pointer NULLed out. This races with our attempt to read the MMIO space. This is causing OOPSes in testing. Simply drop all the attempts to force EEH detection, and trust that Skiboot will send the notification and that we'll act on it. The Skiboot code to send the EEH notification has been in Skiboot for as long as CAPP recovery has been supported, so we don't need to worry about breaking obscure setups with ancient firmware. Cc: Ryan Grimm <grimm@linux.vnet.ibm.com> Cc: stable@vger.kernel.org Fixes: 62fa19d4b4fd ("cxl: Add ability to reset the card") Signed-off-by: Daniel Axtens <dja@axtens.net> Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | cxl: Release irqs if memory allocation failsVaibhav Jain2015-08-271-2/+5
| | | | | | | | | | | | | | | | | | | | | | This minor patch plugs a potential irq leak in case of a memory allocation failure inside function the afu_allocate_irqs. Presently the irqs allocated to the context gets leaked if allocation of either one of context irq_bitmap or irq_names fails. Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | cxl: Remove use of macro DEFINE_PCI_DEVICE_TABLEVaishali Thakkar2015-08-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Macro DEFINE_PCI_DEVICE_TABLE is deprecated. So, here use struct pci_device_id instead of DEFINE_PCI_DEVICE_TABLE with the goal of getting rid of this macro completely. The Coccinelle semantic patch that performs this transformation is as follows: @@ identifier a; declarer name DEFINE_PCI_DEVICE_TABLE; initializer i; @@ - DEFINE_PCI_DEVICE_TABLE(a) + const struct pci_device_id a[] = i; Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com> Acked-by: Michael Neuling <mikey@neuling.org> Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv: Fix mis-merge of OPAL support for LEDS driverMichael Ellerman2015-08-222-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I merged the OPAL support for the powernv LEDS driver I missed a hunk. This is slightly modified from the original patch, as the original added code to opal-api.h which is not in the skiboot version, which is discouraged. Instead those values are moved into the driver, which is the only place they are used. Fixes: 8a8d91817aec ("powerpc/powernv: Add OPAL interfaces for accessing and modifying system LED states") Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv: Reset HILE before kexec_sequence()Samuel Mendoza-Jonas2015-08-201-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | On powernv secondary cpus are returned to OPAL, and will then enter the target kernel in big-endian. However if it is set the HILE bit will persist, causing the first exception in the target kernel to be delivered in litte-endian regardless of the current endianness. If running on top of OPAL make sure the HILE bit is reset once we've finished waiting for all of the secondaries to be returned to OPAL. Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/kexec: Reset secondary cpu endianness before kexecSamuel Mendoza-Jonas2015-08-201-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | If the target kernel does not inlcude the FIXUP_ENDIAN check, coming from a different-endian kernel will cause the target kernel to panic. All ppc64 kernels can handle starting in big-endian mode, so return to big-endian before branching into the target kernel. This mainly affects pseries as secondaries on powernv are returned to OPAL. Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/hvsi: Fix endianness issues in the HVSI driverLaurent Dufour2015-08-201-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes several endianness issues detected when running the HVSI driver in little endian mode. These issues are raised in little endian mode because the data exchanged in memory between the kernel and the hypervisor has to be in big endian format. This exhibits as errors such as: irq: (null) didn't like hwirq-0x1000a00 to VIRQ16 mapping (rc=-22) hvsi_console_init: couldn't create irq mapping for 0x1000a00 The data structures already have endian annotations, and sparse is generating numerous warnings based on those. This commit fixes all of them. Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Jiri Slaby <jslaby@suse.cz> CC: linuxppc-dev@lists.ozlabs.org CC: linux-kernel@vger.kernel.org [mpe: Flesh out change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | leds/powernv: Add driver for PowerNV platformVasant Hegde2015-08-204-0/+383
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements LED driver for PowerNV platform using the existing generic LED class framework. PowerNV platform has below type of LEDs: - System attention Indicates there is a problem with the system that needs attention. - Identify Helps the user locate/identify a particular FRU or resource in the system. - Fault Indicates there is a problem with the FRU or resource at the location with which the indicator is associated. We register classdev structures for all individual LEDs detected on the system through LED specific device tree nodes. Device tree nodes specify what all kind of LEDs present on the same location code. It registers LED classdev structure for each of them. All the system LEDs can be found in the same regular path /sys/class/leds/. We don't use LED colors. We use LED node and led-types property to form LED classdev. Our LEDs have names in this format. <location_code>:<attention|identify|fault> Any positive brightness value would turn on the LED and a zero value would turn off the LED. The driver will return LED_FULL (255) for any turned on LED and LED_OFF (0) for any turned off LED. The platform level implementation of LED get and set state has been achieved through OPAL calls. These calls are made available for the driver by exporting from architecture specific codes. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Acked-by: Stewart Smith <stewart@linux.vnet.ibm.com> Tested-by: Stewart Smith <stewart@linux.vnet.ibm.com> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv: Create LED platform deviceVasant Hegde2015-08-201-1/+11
| | | | | | | | | | | | | | | | | | This patch adds platform devices for leds. Also export LED related OPAL API's so that led driver can use these APIs. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv: Add OPAL interfaces for accessing and modifying system LED ↵Anshuman Khandual2015-08-203-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | states This patch registers the following two new OPAL interfaces calls for the platform LED subsystem. With the help of these new OPAL calls, the kernel will be able to get or set the state of various individual LEDs on the system at any given location code which is passed through the LED specific device tree nodes. (1) OPAL_LEDS_GET_INDICATOR opal_leds_get_ind (2) OPAL_LEDS_SET_INDICATOR opal_leds_set_ind Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Stewart Smith <stewart@linux.vnet.ibm.com> Tested-by: Stewart Smith <stewart@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | powerpc/powernv: Fix the log message when disabling VFWei Yang2015-08-201-2/+3
| | | | | | | | | | | | | | | | | | | | On powernv platform, IOV BAR would be shifted if necessary. While the log message is not correct when disabling VFs. This patch fixes this by print correct message based on the offset value. Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* | cxl: Allow release of contexts which have been OPENED but not STARTEDAndrew Donnellan2015-08-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we open a context but do not start it (either because we do not attempt to start it, or because it fails to start for some reason), we are left with a context in state OPENED. Previously, cxl_release_context() only allowed releasing contexts in state CLOSED, so attempting to release an OPENED context would fail. In particular, this bug causes available contexts to run out after some EEH failures, where drivers attempt to release contexts that have failed to start. Allow releasing contexts in any state with a value lower than STARTED, i.e. OPENED or CLOSED (we can't release a STARTED context as it's currently using the hardware, and we assume that contexts in any new states which may be added in future with a value higher than STARTED are also unsafe to release). Cc: stable@vger.kernel.org Fixes: 6f7f0b3df6d4 ("cxl: Add AFU virtual PHB and kernel API") Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Daniel Axtens <dja@axtens.net> Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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