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* Merge branch 'for-rmk' of git://git.marvell.com/orionRussell King2009-11-0810-199/+367
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| * [ARM] orion5x: update defconfigNicolas Pitre2009-11-081-102/+176
| | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: update defconfigNicolas Pitre2009-11-081-91/+169
| | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: clarify PCIe MEM bus/physical address distinctionLennert Buytenhek2009-11-083-2/+3
| | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] kirkwood: fix PCI I/O port assignmentLennert Buytenhek2009-11-082-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of allocating PCI devices I/O port bus addresses from the 000xxxxx I/O port range as intended, due to a bus versus physical address mixup, the Kirkwood PCIe handling code inadvertently allocated I/O port bus addresses from the f20xxxxx address range (which is the physical address range of the PCIe I/O mapping window), but then direct all I/O port accesses to bus addresses 000xxxxx, which would then not be decoded at all. Fix this by setting the base address of the PCIe I/O space struct resource to KIRKWOOD_PCIE_IO_BUS_BASE instead of the incorrect KIRKWOOD_PCIE_IO_PHYS_BASE, and fix up __io() to expect addresses offsetted by the former instead of the latter. (The suggested fix of directing I/O port accesses from the host to bus addresses f20xxxxx instead has the problem that assigning full 32bit I/O port bus addresses (f20xxxxx) doesn't work on all PCI devices, as not all PCI devices implement full 32 bit BAR registers for I/O ports. We should really try to allocate I/O port bus addresses that fit in 16 bits.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] kirkwood: fix section mismatchLi Jie2009-11-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kirkwood_timer_init() and kirkwood_pcie_setup() lack of __init which causes following warnings: WARNING: vmlinux.o(.text+0x9568): Section mismatch in reference from the function kirkwood_timer_init() to the function .init.text:kirkwood_find_tclk() The function kirkwood_timer_init() references the function __init kirkwood_find_tclk(). This is often because kirkwood_timer_init lacks a __init annotation or the annotation of kirkwood_find_tclk is wrong. WARNING: vmlinux.o(.text+0x979c): Section mismatch in reference from the function kirkwood_pcie_setup() to the function .init.text:orion_pcie_setup() The function kirkwood_pcie_setup() references the function __init orion_pcie_setup(). This is often because kirkwood_pcie_setup lacks a __init annotation or the annotation of orion_pcie_setup is wrong. Signed-off-by: lijie <eltshanli@gmail.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| * [ARM] OpenRD base: Initialize PCI express and i2cSimon Kagstrom2009-11-061-0/+12
| | | | | | | | | | | | Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Acked-by: Dieter Kiermaier <dk-arm-linux@gmx.de> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] properly report mv78100 stepping A1Lennert Buytenhek2009-11-062-0/+3
| | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | ARM: 5784/1: fix early boot machine ID mismatch error displayNicolas Pitre2009-11-081-1/+1
| | | | | | | | | | | | | | | | | | That code was refactored a long time ago, but one particular label didn't get adjusted properly which broke the listing of supported machines. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5780/1: KS8695: Fix macro definition bug in regs-switch.czeal2009-11-051-1/+1
| | | | | | | | | | | | | | | | | | | | NOTE: 1. Macro style is so strange. 2. The value 0xc0 is not match with KS8695 manual. It should be 0x0c. Signed-off-by: zeal <zealcook@gmail.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5779/1: ep93xx/micro9.c: fix implicit declaration of function ↵Jean-Christop PLAGNIOL-VILLARD2009-11-051-0/+1
| | | | | | | | | | | | | | | | __raw_readl and IOMEM Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'fix' of ↵Russell King2009-11-053-21/+37
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| * | [ARM] pxa: fix resume failure by saving/restoring IPRx registersHaojian Zhuang2009-11-031-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since interrupt handler is changed to use interrupt priority, we also need to save and restore these interrupt controller registers in suspend/resume routine. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Tested-by: Daniel Mack <daniel@caiaq.de> Tested-by: Pavel Machek <pavel@ucw.cz> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | [ARM] pxa/palm: fix incorrect initialization of Palm Tungsten C keyboardOndrej Zajicek2009-11-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Palm Tungsten C keyboard structure has swapped rows/cols gpio structures and does not work. This patch fixes it. Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org> Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | [ARM] pxa/zaurus: fix NAND flash OOB layout for BorzoiStanislav Brabec2009-11-031-16/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Borzoi, Terrier and Akita use the same NAND Flash OOB layout, which seems to be different from Spitz for some reason. Here is a fix. When the code was ported to the platform data, the map was applied just for Akita. After this patch, Flash works again on Borzoi. Terrier still has a problem with partition table different from Borzoi (unfixable without reading of the system configuration in flash) and JFFS2 partitions can be mounted (with some "Empty flash at ... ends at ..." in the syslog). Signed-off-by: Stanislav Brabec <utx@penguin.cz> Acked-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2009-11-048-95/+486
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Ironlake suspend/resume support drm/i915: kill warning in intel_find_pll_g4x_dp drm/i915: update watermarks before enabling PLLs drm/i915: add FIFO watermark support for G4x drm/i915: quiet DP i2c init drm/i915: fix panel fitting filter coefficient select for Ironlake drm/i915: fix to setup display reference clock control on Ironlake drm/i915: Install a fence register for fbc on g4x drm/i915: save/restore BLC histogram control reg across suspend/resume drm/i915: Fix FDI M/N setting according with correct color depth drm/i915: disable powersave feature for Ironlake currently drm/i915: Fix render reclock availability detection. drm/i915: Save and restore the GM45 FBC regs on suspend and resume. drm/i915: Set the LVDS_BORDER when using LVDS scaling mode drm/i915: disable FBC for Pineview, fixing a boot hang.
| * | | drm/i915: Ironlake suspend/resume supportZhenyu Wang2009-10-232-55/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds registers save/restore for Ironlake to make suspend work. Signed-off-by: Guo, Chaohong <chaohong.guo@intel.com> [zhenyuw: some code re-orgnization, and add more save/restore for FDI link and transcoder registers, also fix palette register for Ironlake] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: kill warning in intel_find_pll_g4x_dpJesse Barnes2009-10-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize clock.vco to silence gcc. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: update watermarks before enabling PLLsJesse Barnes2009-10-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When coming back from DPMS or turning on a display, make sure we have the watermarks set up before turning on the display plane, otherwise we may get underruns. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: add FIFO watermark support for G4xJesse Barnes2009-10-232-8/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Turns out G4x needs to have sensible watermarks set, especially for self-refresh enabled modes. Add support for it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: quiet DP i2c initZhenyu Wang2009-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: fix panel fitting filter coefficient select for IronlakeZhenyu Wang2009-10-192-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Must set filter selection as hardcoded coefficients for medium 3x3 filtering, which matches vbios setting for Ironlake. This fixes display corrupt issue on HP arrandale with new vbios. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: fix to setup display reference clock control on IronlakeZhenyu Wang2009-10-192-2/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For new stepping of PCH, the display reference clock is fully under driver's control. This one trys to setup all needed reference clock for different outputs. Older stepping of PCH chipset should be ignoring this. This fixes output failure issue on newer PCH which requires driver to take control of reference clock enabling. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: Install a fence register for fbc on g4xChris Wilson2009-10-151-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable framebuffer compression on a g4x, we not only need the buffer to tiled (X only), we also need to hold a fence register for the buffer. Currently we only install a fence register for pre-i965s when setting up the scanout buffer. Rather than adding some convoluted logic to g4x_enable_fbc() to acquire a fence register, and perhaps to g4x_disable_fbc() to release it again, we can extend the acquisition during setup to all chipsets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: save/restore BLC histogram control reg across suspend/resumeJesse Barnes2009-10-153-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Turns out some machines, like the ThinkPad X40 don't come back if you don't save/restore this register. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: Fix FDI M/N setting according with correct color depthZhenyu Wang2009-10-132-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FDI M/N calculation hasn't taken the current pipe color depth into account, but always set as 24bpp. This one checks current pipe color depth setting, and change FDI M/N calculation a little to use bits_per_pixel first, then convert to bytes_per_pixel later. This fixes display corrupt issue on Arrandle LVDS with 1600x900 panel in 18bpp dual-channel mode. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: disable powersave feature for Ironlake currentlyZhenyu Wang2009-10-132-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until we figure out the right setting for powersave features on Ironlake, disable it for now. Also disable watermark update, which has new registers for it on Ironlake too. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: Resolved against the Pineview FBC changes] Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: Fix render reclock availability detection.Andy Lutomirski2009-10-131-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the device didn't support EDP, we would bail out too soon. Signed-off-by: Andy Lutomirski <luto@mit.edu> [anholt: Pulled this patch out of the patch for adding quirks to enable reclocking.] Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: Save and restore the GM45 FBC regs on suspend and resume.Jesse Barnes2009-10-132-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This hasn't fixed the regressions we were testing against, but clearly should be required. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: Set the LVDS_BORDER when using LVDS scaling modeZhao Yakui2009-10-134-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the spec the LVDS_BORDER_ENABLE bit decides whether the border data should be included in the active display and data sent to the panel. Border should be used when in VGA centered (un-scaled) mode or when scaling a 4:3 source image to a wide screen panel (typical 16:9). So when the LVDS scaling is used, decide whether the LVDS_BORDER should be enabled or not according to the current scaling mode. At the same time fix the typo error in LVDS center scaling mode. https://bugs.freedesktop.org/show_bug.cgi?id=23789 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> tested-by: Zhao Jian <jian.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | | drm/i915: disable FBC for Pineview, fixing a boot hang.Shaohua Li2009-10-132-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pineview doesn't have this FBC mechanism, so this code doesn't apply. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | | Merge branch 'for-linus' of git://git.kernel.dk/linux-2.6-blockLinus Torvalds2009-11-043-18/+32
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git.kernel.dk/linux-2.6-block: cfq-iosched: limit coop preemption cfq-iosched: fix bad return value cfq_should_preempt() backing-dev: bdi sb prune should be in the unregister path, not destroy Fix bio_alloc() and bio_kmalloc() documentation bio_put(): add bio_clone() to the list of functions in the comment
| * | | | cfq-iosched: limit coop preemptionShaohua Li2009-11-031-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CFQ has an optimization for cooperated applications. if several io-context have close requests, they will get boost. But the optimization get abused. Considering thread a, b, which work on one file. a reads sectors s, s+2, s+4, ...; b reads sectors s+1, s+3, s +5, ... Both a and b are sequential read, so they can open idle window. a reads a sector s and goes to idle window and wakeup b. b reads sector s+1, since in current implementation, cfq_should_preempt() thinks a and b are cooperators, b will preempt a. b then reads sector s+1 and goes to idle window and wakeup a. for the same reason, a will preempt b and reads s+2. a and b will continue the circle. The circle will be very long, and a and b will occupy whole disk queue. Other applications will nearly have no chance to run. Fix this limiting coop preempt until a queue is scheduled normally again. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Acked-by: Jeff Moyer <jmoyer@redhat.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | | | cfq-iosched: fix bad return value cfq_should_preempt()Jens Axboe2009-11-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a6151c3a5c8e1ff5a28450bc8d6a99a2a0add0a7 inadvertently reversed a preempt condition check, potentially causing a performance regression. Make the meta check correct again. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | | | backing-dev: bdi sb prune should be in the unregister path, not destroyJens Axboe2009-11-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 592b09a42fc3ae6737a0f3ecf4fee42ecd0296f8 was different from the tested path, in that it moved the bdi super_block prune from unregister to destroy context. This doesn't fully fix the sync hang bug on unexpected device removal, as need to prune the bdi cache pointer before killing flusher thread. Tested-by: Artur Skawina <art.08.09@gmail.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | | | Fix bio_alloc() and bio_kmalloc() documentationAlberto Bertogli2009-11-021-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 451a9ebf accidentally broke bio_alloc() and bio_kmalloc() comments by (almost) swapping them. This patch fixes that, by placing the comments in the right place. Signed-off-by: Alberto Bertogli <albertito@blitiri.com.ar> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
| * | | | bio_put(): add bio_clone() to the list of functions in the commentAlberto Bertogli2009-11-021-1/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | In bio_put()'s comment, add bio_clone() to the list of functions that can give you a bio reference. Signed-off-by: Alberto Bertogli <albertito@blitiri.com.ar> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* | | | Merge branch 'upstream-linus' of ↵Linus Torvalds2009-11-043-9/+41
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev * 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: sata_via: Remove redundant device ID for VIA VT8261 drivers/ata/libata: Move dereference after NULL test ahci: Enable SB600 64bit DMA on MSI K9A2 Platinum v2
| * | | sata_via: Remove redundant device ID for VIA VT8261JosephChan@via.com.tw2009-11-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just remove redundant device ID for VIA VT8261. The device ID 0x9000 and 0x9040 are redundant (for VT8261). The 0x9040 is reserved for other usage. Signed-off-by: Joseph Chan <josephchan@via.com.tw> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | | drivers/ata/libata: Move dereference after NULL testJulia Lawall2009-11-031-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In each case, if the NULL test on qc is needed, then the derefernce should be after the NULL test. A simplified version of the semantic match that detects this problem is as follows (http://coccinelle.lip6.fr/): // <smpl> @match exists@ expression x, E; identifier fld; @@ * x->fld ... when != \(x = E\|&x\) * x == NULL // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | | ahci: Enable SB600 64bit DMA on MSI K9A2 Platinum v2Mark Nelson2009-11-031-5/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like the Asus M2A-VM, MSI's K9A2 Platinum (MS-7376) can also support 64bit DMA. It is a new enough board that all the BIOS releases work correctly with 64bit DMA enabled. Signed-off-by: Mark Nelson <mdnelson8@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* | | | Linux 2.6.32-rc6v2.6.32-rc6Linus Torvalds2009-11-031-1/+1
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* | | | Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds2009-11-032-0/+12
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://github.com/at91linux/linux-2.6-at91: at91: at91sam9g45 family: identify several chip versions avr32: add two new at91 to cpu.h definition
| * | | | at91: at91sam9g45 family: identify several chip versionsNicolas Ferre2009-11-032-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds the capacity to differentiate Engineering Samples and final lots through the inclusion of at91_cpu_fully_identify() and the related chip IDs with chip version field preserved. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
| * | | | avr32: add two new at91 to cpu.h definitionNicolas Ferre2009-11-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Somme common drivers will need those at91 cpu_is_xxx() definitions. As at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch that adds those chips to cpu.h in AVR32 architecture. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | | | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2009-11-0354-440/+544
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits) MIPS: O32: Fix ppoll MIPS: Oprofile: Rename cpu_type from godson2 to loongson2 MIPS: Alchemy: Fix hang with high-frequency edge interrupts MIPS: TXx9: Fix spi-baseclk value MIPS: bcm63xx: Set the correct BCM3302 CPU name MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store MIPS: Avoid potential hazard on Context register MIPS: Octeon: Use lockless interrupt controller operations when possible. MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache MIPS: SMTC: Avoid queing multiple reschedule IPIs MIPS: GCMP: Avoid accessing registers when they are not present MIPS: GIC: Random fixes and enhancements. MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands MIPS: SPRAM: Clean up support code a little MIPS: 1004K: Enable SPRAM support. MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4 MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT. MIPS: MTI: Fix accesses to device registers on MIPS boards ...
| * | | | MIPS: O32: Fix ppollArnaud Patard2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sys_ppoll syscall needs to use a compat handler on 64bit kernels with o32 user-space. Signed-off-by: Arnaud Patard <apatard@mandriva.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Oprofile: Rename cpu_type from godson2 to loongson2Wu Zhangjin2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unify the naming method between kernel and the user-space oprofile tool. Because loongson is used instead of godson in most of the places, we agreed to use loongson instead, which will simplify future maintenance. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Acked-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Alchemy: Fix hang with high-frequency edge interruptsManuel Lauss2009-11-021-8/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The handle_edge_irq() flowhandler disables edge int sources which occur too fast (i.e. another edge comes in before the irq handler function had a chance to finish). Currently, the mask_ack() callback does not ack the edges in hardware, leading to an endless loop in the flowhandler where it tries to shut up the irq source. When I rewrote the alchemy IRQ code I wrongly assumed the mask_ack() callback was only used by the level flowhandler, hence it omitted the (at the time pointless) edge acks. Turned out I was wrong; so here is a complete mask_ack implementation for Alchemy IC, which fixes the above mentioned problem. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: TXx9: Fix spi-baseclk valueAtsushi Nemoto2009-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TXx9 SPI bit rate is calculated by: fBR = fSPI / 2 / (n + 1) (fSPI is SPI master clock freq, i.e. imbusclk freq.) So use imbus_clk / 2 as a spi-baseclk. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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