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* clk: qcom: gdsc: Add GDSCs in apq8084 MMCCStephane Viau2015-09-173-1/+96
| | | | | | | | Add the GDSC instances that exist as part of apq8084 MMCC block. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Add GDSCs in apq8084 GCCRajendra Nayak2015-09-173-0/+49
| | | | | | | Add the GDSC instances that exist as part of apq8084 GCC block Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Add GDSCs in msm8974 MMCCStephen Boyd2015-09-173-0/+81
| | | | | | | | Add the GDSC instances that exist as part of msm8974 MMCC block Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Add GDSCs in msm8974 GCCStephen Boyd2015-09-173-0/+19
| | | | | | | | There's just one GDSC as part of the msm8974 GCC block. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Add GDSCs in msm8916 GCCRajendra Nayak2015-09-173-0/+60
| | | | | | | Add all data for the GDSCs which are part of msm8916 GCC block. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Add support for ON only stateRajendra Nayak2015-09-173-3/+46
| | | | | | | | | | | | Certain devices can have GDSCs' which support ON as the only state. They can't be power collapsed to either hit RET or OFF. The clients drivers for these GDSCs' however would expect the state of the core to be reset following a GDSC disable and re-enable. To do this assert/deassert reset lines every time the client driver would request the GDSC to be powered on/off instead. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Add support for Memory RET/OFFRajendra Nayak2015-09-172-0/+46
| | | | | | | | | | | | | | | | | | Along with the GDSC power switch, there is additional control to either retain all memory (core and peripheral) within a given powerdomain or to turn them off while the GDSC is powered down. Add support for these by modelling a RET state where all memory is retained and an OFF state where all memory gets turned off. The controls provided are granular enough to be able to support various differnt levels of RET states, like a 'shallow RET' with all memory retained and a 'deep RET' with some memory retained while some others are lost. The current patch does not support this and considers just one RET state where all memory is retained. Futher work, if needed can support multiple different levels of RET state. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: gdsc: Prepare common clk probe to register gdscsRajendra Nayak2015-09-172-1/+16
| | | | | | | | | The common clk probe registers a clk provider and a reset controller. Update it to register a genpd provider using the gdsc data provided by each platform. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Add support for GDSCsStephen Boyd2015-09-174-0/+222
| | | | | | | | | | | | GDSCs (Global Distributed Switch Controllers) are responsible for safely collapsing and restoring power to peripherals in the SoC. These are best modelled as power domains using genpd and given the registers are scattered throughout the clock controller register space, its best to have the support added through the clock driver. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: divider: handle integer overflow when dividing large clock ratesBrian Norris2015-09-171-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | On 32-bit architectures, 'unsigned long' (the type used to hold clock rates, in Hz) is often only 32 bits wide. DIV_ROUND_UP() (as used in, e.g., commit b11d282dbea2 "clk: divider: fix rate calculation for fractional rates") can yield an integer overflow on clock rates that are not (by themselves) too large to fit in 32 bits, because it performs addition before the division. See for example: DIV_ROUND_UP(3000000000, 1500000000) = (3.0G + 1.5G - 1) / 1.5G = OVERFLOW / 1.5G This patch fixes such cases by always promoting the dividend to 64-bits (unsigned long long) before doing the division. While this patch does not resolve the issue with large clock rates across the common clock framework nor address the problems with doing full 64-bit arithmetic on a 32-bit architecture, it does fix some issues seen when using clock dividers on a 3GHz reference clock to produce a 1.5GHz CPU clock for an ARMv7 Brahma B15 SoC. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reference: http://lkml.kernel.org/g/20150413201433.GQ32500@ld-irv-0074 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: sunxi: sun9i-mmc: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-171-0/+1
| | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luis@debethencourt.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: sunxi: sun8i-apb0: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-171-0/+1
| | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luis@debethencourt.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: sunxi: sun6i-ar100: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-171-0/+1
| | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luis@debethencourt.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: sunxi: sun6i-apb0-gates: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-171-0/+1
| | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luis@debethencourt.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: sunxi: sun6i-apb0: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-171-0/+1
| | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luis@debethencourt.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: at91: system: don't try to free_irq when there is no IRQAlexandre Belloni2015-09-171-1/+2
| | | | | | | | | In the error path of at91_clk_register_system(), sys->irq is freed unconditionally but it may not exist or be request at all. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: at91: utmi: use pmc_read when the at91_pmc is availableAlexandre Belloni2015-09-171-2/+2
| | | | | | | | | | at91_pmc_read is a workaround to allow external drivers to acces some registers of the PMC. There is no need for it in clk-utmi.c as we aready have a pointer to the struct at91_pmc. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: qcom: Allow clk_set_parent() to work on display clocksStephen Boyd2015-09-175-46/+89
| | | | | | | | | | | | | | | | Sometimes the display driver may want to change the parent PLL of the display clocks (byte and pixel clocks) depending on the use-case. Currently the parent is fixed by means of having a frequency table with one entry that chooses a particular parent. Remove this restriction and use the parent the clock is configured for in the hardware during clk_set_rate(). This requires consumers to rely on the default parent or to configure the parent with clk_set_parent()/assigned-clock-parents on the clocks before calling clk_set_rate(). Tested-by: Archit Taneja <architt@codeaurora.org> Cc: Hai Li <hali@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge branch 'clk-next' into v4.3-rc1Stephen Boyd2015-09-176-5/+30
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| * clk: tegra: dfll: Properly protect OPP listThierry Reding2015-09-171-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OPP list needs to be protected against concurrent accesses. Using simple RCU read locks does the trick and gets rid of the following lockdep warning: =============================== [ INFO: suspicious RCU usage. ] 4.2.0-next-20150908 #1 Not tainted ------------------------------- drivers/base/power/opp.c:460 Missing rcu_read_lock() or dev_opp_list_lock protection! other info that might help us debug this: rcu_scheduler_active = 1, debug_locks = 0 4 locks held by kworker/u8:0/6: #0: ("%s""deferwq"){++++.+}, at: [<c0040d8c>] process_one_work+0x118/0x4bc #1: (deferred_probe_work){+.+.+.}, at: [<c0040d8c>] process_one_work+0x118/0x4bc #2: (&dev->mutex){......}, at: [<c03b8194>] __device_attach+0x20/0x118 #3: (prepare_lock){+.+...}, at: [<c054bc08>] clk_prepare_lock+0x10/0xf8 stack backtrace: CPU: 2 PID: 6 Comm: kworker/u8:0 Not tainted 4.2.0-next-20150908 #1 Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) Workqueue: deferwq deferred_probe_work_func [<c001802c>] (unwind_backtrace) from [<c00135a4>] (show_stack+0x10/0x14) [<c00135a4>] (show_stack) from [<c02a8418>] (dump_stack+0x94/0xd4) [<c02a8418>] (dump_stack) from [<c03c6f6c>] (dev_pm_opp_find_freq_ceil+0x108/0x114) [<c03c6f6c>] (dev_pm_opp_find_freq_ceil) from [<c0551a3c>] (dfll_calculate_rate_request+0xb8/0x170) [<c0551a3c>] (dfll_calculate_rate_request) from [<c0551b10>] (dfll_clk_round_rate+0x1c/0x2c) [<c0551b10>] (dfll_clk_round_rate) from [<c054de2c>] (clk_calc_new_rates+0x1b8/0x228) [<c054de2c>] (clk_calc_new_rates) from [<c054e44c>] (clk_core_set_rate_nolock+0x44/0xac) [<c054e44c>] (clk_core_set_rate_nolock) from [<c054e4d8>] (clk_set_rate+0x24/0x34) [<c054e4d8>] (clk_set_rate) from [<c0512460>] (tegra124_cpufreq_probe+0x120/0x230) [<c0512460>] (tegra124_cpufreq_probe) from [<c03b9cbc>] (platform_drv_probe+0x44/0xac) [<c03b9cbc>] (platform_drv_probe) from [<c03b84c8>] (driver_probe_device+0x218/0x304) [<c03b84c8>] (driver_probe_device) from [<c03b69b0>] (bus_for_each_drv+0x60/0x94) [<c03b69b0>] (bus_for_each_drv) from [<c03b8228>] (__device_attach+0xb4/0x118) ata1: SATA link down (SStatus 0 SControl 300) [<c03b8228>] (__device_attach) from [<c03b77c8>] (bus_probe_device+0x88/0x90) [<c03b77c8>] (bus_probe_device) from [<c03b7be8>] (deferred_probe_work_func+0x58/0x8c) [<c03b7be8>] (deferred_probe_work_func) from [<c0040dfc>] (process_one_work+0x188/0x4bc) [<c0040dfc>] (process_one_work) from [<c004117c>] (worker_thread+0x4c/0x4f4) [<c004117c>] (worker_thread) from [<c0047230>] (kthread+0xe4/0xf8) [<c0047230>] (kthread) from [<c000f7d0>] (ret_from_fork+0x14/0x24) Signed-off-by: Thierry Reding <treding@nvidia.com> Fixes: c4fe70ada40f ("clk: tegra: Add closed loop support for the DFLL") [vince.h@nvidia.com: Unlock rcu on error path] Signed-off-by: Vince Hsu <vince.h@nvidia.com> [sboyd@codeaurora.org: Dropped second hunk that nested the rcu read lock unnecessarily] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: rockchip: add critical clock for rk3368Heiko Stübner2015-09-141-0/+6
| | | | | | | | | | | | | | | | | | | | Again a result of the gpio-clock-liberation the rk3368 needs the pclk_pd_pmu marked as critical, to boot successfully. Reported-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188Romain Perier2015-09-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Now that the rockchip clock subsystem does clock gating with GPIO banks, these are no longer enabled once during probe and no longer stay enabled for eternity. When all these clocks are disabled, the parent clock pclk_peri might be disabled too, as no other child claims it. So, we need to add pclk_peri to the critical clocks. Signed-off-by: Romain Perier <romain.perier@gmail.com> Tested-by: Michael Niewoehner <linux@mniewoehner.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: rockchip: add pclk_cpu to the list of rk3188 critical clocksMichael Niewoehner2015-09-101-0/+1
| | | | | | | | | | | | | | | | | | | | pclk_cpu needs to keep running because it is needed for devices like the act8865 regulator but with the recent gpio clock handling this is not always the case anymore. So add it to the list of critical clocks. Signed-off-by: Michael Niewoehner <linux@mniewoehner.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: rockchip: handle critical clocks after registering all clocksHeiko Stuebner2015-09-101-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the registration of critical clocks is done in the function shared between rk3066 and rk3188 clock trees. That results in them getting handled maybe before all of them are registered. Therefore move the critical clock handling down to the end of the soc- specific clock registration function, so that all clocks are registered before they're maybe handled as critical clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Michael Niewoehner <linux@mniewoehner.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: Hi6220: separately build stub clock driverLeo Yan2015-09-032-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous code, kernel builds Hi6220's common clock driver and stub clock driver together. Stub clock driver has introduced the dependency with CONFIG_MAILBOX, so kernel will not build Hi6220's common clock driver due ARM64's defconfig have not enabled CONFIG_MAILBOX by default. So separately build stub clock driver and common clock driver for Hi6220; and only let stub clock driver has the dependency with CONFIG_MAILBOX. Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: h8s2678: Fix compile errorGuenter Roeck2015-09-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent cleanup removed some include files without checking if the cleaned up code still compiles. This results in the following compile error. drivers/clk/h8300/clk-h8s2678.c: In function ‘h8s2678_pll_clk_setup’: drivers/clk/h8300/clk-h8s2678.c:99:14: error: implicit declaration of function ‘kzalloc’ drivers/clk/h8300/clk-h8s2678.c:138:2: error: implicit declaration of function ‘kfree’ Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | Linux 4.3-rc1v4.3-rc1Linus Torvalds2015-09-131-2/+2
| |
* | Merge tag 'cris-for-4.3' of ↵Linus Torvalds2015-09-1250-421/+220
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris Pull CRIS updates from Jesper Nilsson: "Mostly removal of old cruft of which we can use a generic version, or fixes for code not commonly run in the cris port, but also additions to enable some good debug" * tag 'cris-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris: (25 commits) CRISv10: delete unused lib/dmacopy.c CRISv10: delete unused lib/old_checksum.c CRIS: fix switch_mm() lockdep splat CRISv32: enable LOCKDEP_SUPPORT CRIS: add STACKTRACE_SUPPORT CRISv32: annotate irq enable in idle loop CRISv32: add support for irqflags tracing CRIS: UAPI: use generic types.h CRIS: UAPI: use generic shmbuf.h CRIS: UAPI: use generic msgbuf.h CRIS: UAPI: use generic socket.h CRIS: UAPI: use generic sembuf.h CRIS: UAPI: use generic sockios.h CRIS: UAPI: use generic auxvec.h CRIS: UAPI: use generic headers via Kbuild CRIS: UAPI: fix elf.h export CRIS: don't make asm/elf.h depend on asm/user.h CRIS: UAPI: fix ptrace.h CRISv32: Squash compile warnings for axisflashmap CRISv32: Add GPIO driver to the default configs ...
| * | CRISv10: delete unused lib/dmacopy.cRabin Vincent2015-09-051-42/+0
| | | | | | | | | | | | | | | | | | | | | This file is never built. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
| * | CRISv10: delete unused lib/old_checksum.cRabin Vincent2015-09-051-86/+0
| | | | | | | | | | | | | | | | | | | | | This file is never built. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: fix switch_mm() lockdep splatRabin Vincent2015-09-051-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With lockdep support implemented on CRISv32, we get the following splat. switch_mm() can be called both from the scheduler() (with interrupts disabled) and from flush_old_exec (via activate_mm()), with interrupts enabled. Fix it by disabling interrupts in activate_mm(), similar to powerpc and hexagon. t====================================================== [ INFO: HARDIRQ-safe -> HARDIRQ-unsafe lock order detected ] 3.19.0-08802-g20bc9f1-dirty #323 Not tainted ------------------------------------------------------ init/1 [HC0[0]:SC0[0]:HE0:SE1] is trying to acquire: (mmu_context_lock){+.+...}, at: [<c0009290>] switch_mm+0x22/0xc6 and this task is already holding: (&rq->lock){-.-.-.}, at: [<c01a0756>] __schedule+0x5e/0x648 which would create a new lock dependency: (&rq->lock){-.-.-.} -> (mmu_context_lock){+.+...} but this new dependency connects a HARDIRQ-irq-safe lock: (&rq->lock){-.-.-.} ... which became HARDIRQ-irq-safe at: [<c002b03c>] scheduler_tick+0x28/0x5e [<c0007c6c>] timer_interrupt+0x4e/0x6a [<c0043ac4>] handle_irq_event_percpu+0x54/0x13c [<c004343c>] generic_handle_irq+0x2a/0x36 to a HARDIRQ-irq-unsafe lock: (mmu_context_lock){+.+...} ... which became HARDIRQ-irq-unsafe at: ... [<c0039e60>] __lock_acquire+0x8f8/0x1d9c [<c0009290>] switch_mm+0x22/0xc6 [<c009c260>] flush_old_exec+0x500/0x5d4 [<c00da4c6>] load_elf_phdrs+0x7a/0x84 [<c00dbdb0>] load_elf_binary+0x21c/0x13b4 [<c009cdb6>] do_execve+0x22/0x2c [<c001dcf2>] ____call_usermodehelper+0x0/0x154 [<c000581e>] ret_from_kernel_thread+0xe/0x14 other info that might help us debug this: Possible interrupt unsafe locking scenario: CPU0 CPU1 ---- ---- lock(mmu_context_lock); local_irq_disable(); lock(&rq->lock); lock(mmu_context_lock); <Interrupt> lock(&rq->lock); *** DEADLOCK *** 1 lock held by init/1: #0: (&rq->lock){-.-.-.}, at: [<c01a0756>] __schedule+0x5e/0x648 Call Trace: [<c019fe9e>] printk+0x0/0x4e [<c00368f8>] print_shortest_lock_dependencies+0x0/0x15c [<c0048628>] print_stack_trace+0x0/0x88 [<c0038912>] __lock_is_held+0x3e/0x5e [<c003b894>] lock_acquire+0x8a/0xcc [<c01a50c4>] _raw_spin_lock+0x44/0x7a [<c0009290>] switch_mm+0x22/0xc6 [<c01a06f8>] __schedule+0x0/0x648 [<c01a0d76>] schedule+0x36/0x7c [<c0037d04>] trace_hardirqs_on+0x0/0x1e [<c0004e18>] do_work_pending+0x30/0xd4 [<c000591a>] _work_pending+0xe/0x12 Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRISv32: enable LOCKDEP_SUPPORTRabin Vincent2015-09-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have stack tracing and irq flags tracing support, we can also enable lockdep support Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: add STACKTRACE_SUPPORTRabin Vincent2015-09-054-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add stacktrace support, which is required for lockdep and tracing. The stack tracing simply looks at all kernel text symbols found on the stack, similar to the trap stack dumping code, which can also be converted to use this. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRISv32: annotate irq enable in idle loopRabin Vincent2015-09-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use a call to local_irq_enable() instead of incline asm so that the irqsoff latency tracer knows that interrupts are enabled here. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRISv32: add support for irqflags tracingRabin Vincent2015-09-053-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | Add support irqflags tracing, which is required for things like lockdep and ftrace. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic types.hRabin Vincent2015-09-053-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS' types.h is functionally identical to the asm-generic version. Effective diff: +#ifndef _ASM_GENERIC_TYPES_H +#define _ASM_GENERIC_TYPES_H + #include <asm-generic/int-ll64.h> + +#endif Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic shmbuf.hRabin Vincent2015-09-052-42/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS' shmbuf.h is equivalent to the asm-generic verison. Effective diff: -#ifndef _CRIS_SHMBUF_H -#define _CRIS_SHMBUF_H +#ifndef __ASM_GENERIC_SHMBUF_H +#define __ASM_GENERIC_SHMBUF_H + +#include <asm/bitsperlong.h> struct ipc64_perm shm_perm; size_t shm_segsz; __kernel_time_t shm_atime; +#if __BITS_PER_LONG != 64 unsigned long __unused1; +#endif __kernel_time_t shm_dtime; +#if __BITS_PER_LONG != 64 unsigned long __unused2; +#endif __kernel_time_t shm_ctime; +#if __BITS_PER_LONG != 64 unsigned long __unused3; +#endif __kernel_pid_t shm_cpid; __kernel_pid_t shm_lpid; - unsigned long shm_nattch; - unsigned long __unused4; - unsigned long __unused5; + __kernel_ulong_t shm_nattch; + __kernel_ulong_t __unused4; + __kernel_ulong_t __unused5; }; struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; + __kernel_ulong_t shmmax; + __kernel_ulong_t shmmin; + __kernel_ulong_t shmmni; + __kernel_ulong_t shmseg; + __kernel_ulong_t shmall; + __kernel_ulong_t __unused1; + __kernel_ulong_t __unused2; + __kernel_ulong_t __unused3; + __kernel_ulong_t __unused4; }; #endif Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic msgbuf.hRabin Vincent2015-09-052-33/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS' msgbuf.h is equivalent to the asm-generic version. Effective diff: -#ifndef _CRIS_MSGBUF_H -#define _CRIS_MSGBUF_H - - +#ifndef __ASM_GENERIC_MSGBUF_H +#define __ASM_GENERIC_MSGBUF_H +#include <asm/bitsperlong.h> struct msqid64_ds { struct ipc64_perm msg_perm; __kernel_time_t msg_stime; +#if __BITS_PER_LONG != 64 unsigned long __unused1; +#endif __kernel_time_t msg_rtime; +#if __BITS_PER_LONG != 64 unsigned long __unused2; +#endif __kernel_time_t msg_ctime; +#if __BITS_PER_LONG != 64 unsigned long __unused3; - unsigned long msg_cbytes; - unsigned long msg_qnum; - unsigned long msg_qbytes; +#endif + __kernel_ulong_t msg_cbytes; + __kernel_ulong_t msg_qnum; + __kernel_ulong_t msg_qbytes; __kernel_pid_t msg_lspid; __kernel_pid_t msg_lrpid; - unsigned long __unused4; - unsigned long __unused5; + __kernel_ulong_t __unused4; + __kernel_ulong_t __unused5; }; #endif Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic socket.hRabin Vincent2015-09-052-92/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS' socket.h is equivalent to the asm-generic version. Effective diff: -#ifndef _ASM_SOCKET_H -#define _ASM_SOCKET_H - - +#ifndef __ASM_GENERIC_SOCKET_H +#define __ASM_GENERIC_SOCKET_H #include <asm/sockios.h> #define SO_LINGER 13 #define SO_BSDCOMPAT 14 #define SO_REUSEPORT 15 +#ifndef SO_PASSCRED #define SO_PASSCRED 16 #define SO_PEERCRED 17 #define SO_RCVLOWAT 18 #define SO_SNDLOWAT 19 #define SO_RCVTIMEO 20 #define SO_SNDTIMEO 21 +#endif #define SO_SECURITY_AUTHENTICATION 22 Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic sembuf.hRabin Vincent2015-09-052-25/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS's sembuf.h is equivalent to the asm-generic version. Effective diff: -#ifndef _CRIS_SEMBUF_H -#define _CRIS_SEMBUF_H +#ifndef __ASM_GENERIC_SEMBUF_H +#define __ASM_GENERIC_SEMBUF_H +#include <asm/bitsperlong.h> struct semid64_ds { struct ipc64_perm sem_perm; __kernel_time_t sem_otime; +#if __BITS_PER_LONG != 64 unsigned long __unused1; +#endif __kernel_time_t sem_ctime; +#if __BITS_PER_LONG != 64 unsigned long __unused2; +#endif unsigned long sem_nsems; unsigned long __unused3; unsigned long __unused4; Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic sockios.hRabin Vincent2015-09-052-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS' sockios.h is equivalent to the asm-generic version. Effective diff: -#ifndef __ARCH_CRIS_SOCKIOS__ -#define __ARCH_CRIS_SOCKIOS__ +#ifndef __ASM_GENERIC_SOCKIOS_H +#define __ASM_GENERIC_SOCKIOS_H Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic auxvec.hRabin Vincent2015-09-052-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS's auxvec.h is empty just like the asm-generic version. Effective diff: -#ifndef __ASMCRIS_AUXVEC_H -#define __ASMCRIS_AUXVEC_H +#ifndef __ASM_GENERIC_AUXVEC_H +#define __ASM_GENERIC_AUXVEC_H + Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: use generic headers via KbuildRabin Vincent2015-09-0512-31/+10
| | | | | | | | | | | | | | | | | | | | | Use Kbuild magic to include the generic headers. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: fix elf.h exportRabin Vincent2015-09-054-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | CRIS userspace (uClibc for one) expects asm/elf.h to be exported but this header appears to have gone missing at some point. Move it to uapi/ and export it. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: don't make asm/elf.h depend on asm/user.hRabin Vincent2015-09-053-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | We're going to export asm/elf.h; remove its dependencies on the non-exported asm/user.h and the unused asm/system.h include. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: UAPI: fix ptrace.hRabin Vincent2015-09-056-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exported ptrace.h header on CRIS references an "arch" directory which does not exist. Fix this by having the variants in the same directory and including them conditionally, similar to other architectures. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRISv32: Squash compile warnings for axisflashmapJesper Nilsson2015-09-051-4/+5
| | | | | | | | | | | | Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRISv32: Add GPIO driver to the default configsJesper Nilsson2015-09-054-14/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a number of small issues visible when GPIO is enabled: - Correct missing default for !ETRAXFS in Kconfig - Remove information on number of bits for some Kconfigs related to the GPIO, they are different in ETRAX FS and ARTPEC-3 - Fix compile warning in ARTPEC-3 GPIO driver Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRISv32: ETRAX FS: Squash warnings in pinmux driverJesper Nilsson2015-09-051-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Squash the followng warnings arch/cris/arch-v32/mach-fs/pinmux.c: In function 'crisv32_pinmux_alloc_fixed': arch/cris/arch-v32/mach-fs/pinmux.c:104:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] arch/cris/arch-v32/mach-fs/pinmux.c: In function 'crisv32_pinmux_dealloc_fixed': arch/cris/arch-v32/mach-fs/pinmux.c:238:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] arch/cris/arch-v32/mach-fs/pinmux.c: In function '__crisv32_pinmux_alloc': arch/cris/arch-v32/mach-fs/pinmux.c:49:1: warning: control reaches end of non-void function [-Wreturn-type] Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
| * | CRIS: Wire up missing syscallsChen Gang2015-09-054-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The related warnings: CALL scripts/checksyscalls.sh <stdin>:1229:2: warning: #warning syscall sched_setattr not implemented [-Wcpp] <stdin>:1232:2: warning: #warning syscall sched_getattr not implemented [-Wcpp] <stdin>:1235:2: warning: #warning syscall renameat2 not implemented [-Wcpp] <stdin>:1238:2: warning: #warning syscall seccomp not implemented [-Wcpp] <stdin>:1241:2: warning: #warning syscall getrandom not implemented [-Wcpp] <stdin>:1244:2: warning: #warning syscall memfd_create not implemented [-Wcpp] <stdin>:1247:2: warning: #warning syscall bpf not implemented [-Wcpp] <stdin>:1250:2: warning: #warning syscall execveat not implemented [-Wcpp] Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Jesper Nilsson <jespern@axis.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-14 18:39:01 +0100