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* ARM: imx: add audio codec clk lookup for imx53-qsbShawn Guo2012-05-111-0/+19
| | | | | | | On imx53-qsb board, the clk ssi_ext.0 is used as the clock input to audio codec sgtl5000. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add audmux pad setting for imx51-babbageShawn Guo2012-05-111-0/+6
| | | | | | | | Before i.MX51 Pinctrl support is available, we have to reply on the iomux initialization in non-DT board file to set iomux up for DT boot. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add more imx5 ssi clocksShawn Guo2012-05-111-0/+40
| | | | | | Add more imx5 ssi clocks and lookup for device tree probe. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx53-qsb: Add Dialog DA9053 PMIC supportYing-Chun Liu (PaulLiu)2012-05-111-1/+73
| | | | | | | | | | | | Add Dialog DA9053 regulators support for imx53-qsb (Loco board) Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Amit Kucheria <amit.kucheria@canonical.com> Cc: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: add serial2 pinctrl supportRichard Zhao2012-05-112-0/+9
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: add sound device imx6q-sabrelite-sgtl5000Richard Zhao2012-05-111-0/+14
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6q_sabrelite: clk_register_clkdev cko1 for sgtl5000Richard Zhao2012-05-112-0/+31
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6q: add ssi1_ipg clk_lookupRichard Zhao2012-05-111-4/+6
| | | | | | | It's used by audio drivers. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: add audmux pinctrl supportRichard Zhao2012-05-112-0/+11
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: add i2c1 pinctrl supportRichard Zhao2012-05-112-0/+9
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: add audmux deviceRichard Zhao2012-05-112-0/+6
| | | | | | Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: add ssi deviceRichard Zhao2012-05-112-3/+20
| | | | | | Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-arm2: add pinctrl state for usdhcDong Aisheng2012-05-112-0/+36
| | | | | Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6: Add UART2 for low-level debugDirk Behme2012-05-114-0/+18
| | | | | | | | To be able to enable early debugging on boards using the UART2 for the console, add the option for early debugging on UART2. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6q: register phy fixup only when CONFIG_PHYLIB is enabledShawn Guo2012-05-111-8/+11
| | | | | | | | | | | | | | | | | | It fixes the following compile error with network disabled in imx_v6_v7_defconfig. arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup': imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write' arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine': imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid' make: *** [.tmp_vmlinux1] Error 1 Reported-by: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6q: move imx6q_sabrelite specific code to a dedicated functionRichard Zhao2012-05-111-2/+7
| | | | | | | It'll be easier to add other board specific code. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q-sabrelite: Add SPI NOR supportFabio Estevam2012-05-111-0/+17
| | | | | | | | | mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: Add basic support for imx6q-sabresdFabio Estevam2012-05-114-1/+60
| | | | | | | Add basic support for imx6q-sabresd. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6q-arm2: Remove hardcoded mac addressFabio Estevam2012-05-111-1/+0
| | | | | | | | | Do not hardcode the local mac address. Let bootloader retrieve it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: rename uart and fec device tree nodesShawn Guo2012-05-1115-57/+57
| | | | | | | | | | It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dts: imx: Remove bootargs fieldFabio Estevam2012-05-116-24/+0
| | | | | | | Remove bootargs field as this information is retrieved from the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q: add anatop regulatorsYing-Chun Liu (PaulLiu)2012-05-111-0/+84
| | | | | | | | Add anatop regulators to imx6q.dtsi for all imx6q platforms. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX: remove now unused clock filesSascha Hauer2012-05-098-7958/+0
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: implement clocks using common clock frameworkShawn Guo2012-05-093-1/+441
| | | | | | Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX35: implement clocks using common clock frameworkSascha Hauer2012-05-093-1/+280
| | | | | | | This patch also adds the SPDIF baud clock mux and dividers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX5: implement clocks using common clock frameworkSascha Hauer2012-05-093-1/+468
| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX31: implement clocks using common clock frameworkSascha Hauer2012-05-023-1/+184
| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX27: implement clocks using common clock frameworkSascha Hauer2012-05-023-1/+292
| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX21: implement clocks using common clock frameworkSascha Hauer2012-05-023-1/+188
| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX1: implement clocks using common clock frameworkSascha Hauer2012-05-023-1/+117
| | | | | | | | This also changes the DMA clkdev lookup to use the imx-dma driver name and "ahb" as connection ID to request the hclk dma clock. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM i.MX25: implement clocks using common clock frameworkSascha Hauer2012-05-023-1/+250
| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM: imx: add common clock support for clk busyShawn Guo2012-05-023-1/+198
| | | | | Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: add common clock support for pfdShawn Guo2012-05-023-1/+152
| | | | Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX: Add common clock support for 2bit gateSascha Hauer2012-05-023-1/+131
| | | | | | | | | | | | | | This gate consists of two bits: 0b00: clk disabled 0b01: clk enabled in run mode and disabled in sleep mode 0b11: clk enabled Currently only disabled and enabled are supported. As it's unlikely that we find something like this in another SoC create a i.MX specific clk helper for this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: add common clock support for pllv3Shawn Guo2012-05-023-1/+433
| | | | | | This PLL is found on i.MX6 SoCs Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX: Add common clock support for pllv2Sascha Hauer2012-05-023-1/+253
| | | | | | This PLL is found on i.MX51 and i.MX53 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add common clock support for pllv1Sascha Hauer2012-05-023-1/+69
| | | | | | | The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: prepare for common clock frameworkSascha Hauer2012-04-253-0/+59
| | | | | | | - Add necessary #ifdefs for CONFIG_COMMON_CLOCK - Add a global spinlock to protect the CCM registers Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX3: Make ccm base address a variableSascha Hauer2012-04-253-42/+47
| | | | | | | Instead of having a cpu_is_* in each ccm register access it is more efficient to make it a variable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX timer: request correct clockSascha Hauer2012-04-251-0/+14
| | | | | | | | | | | We used to pass the timer clock directly to mxc_timer_init. We should instead request the correct clock. This is an intermediate step: For now we request the clock in the timer code when NULL is passed as clock. Also, the gpt on some i.MX have an additional ipg clock which can be gated. Request and enable this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX5: prepare gpc_dvfs_clkSascha Hauer2012-04-251-0/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* rtc: imx dryice: Add missing clk_prepareSascha Hauer2012-04-251-3/+3
| | | | | | prepare the clock before enabling it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* dmaengine i.MX ipu: clk_prepare/unprepare clockSascha Hauer2012-04-251-3/+3
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* media mx3 camera: prepare clk before enabling itSascha Hauer2012-04-251-2/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* watchdog imx2: prepare clk before enabling itSascha Hauer2012-04-251-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* w1 i.MX: prepare/unprepare clockSascha Hauer2012-04-251-2/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* USB ehci mxc: sanitize clock handlingSascha Hauer2012-04-251-32/+24
| | | | | | | | Every i.MX ehci controller has a ahb and a ipg clock, so request it on every SoC. Do not make a special case for the usb phy clock of the i.MX51. Just request it but make it optional. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* USB ehci mxc: prepare/unprepare clockSascha Hauer2012-04-251-9/+9
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mtd mxc_nand: prepare/unprepare clockSascha Hauer2012-04-251-3/+3
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* serial i.MX: do not depend on grouped clocksSascha Hauer2012-04-251-15/+23
| | | | | | | | | | | | | | | | | | the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-10 13:14:21 +0100